From: Lucjan Bryndza <lbryndza....@icloud.com> The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit fixes bugs with interrupt reporting and implements the basic modes of the counter's time-base block.
Update time reset functions Signed-off-by: Lucjan Bryndza <lbryndza....@icloud.com> --- hw/timer/stm32f2xx_timer.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c index cee25252f7..20ca762601 100644 --- a/hw/timer/stm32f2xx_timer.c +++ b/hw/timer/stm32f2xx_timer.c @@ -128,8 +128,6 @@ static void stm32f2xx_timer_tick(void *opaque) static void stm32f2xx_timer_reset(DeviceState *dev) { STM32F2XXTimerState *s = STM32F2XXTIMER(dev); - int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - s->tim_cr1 = 0; s->tim_cr2 = 0; s->tim_smcr = 0; @@ -148,8 +146,6 @@ static void stm32f2xx_timer_reset(DeviceState *dev) s->tim_dcr = 0; s->tim_dmar = 0; s->tim_or = 0; - - s->tick_offset = stm32f2xx_ns_to_ticks(s, now); } static uint64_t stm32f2xx_timer_read(void *opaque, hwaddr offset, -- 2.38.5