[PATCH 2/4] target/riscv: rvv: Add mask_reg_full_update to mask-logical instructions

[Anton Blanchard]

Signed-off-by: Anton Blanchard <ant...@tenstorrent.com>
---
 target/riscv/vector_helper.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 9c627544e4..5bec75edf6 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -4980,11 +4980,17 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,        
  \
     uint32_t vl = env->vl;                                \
     uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;\
     uint32_t vta_all_1s = vext_vta_all_1s(desc);          \
+    uint32_t mask_reg_full_update =                       \
+                 vext_mask_reg_full_update(desc);         \
     uint32_t i;                                           \
     int a, b;                                             \
                                                           \
     VSTART_CHECK_EARLY_EXIT(env, vl);                     \
                                                           \
+    if (mask_reg_full_update) {                           \
+        vl = total_elems;                                 \
+    }                                                     \
+                                                          \
     for (i = env->vstart; i < vl; i++) {                  \
         a = vext_elem_mask(vs1, i);                       \
         b = vext_elem_mask(vs2, i);                       \
-- 
2.34.1