Ascalon writes all bits of the destination on mask-logical and mask-manipulation instructions.
Signed-off-by: Anton Blanchard <[email protected]> --- target/riscv/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 671891f2a4..fe4234b665 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -3169,6 +3169,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { .cfg.elen = 64, .cfg.rvv_ma_all_1s = true, .cfg.rvv_ta_all_1s = true, + .cfg.rvv_mask_reg_full_update = true, .cfg.misa_w = true, .cfg.pmp = true, .cfg.cbom_blocksize = 64, -- 2.34.1
