Hi,
Now we already support first stage translation with passthrough device
backed by nested translation in host, but only for PASID_0.
Structure VTDAddressSpace includes some elements suitable for emulated
device and passthrough device without PASID, e.g., address space,
different memory regions, etc, it is also protected by vtd iommu lock,
all these are useless and become a burden for passthrough device with
PASID.
When there are lots of PASIDs used in one device, the AS and MRs are
all registered to memory core and impact the whole system performance.
So instead of using VTDAddressSpace to cache pasid entry for each pasid
of a passthrough device, we define a light weight structure
VTDACCELPASIDCacheEntry with only necessary elements for each pasid. We
will use this struct as a parameter to conduct binding/unbinding to
nested hwpt, to record the current binded nested hwpt and even future
PRQ support. It's also designed to support PASID_0.
The potential full definition of VTDACCELPASIDCacheEntry may like:
typedef struct VTDACCELPASIDCacheEntry {
VTDHostIOMMUDevice *vtd_hiod;
VTDPASIDEntry pe;
uint32_t pasid;
uint32_t fs_hwpt_id;
uint32_t fault_id;
int fault_fd;
QLIST_HEAD(, VTDPRQEntry) vtd_prq_list;
IOMMUPRINotifier pri_notifier_entry;
IOMMUPRINotifier *pri_notifier;
QLIST_ENTRY(VTDACCELPASIDCacheEntry) next;
} VTDACCELPASIDCacheEntry;
GIT branch: https://github.com/yiliu1765/qemu/tree/zhenzhong/iommufd_pasid
PATCH01-06: Some preparing work
PATCH07-09: Handle PASID entry addition and removal
PATCH10-11: Support pasid binding and unbinding
PATCH12-13: Add PASID related check and enable PASID for passthrough device
This patchset depends on a kernel feature enhancement[1] to work.
Tests:
Tested with DSA device which driver uses 2 PASIDs by default.
Thanks
Zhenzhong
[1] https://lore.kernel.org/all/[email protected]/
Changelog:
RFCv2:
- extend attach/detach_hwpt() instead of introducing new callbacks (Shammer)
- Define IOMMU_NO_PASID for device attachment without pasid (Nicolin)
- update vtd_destroy_old_fs_hwpt()'s parameter for naming consistency (Clement)
- check pasid bits size to be no more than 20 bits (Clement)
- initialize local variable max_pasid_log2 to 0 (Cédric)
Zhenzhong Duan (13):
vfio/iommufd: Extend attach/detach_hwpt callback implementations with
pasid
iommufd: Extend attach/detach_hwpt callbacks to support pasid
vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID
flag
intel_iommu: Create the nested hwpt with IOMMU_HWPT_ALLOC_PASID flag
intel_iommu: Change pasid property from bool to uint8
intel_iommu: Export some functions
intel_iommu: Handle PASID entry addition for pc_inv_dsc request
intel_iommu: Handle PASID entry removal for pc_inv_dsc request
intel_iommu: Handle PASID entry removal for system reset
intel_iommu_accel: Support pasid binding/unbinding and PIOTLB flushing
intel_iommu_accel: drop _lock suffix in
vtd_flush_host_piotlb_all_locked()
intel_iommu_accel: Add pasid bits size check
intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED when configured
hw/i386/intel_iommu_accel.h | 34 ++-
hw/i386/intel_iommu_internal.h | 41 +++-
include/hw/core/iommu.h | 2 +
include/hw/i386/intel_iommu.h | 4 +-
include/hw/vfio/vfio-device.h | 1 +
include/system/iommufd.h | 16 +-
backends/iommufd.c | 9 +-
hw/arm/smmuv3-accel.c | 12 +-
hw/i386/intel_iommu.c | 81 +++----
hw/i386/intel_iommu_accel.c | 406 +++++++++++++++++++++++++++------
hw/vfio/device.c | 11 +
hw/vfio/iommufd.c | 56 +++--
hw/vfio/trace-events | 4 +-
13 files changed, 506 insertions(+), 171 deletions(-)
--
2.47.3
