The page table walker reads PTEs using address_space_ldl/ldq which use
compile-time native endianness (always LE for RISC-V). However, when a
big-endian kernel writes PTEs via normal store instructions, they are
stored in big-endian byte order. The walker then misinterprets the PTE
values, causing page faults and a hang when the kernel enables the MMU.
The RISC-V privileged specification states that implicit data memory
accesses to supervisor-level memory management data structures follow
the hart's endianness setting (MSTATUS SBE/MBE bits).
Fix both PTE reads and atomic A/D bit updates to use the explicit _le
or _be memory access variants based on the hart's runtime endianness.
---
target/riscv/cpu_helper.c | 26 ++++++++++++++++++++------
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index dd6c861a90..052ec19b23 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -1365,9 +1365,13 @@ static int get_physical_address(CPURISCVState *env,
hwaddr *physical,
}
if (riscv_cpu_mxl(env) == MXL_RV32) {
- pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
+ pte = riscv_cpu_data_is_big_endian(env)
+ ? address_space_ldl_be(cs->as, pte_addr, attrs, &res)
+ : address_space_ldl_le(cs->as, pte_addr, attrs, &res);
} else {
- pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
+ pte = riscv_cpu_data_is_big_endian(env)
+ ? address_space_ldq_be(cs->as, pte_addr, attrs, &res)
+ : address_space_ldq_le(cs->as, pte_addr, attrs, &res);
}
if (res != MEMTX_OK) {
@@ -1567,11 +1571,21 @@ static int get_physical_address(CPURISCVState *env,
hwaddr *physical,
target_ulong *pte_pa = qemu_map_ram_ptr(mr->ram_block, addr1);
target_ulong old_pte;
if (riscv_cpu_sxl(env) == MXL_RV32) {
- old_pte = qatomic_cmpxchg((uint32_t *)pte_pa,
cpu_to_le32(pte), cpu_to_le32(updated_pte));
- old_pte = le32_to_cpu(old_pte);
+ if (riscv_cpu_data_is_big_endian(env)) {
+ old_pte = qatomic_cmpxchg((uint32_t *)pte_pa,
cpu_to_be32(pte), cpu_to_be32(updated_pte));
+ old_pte = be32_to_cpu(old_pte);
+ } else {
+ old_pte = qatomic_cmpxchg((uint32_t *)pte_pa,
cpu_to_le32(pte), cpu_to_le32(updated_pte));
+ old_pte = le32_to_cpu(old_pte);
+ }
} else {
- old_pte = qatomic_cmpxchg(pte_pa, cpu_to_le64(pte),
cpu_to_le64(updated_pte));
- old_pte = le64_to_cpu(old_pte);
+ if (riscv_cpu_data_is_big_endian(env)) {
+ old_pte = qatomic_cmpxchg(pte_pa, cpu_to_be64(pte),
cpu_to_be64(updated_pte));
+ old_pte = be64_to_cpu(old_pte);
+ } else {
+ old_pte = qatomic_cmpxchg(pte_pa, cpu_to_le64(pte),
cpu_to_le64(updated_pte));
+ old_pte = le64_to_cpu(old_pte);
+ }
}
if (old_pte != pte) {
goto restart;
--
2.34.1
