On Wed, Mar 18, 2026 at 8:33 PM Philippe Mathieu-Daudé
<[email protected]> wrote:
>
> We only build our RISC-V targets as little-endian, therefore
> the LD/ST API expands to its little-endian variant. Directly
> use the latter.
>
> Mechanical change running:
>
>   $ for a in uw w l q; do \
>       sed -i -e "s/ld${a}_p(/ld${a}_le_p(/" \
>         $(git grep -wlE '(ld|st)u?[wlq]_p' target/riscv);
>     done
>
> Signed-off-by: Philippe Mathieu-Daudé <[email protected]>

Reviewed-by: Alistair Francis <[email protected]>

Alistair

> ---
>  target/riscv/cpu_helper.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index dd6c861a90e..c28832e0e39 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -1365,9 +1365,9 @@ static int get_physical_address(CPURISCVState *env, 
> hwaddr *physical,
>          }
>
>          if (riscv_cpu_mxl(env) == MXL_RV32) {
> -            pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
> +            pte = address_space_ldl_le(cs->as, pte_addr, attrs, &res);
>          } else {
> -            pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
> +            pte = address_space_ldq_le(cs->as, pte_addr, attrs, &res);
>          }
>
>          if (res != MEMTX_OK) {
> --
> 2.53.0
>
>

Reply via email to