Hi,
On 20/3/26 16:05, Djordje Todorovic wrote:
- Addressed comments from v3
- Rebased on top of master
- Then rebased on top of patch set by Philippe
"target/riscv: Forbid to use legacy native endianness API"
Djordje Todorovic (7):
target/riscv: Define MSTATUS_SBE and MSTATUS_MBE bit masks
target/riscv: Add big-endian CPU property
target/riscv: Set endianness MSTATUS bits at CPU reset
target/riscv: Implement runtime data endianness via MSTATUS bits
hw/riscv: Make boot code endianness-aware at runtime
target/riscv: Fix page table walk endianness for big-endian harts
target/riscv: Support runtime endianness in virtio via sysemu callback
Thanks for this v4. What guest do you use to test it? Would it be
possible to add a functional test, so we can check for regressions?
