LHUX performs an indexed unsigned halfword load from base + index and zero-extends the result into rd.
Add the decode entry and reuse the common indexed-load translator with MO_UW. Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: James Hilliard <[email protected]> --- Changes v2 -> v3: - Split LHUX out of the combined Octeon arithmetic and memory instruction patch. (requested by Richard Henderson) --- target/mips/tcg/octeon.decode | 1 + target/mips/tcg/octeon_translate.c | 1 + 2 files changed, 2 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index efb1a48b38..8a755075e8 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -48,6 +48,7 @@ SNEI 011100 rs:5 rt:5 imm:s10 101111 &cmpi @lx ...... base:5 index:5 rd:5 ...... ..... &lx LWX 011111 ..... ..... ..... 00000 001010 @lx LHX 011111 ..... ..... ..... 00100 001010 @lx +LHUX 011111 ..... ..... ..... 10100 001010 @lx LBUX 011111 ..... ..... ..... 00110 001010 @lx LBX 011111 ..... ..... ..... 10110 001010 @lx LDX 011111 ..... ..... ..... 01000 001010 @lx diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_translate.c index ecdce6ab9b..5a189c6484 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -164,5 +164,6 @@ static bool trans_lx(DisasContext *ctx, arg_lx *a, MemOp mop) TRANS(LBX, trans_lx, MO_SB); TRANS(LBUX, trans_lx, MO_UB); TRANS(LHX, trans_lx, MO_SW); +TRANS(LHUX, trans_lx, MO_UW); TRANS(LWX, trans_lx, MO_SL); TRANS(LDX, trans_lx, MO_UQ); -- 2.54.0
