MTM1 loads the middle Octeon3 multiplier operand pair from rs/rt into MPL[1] and MPL[4].
Like the other MTM writes, it resets partial products so the following multiplier operation starts from the newly programmed operand state. Signed-off-by: James Hilliard <[email protected]> --- Changes v2 -> v3: - Split MTM1 out of the combined Octeon arithmetic and memory instruction patch. (requested by Richard Henderson) Changes v3 -> v4: - Describe the Octeon3 rs/rt MPL[1]/MPL[4] pair handled by the shared MTM translator. --- target/mips/tcg/octeon.decode | 1 + target/mips/tcg/octeon_translate.c | 1 + 2 files changed, 2 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 99606c80f6..c85199ae32 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -48,6 +48,7 @@ MTM0 011100 rs:5 rt:5 00000 00000 001000 &r2 MTP0 011100 rs:5 rt:5 00000 00000 001001 &r2 MTP1 011100 rs:5 rt:5 00000 00000 001010 &r2 MTP2 011100 rs:5 rt:5 00000 00000 001011 &r2 +MTM1 011100 rs:5 rt:5 00000 00000 001100 &r2 &saa base rt @saa ...... base:5 rt:5 ................ &saa diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_translate.c index f128b4adae..bc01b890fa 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -275,6 +275,7 @@ TRANS(LWX, trans_lx, MO_SL); TRANS(LWUX, trans_lx, MO_UL); TRANS(LDX, trans_lx, MO_UQ); TRANS(MTM0, trans_mtm, 0); +TRANS(MTM1, trans_mtm, 1); TRANS(MTP0, trans_mtp, 0); TRANS(MTP1, trans_mtp, 1); TRANS(MTP2, trans_mtp, 2); -- 2.54.0
