SAAD is the doubleword form of SAA: it atomically adds rt to the naturally aligned 64-bit doubleword at base and discards the old memory value.
Route it through the common SAA/SAAD translator so the MemOp selects the aligned doubleword transaction size. Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: James Hilliard <[email protected]> --- Changes v2 -> v3: - Split SAAD out of the combined Octeon arithmetic and memory instruction patch. (requested by Richard Henderson) Changes v3 -> v4: - Note that SAAD shares the Octeon+ gated SAA translator path. Changes v4 -> v5: - Drop the Octeon+ gated wording/path and keep SAAD under the existing Octeon feature bucket. --- target/mips/tcg/octeon.decode | 1 + target/mips/tcg/octeon_translate.c | 1 + 2 files changed, 2 insertions(+) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index d6b241de42..d77717cd50 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -47,6 +47,7 @@ SNEI 011100 rs:5 rt:5 imm:s10 101111 &cmpi &saa base rt @saa ...... base:5 rt:5 ................ &saa SAA 011100 ..... ..... 00000 00000 011000 @saa +SAAD 011100 ..... ..... 00000 00000 011001 @saa &lx base index rd @lx ...... base:5 index:5 rd:5 ...... ..... &lx diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_translate.c index 441d71d57b..daeaf07072 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -175,6 +175,7 @@ static bool trans_saa(DisasContext *ctx, arg_saa *a, MemOp mop) } TRANS(SAA, trans_saa, MO_UL); +TRANS(SAAD, trans_saa, MO_UQ); TRANS(LBX, trans_lx, MO_SB); TRANS(LBUX, trans_lx, MO_UB); TRANS(LHX, trans_lx, MO_SW); -- 2.54.0
