riscv: Enable SMMPT extension

LIU Zhiwei Mon, 11 May 2026 19:35:29 -0700

Hi Alistaire

On 4/10/26 9:46 AM, Alistair Francis wrote:

On Thu, Apr 9, 2026 at 12:09 AM LIU Zhiwei <[email protected]> wrote:


Can we add a link in this commit to the spec version please?


OK. Done in v6 patch set.

Thanks,
Zhiwei


Alistair

Co-authored-by: Huang Tao <[email protected]>
Co-authored-by: TANG Tiancheng <[email protected]>
Signed-off-by: LIU Zhiwei <[email protected]>
Reviewed-by: Daniel Henrique Barboza <[email protected]>
---
  target/riscv/cpu.c | 4 ++++
  1 file changed, 4 insertions(+)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index cb4ccd001d..1e49465eeb 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -225,8 +225,10 @@ const RISCVIsaExtData isa_edata_arr[] = {
      ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp),
      ISA_EXT_DATA_ENTRY(smpmpmt, PRIV_VERSION_1_12_0, ext_smpmpmt),
      ISA_EXT_DATA_ENTRY(smmpm, PRIV_VERSION_1_13_0, ext_smmpm),
+    ISA_EXT_DATA_ENTRY(smmpt, PRIV_VERSION_1_13_0, ext_smmpt),
      ISA_EXT_DATA_ENTRY(smnpm, PRIV_VERSION_1_13_0, ext_smnpm),
      ISA_EXT_DATA_ENTRY(smrnmi, PRIV_VERSION_1_12_0, ext_smrnmi),
+    ISA_EXT_DATA_ENTRY(smsdid, PRIV_VERSION_1_13_0, ext_smsdid),
      ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen),
      ISA_EXT_DATA_ENTRY(ssaia, PRIV_VERSION_1_12_0, ext_ssaia),
      ISA_EXT_DATA_ENTRY(ssccfg, PRIV_VERSION_1_13_0, ext_ssccfg),
@@ -1379,6 +1381,8 @@ const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = {

  /* These are experimental so mark with 'x-' */
  const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = {
+    MULTI_EXT_CFG_BOOL("x-smmpt", ext_smmpt, false),
+    MULTI_EXT_CFG_BOOL("x-smsdid", ext_smsdid, false),
      MULTI_EXT_CFG_BOOL("x-svukte", ext_svukte, false),

      { },
--
2.43.0

Re: [PATCH v5 6/6] target/riscv: Enable SMMPT extension

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