bcm2836.c models 3 similar SoC: BCM2835, BCM2836 and BCM2837. The BCM2837 is a 64-bit only SoC (Cortex-A53), only available in the 64-bit binary.
If we build this file as common object, all BCM SoCs become available in both 32 and 64-bit binaries; however when running the introspection test on the 32-bit binary, the BCM2837 init() method tries to init the Cortex-A53 type -- although not realizing it -- which is not available. This can be avoided by deferring the CPU type initialization to the SoC DeviceRealize step (this is safe because nothing uses the CPU type before, only the GIC access them, just after their realization). Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- hw/arm/bcm2836.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index ee2f44debd1..03825e69d06 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -25,12 +25,7 @@ static void bcm283x_base_init(Object *obj) { BCM283XBaseState *s = BCM283X_BASE(obj); BCM283XBaseClass *bc = BCM283X_BASE_GET_CLASS(obj); - int n; - for (n = 0; n < bc->core_count; n++) { - object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, - bc->cpu_type); - } if (bc->core_count > 1) { qdev_property_add_static(DEVICE(obj), &bcm2836_enabled_cores_property); qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count); @@ -65,6 +60,11 @@ bool bcm283x_common_realize(DeviceState *dev, BCMSocPeripheralBaseState *ps, BCM283XBaseClass *bc = BCM283X_BASE_GET_CLASS(dev); Object *obj; + for (int n = 0; n < bc->core_count; n++) { + object_initialize_child(OBJECT(dev), "cpu[*]", &s->cpu[n].core, + bc->cpu_type); + } + /* common peripherals from bcm2835 */ obj = object_property_get_link(OBJECT(dev), "ram", &error_abort); -- 2.53.0
