On Fri, May 15, 2026 at 5:11 PM Philippe Mathieu-Daudé <[email protected]> wrote: > > Signed-off-by: Philippe Mathieu-Daudé <[email protected]> > Reviewed-by: Pierrick Bouvier <[email protected]> > ---
Reviewed-by: Manos Pitsidianakis <[email protected]> > target/arm/internals.h | 8 ++++---- > target/arm/cpu.c | 8 ++++---- > target/arm/cpu32-stubs.c | 8 ++++---- > target/arm/cpu64.c | 12 ++++++------ > 4 files changed, 18 insertions(+), 18 deletions(-) > > diff --git a/target/arm/internals.h b/target/arm/internals.h > index 3edc15c7b4a..00830b17248 100644 > --- a/target/arm/internals.h > +++ b/target/arm/internals.h > @@ -1750,10 +1750,10 @@ int aarch64_gdb_get_tag_ctl_reg(CPUState *cs, > GByteArray *buf, int reg); > int aarch64_gdb_set_tag_ctl_reg(CPUState *cs, uint8_t *buf, int reg); > int aarch64_gdb_get_tls_reg(CPUState *cs, GByteArray *buf, int reg); > int aarch64_gdb_set_tls_reg(CPUState *cs, uint8_t *buf, int reg); > -void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp); > -void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp); > -void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp); > -void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp); > +void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp); > +void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp); > +void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp); > +void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp); > void aarch64_max_tcg_initfn(Object *obj); > void aarch64_add_pauth_properties(Object *obj); > void aarch64_add_sve_properties(Object *obj); > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 76f5909e902..31e1fd6cd51 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1707,25 +1707,25 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error > **errp) > Error *local_err = NULL; > > if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { > - arm_cpu_sve_finalize(cpu, &local_err); > + aarch64_cpu_sve_finalize(cpu, &local_err); > if (local_err != NULL) { > error_propagate(errp, local_err); > return; > } > > - arm_cpu_sme_finalize(cpu, &local_err); > + aarch64_cpu_sme_finalize(cpu, &local_err); > if (local_err != NULL) { > error_propagate(errp, local_err); > return; > } > > - arm_cpu_pauth_finalize(cpu, &local_err); > + aarch64_cpu_pauth_finalize(cpu, &local_err); > if (local_err != NULL) { > error_propagate(errp, local_err); > return; > } > > - arm_cpu_lpa2_finalize(cpu, &local_err); > + aarch64_cpu_lpa2_finalize(cpu, &local_err); > if (local_err != NULL) { > error_propagate(errp, local_err); > return; > diff --git a/target/arm/cpu32-stubs.c b/target/arm/cpu32-stubs.c > index 9e50bb1b0b5..d42b1a5d6a6 100644 > --- a/target/arm/cpu32-stubs.c > +++ b/target/arm/cpu32-stubs.c > @@ -4,22 +4,22 @@ > #include "target/arm/cpu.h" > #include "target/arm/internals.h" > > -void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp) > { > g_assert_not_reached(); > } > > -void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp) > { > g_assert_not_reached(); > } > > -void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) > { > g_assert_not_reached(); > } > > -void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp) > { > g_assert_not_reached(); > } > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index a93ad2da5ad..b38a78aac3f 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -60,7 +60,7 @@ int get_sysreg_idx(ARMSysRegs sysreg) > > #undef DEF > > -void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp) > { > /* > * If any vector lengths are explicitly enabled with sve<N> properties, > @@ -121,7 +121,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) > * Disable all SVE extensions as well. Note that some ZFR0 > * fields are used also by SME so must not be wiped in > * an SME-no-SVE config. We will clear the rest in > - * arm_cpu_sme_finalize() if necessary. > + * aarch_cpu_sme_finalize() if necessary. > */ > FIELD_DP64_IDREG(&cpu->isar, ID_AA64ZFR0, F64MM, 0); > FIELD_DP64_IDREG(&cpu->isar, ID_AA64ZFR0, F32MM, 0); > @@ -336,7 +336,7 @@ static void cpu_arm_set_sve(Object *obj, bool value, > Error **errp) > FIELD_DP64_IDREG(&cpu->isar, ID_AA64PFR0, SVE, value); > } > > -void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp) > { > uint32_t vq_map = cpu->sme_vq.map; > uint32_t vq_init = cpu->sme_vq.init; > @@ -408,7 +408,7 @@ static void cpu_arm_set_sme(Object *obj, bool value, > Error **errp) > /* > * For now, write 0 for "off" and 1 for "on" into the PFR1 field. > * We will correct this value to report the right SME > - * level (SME vs SME2) in arm_cpu_sme_finalize() later. > + * level (SME vs SME2) in aarch_cpu_sme_finalize() later. > */ > FIELD_DP64_IDREG(&cpu->isar, ID_AA64PFR1, SME, value); > } > @@ -548,7 +548,7 @@ void aarch64_add_sme_properties(Object *obj) > #endif > } > > -void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) > { > ARMPauthFeature features = cpu_isar_feature(pauth_feature, cpu); > ARMISARegisters *isar = &cpu->isar; > @@ -666,7 +666,7 @@ void aarch64_add_pauth_properties(Object *obj) > } > } > > -void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp) > +void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp) > { > uint64_t t; > > -- > 2.53.0 >
