The fw_cfg_init_io_dma() function allows the caller to specify the base port number of the selector/data register and the base port number of the DMA address register separately. No caller actually uses this: they all pass in base + 4 for the dma_iobase.
To reduce the risk of unnecessary variation in what different x86 machine types use as their fw_cfg register layout, remove the dma_iobase argument from fw_cfg_init_io_dma(), and have the function always use the same "DMA port is base port + 4" layout. Signed-off-by: Peter Maydell <[email protected]> --- hw/i386/fw_cfg.c | 3 +-- hw/i386/microvm.c | 3 +-- hw/i386/pc.c | 3 +-- hw/nvram/fw_cfg.c | 8 ++++---- include/hw/nvram/fw_cfg.h | 17 +++++++++++++++-- 5 files changed, 22 insertions(+), 12 deletions(-) diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 2876490f06..d422302c1c 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -127,8 +127,7 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms, const CPUArchIdList *cpus = mc->possible_cpu_arch_ids(ms); int nb_numa_nodes = ms->numa_state->num_nodes; - fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, - &address_space_memory); + fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, &address_space_memory); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index 779741ec76..e7adab7d2e 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -320,8 +320,7 @@ static void microvm_memory_init(MicrovmMachineState *mms) e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); } - fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, - &address_space_memory); + fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, &address_space_memory); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2ecad3c503..f9d8990d1d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -568,8 +568,7 @@ void xen_load_linux(PCMachineState *pcms) assert(MACHINE(pcms)->kernel_filename != NULL); - fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, - &address_space_memory); + fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, &address_space_memory); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); rom_set_fw(fw_cfg); diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 59cf92293c..f68191553b 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1019,15 +1019,14 @@ static void fw_cfg_common_realize(DeviceState *dev, Error **errp) qemu_add_machine_init_done_notifier(&s->machine_ready); } -FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, - AddressSpace *dma_as) +FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, AddressSpace *dma_as) { DeviceState *dev; SysBusDevice *sbd; FWCfgIoState *ios; FWCfgState *s; MemoryRegion *iomem = get_system_io(); - bool dma_requested = dma_iobase && dma_as; + bool dma_requested = dma_as; dev = qdev_new(TYPE_FW_CFG_IO); if (!dma_requested) { @@ -1048,7 +1047,8 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, /* 64 bits for the address field */ s->dma_as = dma_as; s->dma_addr = 0; - memory_region_add_subregion(iomem, dma_iobase, &s->dma_iomem); + /* DMA register ioport is always at base + 4 */ + memory_region_add_subregion(iomem, iobase + 4, &s->dma_iomem); } return s; diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index 45a3747908..be3fb5f8aa 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -305,8 +305,21 @@ bool fw_cfg_add_file_from_generator(FWCfgState *s, Object *parent, const char *part, const char *filename, Error **errp); -FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, - AddressSpace *dma_as); +/** + * fw_cfg_init_io_dma: + * @iobase: x86 port number which is the base of the fw_cfg port range + * @dma_as: the device will do DMA to/from this AddressSpace + * + * Create a fw_cfg device and map it into the specified I/O port range. + * + * This creates a device with the x86 PC standard port I/O layout: + * - Selector Register IOport: @iobase + * - Data Register IOport: @iobase + 1 + * - DMA Address IOport: @iobase + 4 + * + * Returns the device object. + */ +FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, AddressSpace *dma_as); FWCfgState *fw_cfg_init_mem_nodma(hwaddr ctl_addr, hwaddr data_addr, unsigned data_width); /** -- 2.43.0
