On 6/3/26 06:00, Jamin Lin wrote:
This series extends the AST1040 SoC model by adding support for several
peripherals that are compatible with existing AST2700 controller models.
The AST1040 shares a number of peripheral IP blocks with the AST2700,
allowing the existing QEMU models to be reused with minimal changes.
This series adds support for ADC, PECI, GPIO, SGPIO, I2C, and watchdog
controllers, and updates the AST1040 EVB machine to instantiate onboard
I2C devices for validation.
For I2C support, a new AST1040 I2C type is introduced. The model
inherits the AST2700 I2C architecture, including DMA support and
64-bit DMA address registers, while constraining DMA accesses to the
16 MiB HyperRAM address space available on AST1040.
Depends on:
https://github.com/legoater/qemu.git (branch: aspeed-next)
v1:
1. Support ADC, GPIO, SGPIO, I2C and PECI
v2:
1. Address review feedback.
2. Fix issues reported during review.
3. Update i2c bus number to 14.
Jamin Lin (10):
hw/i2c/aspeed_i2c: Introduce dma_addr_lo_mask to unify DMA address
handling
hw/i2c/aspeed_i2c: Increase AST2700 buffer mode size and adjust offset
hw/arm/aspeed_ast1040: Reuse AST2700 ADC model
hw/arm/aspeed_ast1040: Introduce PECI support
hw/arm/aspeed_ast1040: Reuse AST2700 GPIO controller model
hw/arm/aspeed_ast1040: Add SGPIO controller support
hw/i2c/aspeed_i2c: Introduce AST1040 I2C model
hw/arm/aspeed_ast1040: Introduce I2C support
hw/arm/aspeed_ast1040_evb: Introduce onboard I2C device
hw/arm/aspeed_ast1040: Reuse AST2700 watchdog models
include/hw/i2c/aspeed_i2c.h | 8 ++-
hw/arm/aspeed_ast1040.c | 97 ++++++++++++++++++++++++++++-----
hw/arm/aspeed_ast1040_evb.c | 15 ++++++
hw/i2c/aspeed_i2c.c | 103 ++++++++++++++++++++++++------------
4 files changed, 173 insertions(+), 50 deletions(-)
Reviewed-by: Cédric Le Goater <[email protected]>
Thanks,
C.
