On 27.03.2026 17:34, Mathias Krause wrote:
The control register bits haven't been updated in a few years, making
them lack behind features QEMU ganied in these years.
Update them to the current version of the SDM and sort the 32bit version
to be in line with all the other definitions (descending order).
This should remove confusion when debugging, for example, CET-enabled
guests:
- before the change:
(gdb) info registers cr4
cr4 0x8000f0 [ PGE MCE PAE PSE ]
- after the change:
(gdb) info registers cr4
cr4 0x8000f0 [ CET PGE MCE PAE PSE ]
Signed-off-by: Mathias Krause <[email protected]>
This feels like a qemu-stable material, is it not?
Thanks,
/mjt
