On 22/6/26 21:31, Daniel Henrique Barboza wrote:
monitor_get_register and phys_add_debug are TCG only.
They aren't... And get_phys_addr_debug() seems mandatory.
Maybe it happens the RISCV implementation only considers TCG?
If so, maybe this patch is heading in the right direction,
but its description has to be reworded IMHO.
(while here, maybe we can convert to SysemuCPUOps::translate_for_debug?)
Signed-off-by: Daniel Henrique Barboza <[email protected]>
---
target/riscv/cpu.c | 6 ++++--
target/riscv/monitor.c | 2 ++
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 4e96bbeb60..0a7e6f6ed0 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -2669,11 +2669,13 @@ static int64_t riscv_get_arch_id(CPUState *cs)
static const struct SysemuCPUOps riscv_sysemu_ops = {
.has_work = riscv_cpu_has_work,
- .get_phys_addr_debug = riscv_cpu_get_phys_addr_debug,
.write_elf64_note = riscv_cpu_write_elf64_note,
.write_elf32_note = riscv_cpu_write_elf32_note,
- .monitor_get_register = riscv_monitor_get_register_legacy,
.legacy_vmsd = &vmstate_riscv_cpu,
+#ifdef CONFIG_TCG
+ .get_phys_addr_debug = riscv_cpu_get_phys_addr_debug,
+ .monitor_get_register = riscv_monitor_get_register_legacy,
+#endif
};
#endif
diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c
index 3e89dcaf7c..7aacd1d89c 100644
--- a/target/riscv/monitor.c
+++ b/target/riscv/monitor.c
@@ -245,6 +245,7 @@ void hmp_info_mem(Monitor *mon, const QDict *qdict)
mem_info_svxx(mon, env);
}
+#ifdef CONFIG_TCG
static bool reg_is_ulong_integer(CPURISCVState *env, const char *name,
target_ulong *val, bool is_gprh)
{
@@ -379,3 +380,4 @@ int riscv_monitor_get_register_legacy(CPUState *cs, const
char *name,
return -EINVAL;
}
+#endif
