We don't need to check PPC_ISA207S, because that's already done starting with register_book3s_207_dbg_sprs(). We no longer need to check BP_CPU or clear watchpoint_hit.
Signed-off-by: Richard Henderson <[email protected]> --- target/ppc/tcg-excp_helper.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index 51358c901f..56ca66e7b5 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -314,19 +314,14 @@ void ppc_cpu_debug_excp_handler(CPUState *cs, CPUBreakpoint *hit) #if defined(TARGET_PPC64) CPUPPCState *env = cpu_env(cs); - if (env->insns_flags2 & PPC2_ISA207S) { - if (cs->watchpoint_hit) { - if (cs->watchpoint_hit->flags & BP_CPU) { - env->spr[SPR_DAR] = cs->watchpoint_hit->hitaddr; - env->spr[SPR_DSISR] = PPC_BIT(41); - cs->watchpoint_hit = NULL; - raise_exception(env, POWERPC_EXCP_DSI); - } - cs->watchpoint_hit = NULL; - } else if (cpu_breakpoint_test(cs, env->nip, BP_CPU)) { - raise_exception_err(env, POWERPC_EXCP_TRACE, - PPC_BIT(33) | PPC_BIT(43)); - } + if (hit->flags & BP_MEM_ACCESS) { + /* watchpoint */ + env->spr[SPR_DAR] = hit->hitaddr; + env->spr[SPR_DSISR] = PPC_BIT(41); + raise_exception(env, POWERPC_EXCP_DSI); + } else { + /* breakpoint */ + raise_exception_err(env, POWERPC_EXCP_TRACE, PPC_BIT(33) | PPC_BIT(43)); } #endif } -- 2.43.0
