Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/cpu-features.h | 5 +++++
target/arm/tcg/helper-sme-defs.h | 1 +
target/arm/tcg/sme_helper.c | 6 ++++++
target/arm/tcg/translate-sme.c | 2 ++
target/arm/tcg/sme.decode | 3 +++
5 files changed, 17 insertions(+)
diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index 6370c03e2a..4190398a1d 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -1842,6 +1842,11 @@ static inline bool
isar_feature_aa64_sme_mop4_i16i64(const ARMISARegisters *id)
return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_i16i64(id);
}
+static inline bool isar_feature_aa64_sme_tmop_f16f16(const ARMISARegisters *id)
+{
+ return isar_feature_aa64_sme_tmop(id) && isar_feature_aa64_sme_f16f16(id);
+}
+
/*
* Feature tests for "does this exist in either 32-bit or 64-bit?"
*/
diff --git a/target/arm/tcg/helper-sme-defs.h b/target/arm/tcg/helper-sme-defs.h
index 8107eb40af..84707e6c71 100644
--- a/target/arm/tcg/helper-sme-defs.h
+++ b/target/arm/tcg/helper-sme-defs.h
@@ -405,4 +405,5 @@ DEF_HELPER_FLAGS_4(sme_usmop4s_sb, TCG_CALL_NO_RWG, void,
ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(sme_usmop4a_dh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(sme_usmop4s_dh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_ftmopa_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr,
fpst, i32)
DEF_HELPER_FLAGS_6(sme_ftmopa_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr,
fpst, i32)
diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
index 571b0add34..49fd3d07e4 100644
--- a/target/arm/tcg/sme_helper.c
+++ b/target/arm/tcg/sme_helper.c
@@ -2693,6 +2693,12 @@ void HELPER(sme_fmop4a_hh)(void *vza, void *vzn, void
*vzm,
sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float16), inner_fmop4a_hh);
}
+void HELPER(sme_ftmopa_hh)(void *vza, void *vzn, void *vzm, void *vzk,
+ float_status *fpst, uint32_t desc)
+{
+ sme_tmop(vza, vzn, vzm, vzk, fpst, desc, MO_16, inner_fmop4a_hh);
+}
+
static void inner_fmop4s_hh(void *vd, void *vn, void *vm, void *vinfo)
{
float16 *d = vd, *n = vn, *m = vm;
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
index 36a0b00089..6cb9628e75 100644
--- a/target/arm/tcg/translate-sme.c
+++ b/target/arm/tcg/translate-sme.c
@@ -2156,5 +2156,7 @@ static bool do_tmop_fp(DisasContext *s, arg_tmop *a,
MemOp esz,
return true;
}
+TRANS_FEAT(FTMOPA_hh, aa64_sme_tmop_f16f16, do_tmop_fp,
+ a, MO_16, FPST_ZA_F16, gen_helper_sme_ftmopa_hh)
TRANS_FEAT(FTMOPA_ss, aa64_sme_tmop, do_tmop_fp,
a, MO_32, FPST_ZA, gen_helper_sme_ftmopa_ss)
diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode
index 0250177d0d..16ed3ca391 100644
--- a/target/arm/tcg/sme.decode
+++ b/target/arm/tcg/sme.decode
@@ -1137,7 +1137,10 @@ USMOP4_dh 1010 0001 110. ...0 0000 00.. ..0. 1...
@mop4_o3
&tmop zad zn zm zk idx
%tmop_zk 10:3 !function=expand_tmop_zk
+@tmop_o1 .... .... ... zm:5 ... ... .... idx:2 ... zad:1 \
+ &tmop zn=%zn_ax2 zk=%tmop_zk
@tmop_o2 .... .... ... zm:5 ... ... .... idx:2 .. zad:2 \
&tmop zn=%zn_ax2 zk=%tmop_zk
+FTMOPA_hh 1000 0001 010 ..... 000 ... .... .. 100 . @tmop_o1
FTMOPA_ss 1000 0000 010 ..... 000 ... .... .. 00 .. @tmop_o2
--
2.43.0
