This is a follow-up to the previous system emulation series which
introduced hex-l2vic. The device implementation has been reworked
and should address the feedback from previous threads.
Changes since v1:
- refactored l2vic_{read,write} to use a table
- changed arch tests to use QemuBaseTest.scratch_file
v1:
https://lore.kernel.org/qemu-devel/[email protected]/
Brian Cain (6):
target/hexagon: initialize deferred sreg-write temps to current value
target/hexagon: fix PC not advancing for non-COF TB-ending packets
bitops.h: Add find_first_bit32()
hw/hexagon: connect l2vic device
tests/qtest: add L2VIC qtest
tests/functional/hexagon: add arch_tests functional test
Sid Manning (1):
hw/intc: Add l2vic interrupt controller
MAINTAINERS | 5 +
docs/devel/hexagon-l2vic.rst | 55 ++
docs/devel/index-internals.rst | 1 +
include/hw/hexagon/hexagon.h | 1 +
include/hw/hexagon/hexagon_globalreg.h | 4 +
include/hw/intc/hex-l2vic.h | 87 ++++
include/qemu/bitops.h | 30 +-
target/hexagon/cpu.h | 2 +
target/hexagon/translate.h | 3 +
hw/hexagon/hexagon_dsp.c | 20 +
hw/hexagon/hexagon_globalreg.c | 41 +-
hw/hexagon/virt.c | 22 +
hw/intc/hex-l2vic.c | 532 ++++++++++++++++++++
target/hexagon/cpu.c | 2 +
target/hexagon/genptr.c | 14 +-
target/hexagon/op_helper.c | 21 +-
target/hexagon/translate.c | 56 ++-
tests/qtest/l2vic-test.c | 242 +++++++++
hw/hexagon/Kconfig | 1 +
hw/intc/Kconfig | 3 +
hw/intc/meson.build | 2 +
hw/intc/trace-events | 4 +
tests/functional/hexagon/meson.build | 5 +
tests/functional/hexagon/test_arch_tests.py | 63 +++
tests/functional/meson.build | 1 +
tests/qtest/meson.build | 2 +-
26 files changed, 1187 insertions(+), 32 deletions(-)
create mode 100644 docs/devel/hexagon-l2vic.rst
create mode 100644 include/hw/intc/hex-l2vic.h
create mode 100644 hw/intc/hex-l2vic.c
create mode 100644 tests/qtest/l2vic-test.c
create mode 100644 tests/functional/hexagon/meson.build
create mode 100755 tests/functional/hexagon/test_arch_tests.py
--
2.34.1
