On 15/7/26 20:56, Brian Cain wrote:
From: Sid Manning <[email protected]>
The Hexagon DSP requires an L2VIC to route up to 1024
external interrupt sources through 4 VID output groups into
the core's 8 interrupt inputs. This device model implements
the register interface, interrupt steering, and edge/level
type handling needed by the sysemu machine models.
Co-authored-by: Matheus Tavares Bernardino <[email protected]>
Co-authored-by: Damien Hedde <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
---
MAINTAINERS | 3 +
docs/devel/hexagon-l2vic.rst | 55 ++++
docs/devel/index-internals.rst | 1 +
include/hw/intc/hex-l2vic.h | 87 ++++++
target/hexagon/cpu.h | 2 +
hw/intc/hex-l2vic.c | 532 +++++++++++++++++++++++++++++++++
target/hexagon/cpu.c | 2 +
target/hexagon/op_helper.c | 21 +-
hw/hexagon/Kconfig | 1 +
hw/intc/Kconfig | 3 +
hw/intc/meson.build | 2 +
hw/intc/trace-events | 4 +
12 files changed, 712 insertions(+), 1 deletion(-)
create mode 100644 docs/devel/hexagon-l2vic.rst
create mode 100644 include/hw/intc/hex-l2vic.h
create mode 100644 hw/intc/hex-l2vic.c
+/*
+ * Find out if this irq is associated with a group other than
+ * the default group
+ */
+static uint32_t *get_int_group(HexL2VICState *s, int irq)
+{
+ int n = irq & 0x1f;
+ if (n < 8) {
+ return s->int_group_n0;
+ }
+ if (n < 16) {
+ return s->int_group_n1;
+ }
+ if (n < 24) {
+ return s->int_group_n2;
+ }
+ return s->int_group_n3;
Declaring int_group_n[4], this could be:
return s->int_group_n[extract32(irq, 3, 2)];
+}
