On Fri, 21 Aug 2026 at 15:21, Richard Henderson <[email protected]> wrote: > > On 8/21/26 06:25, Peter Maydell wrote: > > The IT insn is introduced for A-profile starting in v6T2; for > > M-profile it is present when the Main Extension is implemented (which > > includes v7M and excludes v6M). We were missing the feature-check, > > so fail to UNDEF on earlier cores. > > > > Add the missing check. > > > > Cc: [email protected] > > Fixes: 9ee6e8bb853bde ("ARMv7 support.") > > Signed-off-by: Peter Maydell <[email protected]> > > --- > > target/arm/tcg/translate.c | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c > > index df98dc2e34d..103e2fe7c73 100644 > > --- a/target/arm/tcg/translate.c > > +++ b/target/arm/tcg/translate.c > > @@ -6038,6 +6038,16 @@ static bool trans_IT(DisasContext *s, arg_IT *a) > > { > > int cond_mask = a->cond_mask; > > > > + /* > > + * IT insn introduced in v6T2 for A-profile; it is only present > > + * on M-profile if the Main Extension is implemented. > > + */ > > + if (!arm_dc_feature(s, ARM_FEATURE_THUMB2) || > > + (arm_dc_feature(s, ARM_FEATURE_M) && > > + !arm_dc_feature(s, ARM_FEATURE_M_MAIN))) { > > + return false; > > + } > In practice this is going to be the same as just thumb2, because v7M has v7 > which implies > thumb2, and all v7M have m_main.
v8M without the main extension exists, though we don't model any of those CPUs at the moment. That will have ARM_FEATURE_THUMB2 (because FEATURE_V8 implies FEATURE_V7 and FEATURE_V7 implies FEATURE_THUMB2). > Is it clearer as > > !(arm_dc_feature(s, ARM_FEATURE_M) > ? arm_dc_feature(s, ARM_FEATURE_M_MAIN) > : arm_dc_feature(s, ARM_FEATURE_THUMB2)) > > ? Yeah, I think so. (I actually wrote it first with nested if()s roughly like that.) -- PMM
