Ax3000 SoC reserves 512 KiB for MMIO of Cadence UART Set the mmio-size of Cadence UART to 512 KiB from 4 KiB which will resolve overlapping issue between UART0 and UART3 in QEMU
Signed-off-by: Kuan-Jui Chiu <[email protected]> --- hw/arm/ax3000-soc.c | 2 ++ include/hw/arm/ax3000-soc.h | 1 + 2 files changed, 3 insertions(+) diff --git a/hw/arm/ax3000-soc.c b/hw/arm/ax3000-soc.c index a2e0b19732..046a5b7aa4 100644 --- a/hw/arm/ax3000-soc.c +++ b/hw/arm/ax3000-soc.c @@ -155,6 +155,8 @@ static void ax3000_realize(DeviceState *dev, Error **errp) for (int i = 0; i < AX3000_NUM_UARTS; i++) { qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); + qdev_prop_set_uint64(DEVICE(&s->uart[i]), "mmio-size", + AX3000_UART_SIZE); if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), errp)) { return; } diff --git a/include/hw/arm/ax3000-soc.h b/include/hw/arm/ax3000-soc.h index 344fcb6f3c..032edafff4 100644 --- a/include/hw/arm/ax3000-soc.h +++ b/include/hw/arm/ax3000-soc.h @@ -35,6 +35,7 @@ OBJECT_DECLARE_TYPE(Ax3000SoCState, Ax3000SoCClass, AX3000_SOC) #define AX3000_UART1_BASE 0x805a0000 #define AX3000_UART2_BASE 0x80620000 #define AX3000_UART3_BASE 0x80520800 +#define AX3000_UART_SIZE 0x100 #define AX3000_SDHCI0_BASE 0x86000000 #define AX3000_EMMC_PHY_BASE 0x80801C00 -- 2.34.1
