Now the CPU interface knows its own cpuidx, we can pass that to gicv5_get_hppi() and avoid the IAFFID->cpuidx lookup in the IRS.
Signed-off-by: Peter Maydell <[email protected]> --- hw/intc/arm_gicv5.c | 5 ++--- include/hw/intc/arm_gicv5_stream.h | 4 ++-- target/arm/tcg/gicv5-cpuif.c | 2 +- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c index 6b72870439b..66953606419 100644 --- a/hw/intc/arm_gicv5.c +++ b/hw/intc/arm_gicv5.c @@ -531,12 +531,11 @@ static void irs_recall_hppis(GICv5 *s, GICv5Domain domain) } GICv5PendingIrq gicv5_get_hppi(GICv5Common *cs, GICv5Domain domain, - uint32_t iaffid) + uint32_t cpuidx) { GICv5 *s = ARM_GICV5(cs); - int cpuidx = irs_cpuidx_from_iaffid(cs, iaffid); - assert(cpuidx >= 0); + assert(cpuidx < cs->num_cpus); return s->hppi[domain][cpuidx]; } diff --git a/include/hw/intc/arm_gicv5_stream.h b/include/hw/intc/arm_gicv5_stream.h index f45072d8c57..641f3d0f499 100644 --- a/include/hw/intc/arm_gicv5_stream.h +++ b/include/hw/intc/arm_gicv5_stream.h @@ -204,14 +204,14 @@ void gicv5_forward_interrupt(ARMCPU *cpu, GICv5Domain domain); * gicv5_get_hppi * @cs: GIC IRS to query * @domain: interrupt domain to act on - * @iaffid: IAFFID of this CPU interface + * @cpuidx: IRS CPU index of this CPU interface * * Ask the IRS for the highest priority pending interrupt that it has * for this CPU. This returns the equivalent of what in the stream * protocol is the outstanding interrupt sent with a Forward packet. */ GICv5PendingIrq gicv5_get_hppi(GICv5Common *cs, GICv5Domain domain, - uint32_t iaffid); + uint32_t cpuidx); /** * gicv5_deactivate diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index eea66a4140e..0b1033c1ef0 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -147,7 +147,7 @@ static GICv5PendingIrq gic_hppi(CPUARMState *env, GICv5Domain domain) return GICV5_PENDING_IRQ_NONE; } - irs_hppi = gicv5_get_hppi(gic, domain, env->gicv5.iaffid); + irs_hppi = gicv5_get_hppi(gic, domain, env->gicv5.cpuidx); /* * If the best PPI and the best interrupt from the IRS have the -- 2.43.0
