Compiles hw/riscv a single time for both qemu-system-riscv32 and qemu-system-riscv64 by adopting the TargetInfo API.
All in all, the number of compilation units when building both riscv[32|64]-softmmu is reduced by 11, and the binary size of qemu-system-riscv[32|64] is increased by 0.11% and 0.026% respectively (corresponding to 65k and 14k bytes). (data from v3). Signed-off-by: Anton Johansson <[email protected]> --- Changes in v4: - Drop merged patches. - Added reviewed-bys. - `target/riscv: Replace TYPE_RISCV_CPU_BASE`, inlined replacement ternary and dropped machines-qom.h function, file has since been removed. - `target/riscv: Replace TARGET_LONG_BITS in header exposed to common code`, #ifdef irq_local_guest_max to system-mode. - `target/riscv: Widen riscv_new_csr_seed()`, new patch added to handle function introduced since last version. - `target/riscv: Move riscv_pmu_read_ctr() to internal csr.h header`, dropped and moved to a follow up patchset. - `target/riscv: Stub out kvm functions`, use a separate stub library (Philippe). - `hw/riscv: Tenstorrent Atlantis, use hwaddr/vaddr over target_ulong`, new patch handling new cpu. - 3 New patches added to filter targets with is_available. - Link to v3: https://lore.kernel.org/qemu-devel/[email protected] Changes in v3: - Dropped merged prequisite patchsets. - patch 5/14 "configs/target: Implement per-binary TargetInfo structure for riscv": Use new target_info_init() TargetInfo registration. - patch 7/14 "target/riscv: Replace TYPE_RISCV_CPU_BASE": Rename virt_default_cpu_type() -> riscv_default_cpu_type() and define in machines-qom.h. - Dropped patch "[PATCH v2 11/14] target/riscv: Make pmu.h target-agnostic": This patch replaced target_ulongs with privilege_mode_t and has been folded into the prerequisite patchset introducing the typedef. - Added patch 12/14 "target/riscv: Move target_long.h inclusion away from cpu.h": Moves target_long.h inclusion to target specific header. - Link to v2: https://lore.kernel.org/qemu-devel/[email protected] Changes in v2: - Inlined sifive_cpu.h runtime functions and removed header (Philippe); - Moved IRQ_LOCAL_GUEST_MAX macro to field in RISCVCPUDef (Philippe); - Added reviewed-bys; - Link to v1: https://lore.kernel.org/qemu-devel/[email protected]. --- Anton Johansson (12): target/riscv: Replace TYPE_RISCV_CPU_BASE target/riscv: Remove ifdefs in cpu.h target/riscv: Replace TARGET_LONG_BITS in header exposed to common code target/riscv: Widen riscv_new_csr_seed() target/riscv: Stub out kvm functions target/riscv: Move target_long.h inclusion away from cpu.h hw/riscv: Define SiFive E/U CPUs using runtime conditions hw/riscv: Tenstorrent Atlantis, use hwaddr/vaddr over target_ulong hw: Add availfn arg to DEFINE_MACHINE_EXTENDED() target-info: Introduce target_riscv32 hw/riscv: Filter for 32- or 64-bit machine types hw/riscv: Compile once include/hw/core/boards.h | 11 ++++++--- include/hw/riscv/sifive_cpu.h | 31 ------------------------ include/hw/riscv/sifive_e.h | 1 - include/hw/riscv/sifive_u.h | 1 - include/qemu/target-info.h | 7 ++++++ target/riscv/cpu.h | 52 +++++++++++------------------------------ target/riscv/cpu_bits.h | 2 -- target/riscv/internals.h | 1 + target/riscv/tcg/pmu.h | 1 + hw/arm/bananapi_m2u.c | 2 +- hw/arm/cubieboard.c | 2 +- hw/arm/imx8mm-evk.c | 2 +- hw/arm/integratorcp.c | 2 +- hw/arm/mcimx7d-sabre.c | 2 +- hw/arm/orangepi.c | 2 +- hw/intc/riscv_imsic.c | 4 +++- hw/ppc/pegasos.c | 3 ++- hw/riscv/boston-aia.c | 3 ++- hw/riscv/k230.c | 3 +++ hw/riscv/microblaze-v-generic.c | 4 +++- hw/riscv/microchip_pfsoc.c | 3 +++ hw/riscv/opentitan.c | 3 +++ hw/riscv/shakti_c.c | 3 +++ hw/riscv/sifive_e.c | 3 ++- hw/riscv/sifive_u.c | 7 ++++-- hw/riscv/tt_atlantis.c | 6 ++++- hw/riscv/virt.c | 4 +++- hw/riscv/xiangshan_kmh.c | 3 +++ target-info.c | 5 ++++ target/riscv/cpu.c | 22 +++++++++++++---- target/riscv/kvm/kvm-cpu.c | 1 + target/riscv/kvm/kvm-stub.c | 23 ++++++++++++++++++ hw/riscv/meson.build | 47 +++++++++++++++++++------------------ target/riscv/kvm/meson.build | 1 + target/riscv/meson.build | 3 +++ 35 files changed, 151 insertions(+), 119 deletions(-)
