Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/tcg/translate.h | 1 +
target/arm/tcg/translate-a64.c | 7 +------
target/arm/tcg/translate.c | 28 ++++++++++++++++------------
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index f633aa265f0..7eba9b764ce 100644
--- a/target/arm/tcg/translate.h
+++ b/target/arm/tcg/translate.h
@@ -382,6 +382,7 @@ void arm_jump_cc(DisasCompare *cmp, TCGLabel *label);
void arm_gen_test_cc(int cc, TCGLabel *label);
MemOp pow2_align(unsigned i);
void unallocated_encoding(DisasContext *s);
+bool check_il(DisasContext *s);
void gen_exception_internal(int excp);
void gen_exception_insn_el(DisasContext *s, int64_t pc_diff, int excp,
uint32_t syn, uint32_t target_el);
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index b3438235828..7f858654c43 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -11174,12 +11174,7 @@ static void aarch64_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
s->fp_access_checked = 0;
s->sve_access_checked = 0;
- if (s->pstate_il) {
- /*
- * Illegal execution state. This has priority over BTI
- * exceptions, but comes after instruction abort exceptions.
- */
- gen_exception_insn(s, 0, EXCP_UDEF, syn_illegalstate());
+ if (check_il(s)) {
return;
}
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index f32200cc47e..fbacc3b7574 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -1159,6 +1159,20 @@ void unallocated_encoding(DisasContext *s)
gen_exception_insn(s, 0, EXCP_UDEF, syn_uncategorized());
}
+/*
+ * These conditions have less priority than instruction abort, and thus
+ * must be checked after reading the instruction. They have more priority
+ * than the AArch64 BTI exception.
+ */
+bool check_il(DisasContext *s)
+{
+ if (s->pstate_il) {
+ gen_exception_insn(s, 0, EXCP_UDEF, syn_illegalstate());
+ return true;
+ }
+ return false;
+}
+
/* Force a TB lookup after an instruction that changes the CPU state. */
void gen_lookup_tb(DisasContext *s)
{
@@ -6153,12 +6167,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int
insn)
return;
}
- if (s->pstate_il) {
- /*
- * Illegal execution state. This has priority over BTI
- * exceptions, but comes after instruction abort exceptions.
- */
- gen_exception_insn(s, 0, EXCP_UDEF, syn_illegalstate());
+ if (check_il(s)) {
return;
}
@@ -6728,12 +6737,7 @@ static void thumb_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
dc->base.pc_next = pc;
dc->insn = insn;
- if (dc->pstate_il) {
- /*
- * Illegal execution state. This has priority over BTI
- * exceptions, but comes after instruction abort exceptions.
- */
- gen_exception_insn(dc, 0, EXCP_UDEF, syn_illegalstate());
+ if (check_il(dc)) {
return;
}
--
2.53.0
