Signed-off-by: Anton Johansson <[email protected]>
---
target/riscv/cpu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 39501c6c9f..23ca8f2431 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1595,12 +1595,10 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPUClass
*mcc)
/* Validate that MISA_MXL is set properly. */
switch (mcc->def->misa_mxl_max) {
-#ifdef TARGET_RISCV64
case MXL_RV64:
case MXL_RV128:
cc->gdb_core_xml_file = "riscv-64bit-cpu.xml";
break;
-#endif
case MXL_RV32:
cc->gdb_core_xml_file = "riscv-32bit-cpu.xml";
break;
--
2.52.0