On 7/10/26 10:43, Anton Johansson wrote:
Moves MAX and BARE cpus to separate typeinfo tables indexed by target_riscv64() during registration, similar to how ARM handles MAX cpu types.Signed-off-by: Anton Johansson <[email protected]> --- target/riscv/cpu.c | 86 ++++++++++++++++++++++++++++++++---------------------- 1 file changed, 51 insertions(+), 35 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
