From: Portia Stephens <[email protected]> Previously only the Ascalon console UART was enabled, this enables all 5 UARTs on the SoC. Only UART1 is added to the serial interface for now.
Signed-off-by: Portia Stephens <[email protected]> Reviewed-by: Daniel Henrique Barboza <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Message-ID: <[email protected]> Signed-off-by: Alistair Francis <[email protected]> --- include/hw/riscv/tt_atlantis.h | 11 ++++++++++- hw/riscv/tt_atlantis.c | 36 ++++++++++++++++++++++++++-------- 2 files changed, 38 insertions(+), 9 deletions(-) diff --git a/include/hw/riscv/tt_atlantis.h b/include/hw/riscv/tt_atlantis.h index fc7a4337cc21..f965bf23fcde 100644 --- a/include/hw/riscv/tt_atlantis.h +++ b/include/hw/riscv/tt_atlantis.h @@ -25,6 +25,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(TTAtlantisSoCState, TT_ATLANTIS_SOC) #define TT_ATL_NUM_I2C 5 #define TT_ATL_NUM_PRCM 4 +#define TT_ATL_NUM_UARTS 5 struct TTAtlantisSoCState { /*< private >*/ @@ -41,7 +42,7 @@ struct TTAtlantisSoCState { RISCVHartArrayState cpus; DeviceState *irqchip; DesignWareI2CState i2c[TT_ATL_NUM_I2C]; - DW8250State uart1; + DW8250State uart[TT_ATL_NUM_UARTS]; MemoryRegion bootrom; TTAtlantisPRCMState prcm[TT_ATL_NUM_PRCM]; @@ -66,7 +67,11 @@ enum { TT_ATL_I2C2_IRQ = 35, TT_ATL_I2C3_IRQ = 36, TT_ATL_I2C4_IRQ = 37, + TT_ATL_UART0_IRQ = 38, TT_ATL_UART1_IRQ = 39, + TT_ATL_UART2_IRQ = 40, + TT_ATL_UART3_IRQ = 41, + TT_ATL_UART4_IRQ = 42, }; enum { @@ -83,7 +88,11 @@ enum { TT_ATL_MIMSIC, TT_ATL_SAPLIC, TT_ATL_SIMSIC, + TT_ATL_UART0, TT_ATL_UART1, + TT_ATL_UART2, + TT_ATL_UART3, + TT_ATL_UART4, TT_ATL_PRCM_RCPU, TT_ATL_PRCM_HSIO, TT_ATL_PRCM_PCIE, diff --git a/hw/riscv/tt_atlantis.c b/hw/riscv/tt_atlantis.c index dfd6bc6ba6ec..311de64eda55 100644 --- a/hw/riscv/tt_atlantis.c +++ b/hw/riscv/tt_atlantis.c @@ -64,7 +64,11 @@ static const MemMapEntry tt_atlantis_memmap[] = { [TT_ATL_I2C2] = { 0xd4060000, 0x10000 }, [TT_ATL_I2C3] = { 0xd4070000, 0x10000 }, [TT_ATL_I2C4] = { 0xd4080000, 0x10000 }, + [TT_ATL_UART0] = { 0xd4100000, 0x10000 }, [TT_ATL_UART1] = { 0xd4110000, 0x10000 }, + [TT_ATL_UART2] = { 0xd4120000, 0x10000 }, + [TT_ATL_UART3] = { 0xd4130000, 0x10000 }, + [TT_ATL_UART4] = { 0xd4140000, 0x10000 }, [TT_ATL_PRCM_PCIE] = { 0xd8000000, 0x100 }, [TT_ATL_PRCM_MM] = { 0xdc000000, 0x1000 }, [TT_ATL_PRCM_HSIO] = { 0xe00c0000, 0x510 }, @@ -531,13 +535,21 @@ static void tt_atlantis_machine_done(Notifier *n, void *data) fdt_load_addr); } +static inline int tt_atlantis_uart_index(int uart_dev) +{ + return uart_dev - TT_ATL_UART0; +} + static void tt_atlantis_soc_init(Object *obj) { TTAtlantisSoCState *s = TT_ATLANTIS_SOC(obj); object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); - object_initialize_child(obj, "uart1", &s->uart1, TYPE_DW8250); + for (int i = 0; i < TT_ATL_NUM_UARTS; i++) { + object_initialize_child(obj, "uart[*]", &s->uart[i], + TYPE_DW8250); + } object_initialize_child(obj, "prcm-rcpu", &s->prcm[TT_ATLANTIS_PRCM_DOMAIN_RCPU], @@ -682,13 +694,21 @@ static void tt_atlantis_soc_realize(DeviceState *dev, Error **errp) SYS_BUS_DEVICE(&s->prcm[TT_ATLANTIS_PRCM_DOMAIN_MM]), 0)); /* UART1, the soc console (UART0 is for the boot microcontroller) */ - qdev_prop_set_chr(DEVICE(&s->uart1), "chardev", serial_hd(0)); - sysbus_realize(SYS_BUS_DEVICE(&s->uart1), &error_fatal); - memory_region_add_subregion(s->memory, - s->memmap[TT_ATL_UART1].base, - sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart1), 0)); - sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart1), 0, - qdev_get_gpio_in(s->irqchip, TT_ATL_UART1_IRQ)); + qdev_prop_set_chr(DEVICE(&s->uart[tt_atlantis_uart_index(TT_ATL_UART1)]), + "chardev", serial_hd(0)); + + for (int i = 0; i < TT_ATL_NUM_UARTS; i++) { + SysBusDevice *sbd = SYS_BUS_DEVICE(&s->uart[i]); + if (!sysbus_realize(sbd, errp)) { + return; + } + + memory_region_add_subregion(s->memory, + s->memmap[TT_ATL_UART0 + i].base, + sysbus_mmio_get_region(sbd, 0)); + sysbus_connect_irq(sbd, 0, + qdev_get_gpio_in(s->irqchip, TT_ATL_UART0_IRQ + i)); + } /* I2C */ for (int i = 0; i < TT_ATL_NUM_I2C; i++) { -- 2.55.0
