This updates the Atlantis documentation to include new machine properties for running the RCPU.
Signed-off-by: Portia Stephens <[email protected]> --- docs/system/gdb.rst | 2 ++ docs/system/riscv/tt_atlantis.rst | 46 +++++++++++++++++++++++++++++-- 2 files changed, 46 insertions(+), 2 deletions(-) diff --git a/docs/system/gdb.rst b/docs/system/gdb.rst index b6d8f8e77d..3777630337 100644 --- a/docs/system/gdb.rst +++ b/docs/system/gdb.rst @@ -79,6 +79,8 @@ debug some interaction between kernel and user-space you are better off running your guest program with gdb either in the guest or using a gdbserver exposed via a port to the outside world. +.. _GDB multicore: + Debugging multicore machines ============================ diff --git a/docs/system/riscv/tt_atlantis.rst b/docs/system/riscv/tt_atlantis.rst index d94d064f4f..533b41928b 100644 --- a/docs/system/riscv/tt_atlantis.rst +++ b/docs/system/riscv/tt_atlantis.rst @@ -12,10 +12,38 @@ tt-atlantis QEMU model features ------------------------------- * 8-core Ascalon-X CPU Cluster +* RV32 Real-time CPU (RCPU) * RISC-V compliant Advanced Interrupt Architecture * DW8250 compatible UART x5 * 4 PRCMs (Clock and Reset Controllers) +Boot options +------------ + +* ``rcpu`` enables the RCPU model to run alongside the Ascalon cluster and is + disabled by default. When the RCPU is enabled, ``UART0``, the RCPU's console, + will be mapped to the second -serial on the command line. +* ``bootrom`` binary to be loaded into mask ROM and run by the RCPU (no effect if the + rcpu is not enabled). If no bootrom is provided the RCPU will not be powered on. + +To enable the RCPU model with a custom binary and the RCPU console on stdio: + +.. code-block:: bash + + -M tt-atlantis,rcpu=on,bootrom=../path/to/binary.bin -serial null -serial stdio + +* ``-smp cpus=`` The smp cpu field includes the RCPU count. When rcpu=on, the + number of Ascalon harts created is smp.cpus - 1. When rcpu=off, the number + of Ascalon harts created is smp.cpus. + +To run with only one Ascalon hart and no RCPU: + +.. code-block:: bash + + -M tt-atlantis,rcpu=off -smp cpus=1 + + + Known limitations ----------------- @@ -25,8 +53,9 @@ real platform. Notably: * There is no PCI host bridge, so virtio-pci devices cannot be attached. Boots that need block storage must use ``-initrd`` with an initramfs. -* The Atlantis platform has 5 UARTs but only ``UART1`` is currently exposed - on the command line serial interface. ``UART1`` is the Ascalon console. +* The Atlantis platform has 5 UARTs but only ``UART1`` and, optionally, + ``UART0`` are currently exposed on the command line serial interface. + ``UART1`` is the Ascalon console and ``UART0`` is the RCPU console. Supported software ------------------ @@ -39,3 +68,16 @@ and Linux with default configurations. The development board hardware will require some implementation specific setup in firmware which is being developed and may become a requirement or option for the tt-atlantis machine. + +Debugging +---------- + +Ascalon and RCPU are on separate CPUClusters which allows gdb to put Ascalon +and RCPU on separate inferiors. This prevents issues with switching between +RV32 (RCPU) and RV64 (Ascalon) targets. + +By default, gdb will connect to inferior 1, the Ascalon cluster and the RCPU +will be on inferior 2. + +gdb does not handle multiple inferiors by default, see :ref:`gdb multicore` +for how to connect to inferior 2. -- 2.43.0
