On Mon, 2013-08-12 at 10:45 +0100, Peter Maydell wrote: > On 12 August 2013 10:43, Benjamin Herrenschmidt > <b...@kernel.crashing.org> wrote: > > On Mon, 2013-08-12 at 10:39 +0100, Peter Maydell wrote: > >> ARM doesn't -- I wouldn't expect changing the endianness of > >> exceptions via writing to the SCTLR to trap to the hypervisor > >> (and in any case it certainly won't result in a return to > >> userspace). > > > > But don't you need to reconfigure the bridge (as per our previous > > discussion) ? In that case you do need to call out to qemu ... > > Bridge? You've lost me, I'm afraid.
I must be confused ... you mentioned in a previous discussion around endianness that on some ARM cores at least, when changing the OS endianness, you had to configure a different lane swapping in the bridge to the the IO devices (AXI ?) But I might be confusing with something else. Ben.
