On Tue, May 6, 2014 at 4:08 PM, Edgar E. Iglesias <edgar.igles...@gmail.com> wrote: > From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com> > > Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> > --- > target-arm/translate-a64.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c > index b62db4d..4f8246f 100644 > --- a/target-arm/translate-a64.c > +++ b/target-arm/translate-a64.c > @@ -137,8 +137,10 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, > cpu_fprintf(f, " "); > } > } > - cpu_fprintf(f, "PSTATE=%08x (flags %c%c%c%c)\n", > + cpu_fprintf(f, "PSTATE=%08x (flags %c%c%c%c%c%c)\n",
Should delimit (just a space I think) between DAIF and NZCV components. ARM ARM repeatedly refers to these two groups of four as single item suggesting they are two logical groupings of 4 bits each. > psr, > + psr & PSTATE_A ? 'A' : '-', > + psr & PSTATE_I ? 'I' : '-', And should the full DAIF be added for completeness? Regards, Peter > psr & PSTATE_N ? 'N' : '-', > psr & PSTATE_Z ? 'Z' : '-', > psr & PSTATE_C ? 'C' : '-', > -- > 1.8.3.2 > >
