Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1475316333-9776-1-git-send-email-atar4q...@gmail.com
Subject: [Qemu-devel] [PATCH 00/29] target-sparc: add Niagara OpenSPARC T1
sun4v emulation
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git show --no-patch --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag]
patchew/1475316333-9776-1-git-send-email-atar4q...@gmail.com ->
patchew/1475316333-9776-1-git-send-email-atar4q...@gmail.com
- [tag update] patchew/20160930233927.GA5887@nyan ->
patchew/20160930233927.GA5887@nyan
Switched to a new branch 'test'
c17b250 target-sparc: fix up Niagara machine
02c9695 target-sparc: move common cpu initialisation routines to sparc64.c
eba1f7f target-sparc: implement sun4v RTC
6dd0663 target-sparc: store the UA2005 entries in sun4u format
211748f target-sparc: implement UA2005 ASI_MMU (0x21)
edb2a07 target-sparc: add more registers to dump_mmu
32c8abd target-sparc: implement ST_BLKINIT_ ASIs
f40c298 target-sparc: implement auto-demapping for UA2005 CPUs
86314ed target-sparc: allow 256M sized pages
ca17811 target-sparc: simplify ultrasparc_tsb_pointer
6837140 target-sparc: implement UA2005 TSB Pointers
53e1f54 target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs
8060eb3 target-sparc: replace the last tlb entry when no free entries left
6256e3c target-sparc: ignore writes to UA2005 CPU mondo queue register
7c80032 target-sparc: allow priveleged ASIs in hyperprivileged mode
daa968e target-sparc: use direct address translation in hyperprivileged mode
d5de2f8 target-sparc: fix immediate UA2005 traps
35ad841 target-sparc: implement UA2005 rdhpstate and wrhpstate instructions
6306606 target-sparc: implement UA2005 GL register
3bc6990 target-sparc: implement UA2005 hypervisor traps
cb87df5 target-sparc: hypervisor mode takes over nucleus mode
ff77431 target-sparc: implement UltraSPARC-T1 Strand status ASR
3d702bc target-sparc: implement UA2005 scratchpad registers
6661917 target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE
f849de9 target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in
hypervisor mode
06ed09a target-sparc: add UltraSPARC T1 TLB #defines
752963e target-sparc: add UA2005 TTE bit #defines
cfbb0e2 target-sparc: use explicit mmu register pointers
3bc8bcd target-sparc: don't trap on MMU-fault if MMU is disabled
=== OUTPUT BEGIN ===
Checking PATCH 1/29: target-sparc: don't trap on MMU-fault if MMU is disabled...
Checking PATCH 2/29: target-sparc: use explicit mmu register pointers...
Checking PATCH 3/29: target-sparc: add UA2005 TTE bit #defines...
Checking PATCH 4/29: target-sparc: add UltraSPARC T1 TLB #defines...
Checking PATCH 5/29: target-sparc: on UA2005 don't deliver Interrupt_level_n
IRQs in hypervisor mode...
Checking PATCH 6/29: target-sparc: simplify replace_tlb_entry by using
TTE_PGSIZE...
Checking PATCH 7/29: target-sparc: implement UA2005 scratchpad registers...
ERROR: code indent should never use tabs
#17: FILE: target-sparc/asi.h:214:
+#define ASI_HYP_SCRATCHPAD^I0x4f /* (4V) Hypervisor scratchpad^I*/$
total: 1 errors, 0 warnings, 60 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 8/29: target-sparc: implement UltraSPARC-T1 Strand status ASR...
Checking PATCH 9/29: target-sparc: hypervisor mode takes over nucleus mode...
Checking PATCH 10/29: target-sparc: implement UA2005 hypervisor traps...
Checking PATCH 11/29: target-sparc: implement UA2005 GL register...
Checking PATCH 12/29: target-sparc: implement UA2005 rdhpstate and wrhpstate
instructions...
Checking PATCH 13/29: target-sparc: fix immediate UA2005 traps...
Checking PATCH 14/29: target-sparc: use direct address translation in
hyperprivileged mode...
Checking PATCH 15/29: target-sparc: allow priveleged ASIs in hyperprivileged
mode...
Checking PATCH 16/29: target-sparc: ignore writes to UA2005 CPU mondo queue
register...
Checking PATCH 17/29: target-sparc: replace the last tlb entry when no free
entries left...
Checking PATCH 18/29: target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs...
Checking PATCH 19/29: target-sparc: implement UA2005 TSB Pointers...
Checking PATCH 20/29: target-sparc: simplify ultrasparc_tsb_pointer...
Checking PATCH 21/29: target-sparc: allow 256M sized pages...
Checking PATCH 22/29: target-sparc: implement auto-demapping for UA2005 CPUs...
Checking PATCH 23/29: target-sparc: implement ST_BLKINIT_ ASIs...
Checking PATCH 24/29: target-sparc: add more registers to dump_mmu...
Checking PATCH 25/29: target-sparc: implement UA2005 ASI_MMU (0x21)...
Checking PATCH 26/29: target-sparc: store the UA2005 entries in sun4u format...
ERROR: suspect code indent for conditional statements (6, 10)
#88: FILE: target-sparc/ldst_helper.c:2184:
+ if (!(addr & TLB_UST1_IS_REAL_BIT)) {
+ replace_tlb_1bit_lru(env->dtlb, env->dmmu.tag_access,
total: 1 errors, 0 warnings, 84 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 27/29: target-sparc: implement sun4v RTC...
ERROR: do not use C99 // comments
#59: FILE: hw/timer/sun4v-rtc.c:18:
+//#define DEBUG_SUN4V_RTC
total: 1 errors, 0 warnings, 121 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 28/29: target-sparc: move common cpu initialisation routines to
sparc64.c...
ERROR: do not use C99 // comments
#55: FILE: hw/sparc64/sparc64.c:33:
+//#define DEBUG_IRQ
ERROR: do not use C99 // comments
#56: FILE: hw/sparc64/sparc64.c:34:
+//#define DEBUG_TIMER
total: 2 errors, 0 warnings, 800 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 29/29: target-sparc: fix up Niagara machine...
=== OUTPUT END ===
Test command exited with code: 1
---
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