On 6/25/20 2:12 PM, Lijun Pan wrote: > Do you mean not submiting the second patch until all the instructions are > enabled in the future?
Well, I mean not *merging* the second patch until all of the instructions are enabled. r~
- [PATCH v3 0/8] Add several Power ISA 3.1 32/64-bit vecto... Lijun Pan
- [PATCH v3 1/8] target/ppc: Introduce Power ISA 3.1 ... Lijun Pan
- Re: [PATCH v3 1/8] target/ppc: Introduce Power ... Richard Henderson
- Re: [PATCH v3 1/8] target/ppc: Introduce Po... Lijun Pan
- Re: [PATCH v3 1/8] target/ppc: Introduc... Richard Henderson
- [PATCH v3 4/8] target/ppc: add vmulld instruction Lijun Pan
- Re: [PATCH v3 4/8] target/ppc: add vmulld instr... Richard Henderson
- Re: [PATCH v3 4/8] target/ppc: add vmulld i... Lijun Pan
- Re: [PATCH v3 4/8] target/ppc: add vmul... Richard Henderson
- [PATCH v3 8/8] target/ppc: add vdiv{su}{wd} vmod{su... Lijun Pan
- Re: [PATCH v3 8/8] target/ppc: add vdiv{su}{wd}... Richard Henderson
- Re: [PATCH v3 8/8] target/ppc: add vdiv{su}... Lijun Pan
- Re: [PATCH v3 8/8] target/ppc: add vdiv... Richard Henderson
- Re: [PATCH v3 8/8] target/ppc: add... David Gibson
- [PATCH v3 6/8] fix the prototype of muls64/mulu64 Lijun Pan
