On Thu, Dec 30, 2021 at 10:32 PM liweiwei <liwei...@iscas.ac.cn> wrote: > > Signed-off-by: liweiwei <liwei...@iscas.ac.cn> > Signed-off-by: wangjunqiang <wangjunqi...@iscas.ac.cn>
nits: looks like the best practice of the name is: Weiwei Li and Junqiang Wang > Acked-by: Alistair Francis <alistair.fran...@wdc.com> > --- > target/riscv/cpu.c | 23 +++++++++++++++++++++++ > target/riscv/cpu.h | 13 +++++++++++++ > 2 files changed, 36 insertions(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 6ef3314bce..961c5f4334 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -491,6 +491,29 @@ static void riscv_cpu_realize(DeviceState *dev, Error > **errp) > cpu->cfg.ext_d = true; > } > > + if (cpu->cfg.ext_zk) { > + cpu->cfg.ext_zkn = true; > + cpu->cfg.ext_zkr = true; > + cpu->cfg.ext_zkt = true; > + } > + > + if (cpu->cfg.ext_zkn) { > + cpu->cfg.ext_zbkb = true; > + cpu->cfg.ext_zbkc = true; > + cpu->cfg.ext_zbkx = true; > + cpu->cfg.ext_zkne = true; > + cpu->cfg.ext_zknd = true; > + cpu->cfg.ext_zknh = true; > + } > + > + if (cpu->cfg.ext_zks) { > + cpu->cfg.ext_zbkb = true; > + cpu->cfg.ext_zbkc = true; > + cpu->cfg.ext_zbkx = true; > + cpu->cfg.ext_zksed = true; > + cpu->cfg.ext_zksh = true; > + } > + > /* Set the ISA extensions, checks should have happened above */ > if (cpu->cfg.ext_i) { > ext |= RVI; > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index dc10f27093..edca7118ff 100644 > --- a/target/riscv/cpu.h > +++ b/target/riscv/cpu.h > @@ -311,7 +311,20 @@ struct RISCVCPU { > bool ext_zba; > bool ext_zbb; > bool ext_zbc; > + bool ext_zbkb; > + bool ext_zbkc; > + bool ext_zbkx; > bool ext_zbs; > + bool ext_zk; > + bool ext_zkn; > + bool ext_zknd; > + bool ext_zkne; > + bool ext_zknh; > + bool ext_zkr; > + bool ext_zks; > + bool ext_zksed; > + bool ext_zksh; > + bool ext_zkt; > bool ext_counters; > bool ext_ifencei; > bool ext_icsr; > -- Regards, Bin