On 9/6/22 13:22, Christoph Muellner wrote:
+ DEFINE_CPU(TYPE_RISCV_CPU_THEAD_C906, rv64_thead_c906_cpu_init), + DEFINE_CPU(TYPE_RISCV_CPU_THEAD_C910, rv64_thead_c906_cpu_init),
Why model both if they're identical? r~
- [PATCH 00/11] Add support for the T-Head vendor extensi... Christoph Muellner
- [PATCH 07/11] RISC-V: Adding T-Head XMAE support Christoph Muellner
- [PATCH 11/11] RISC-V: Add initial support for T-He... Christoph Muellner
- Re: [PATCH 11/11] RISC-V: Add initial support ... Richard Henderson
- Re: [PATCH 11/11] RISC-V: Add initial supp... Christoph Müllner
- Re: [PATCH 11/11] RISC-V: Add initial ... Richard Henderson
- Re: [PATCH 11/11] RISC-V: Add ini... Christoph Müllner
- [PATCH 01/11] riscv: Add privilege level to DisasC... Christoph Muellner
- Re: [PATCH 01/11] riscv: Add privilege level t... LIU Zhiwei
- Re: [PATCH 01/11] riscv: Add privilege level t... Richard Henderson
- Re: [PATCH 01/11] riscv: Add privilege lev... Richard Henderson
- Re: [PATCH 01/11] riscv: Add privilege lev... LIU Zhiwei
- [PATCH 03/11] RISC-V: Adding T-Head SYNC instructi... Christoph Muellner
- Re: [PATCH 03/11] RISC-V: Adding T-Head SYNC i... Richard Henderson
