Rob wrote:
Hal Murray <hal-use...@ip-64-139-1-69.sjc.megapath.net> wrote:
The serial chip does not do that. It will send the interrupt at the
time it has assembled a full character.
Some of the serial chips have large FIFOs and wait until the FIFO
has several characters and/or there is no activity for a while.
The idea is to save CPU cycles by batching interrupts.
Yes this makes it even worse.
But I was reacting on the posting where it was suggested that this
FIFO can be turned off and then an interrupt could be sent at the
beginning of the startbit.
The FIFO can be turned off (is off by default) on 16550s. The basic
UART algorithm is:
Sample at 16 times baud rate.
On detecting a space, resample in 8 (maybe 7) clocks. If still space,
start assembling character.
Sample every 16 clocks until middle of stop bit.
Interrrupt with either good or framing error status, depending whether
the last sample is mark or space.
That means that for most of the time, the peak to peak receive jitter is
1/(16 * baud rate).
There will also be a jitter of this amount at the transmitter, as it
will start transmitting the next clock after the buffer is loaded.
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