> > I have read a fair amount of the literature on RTLinux available on the web
> > site and it seems to me that the major problem with using RTLinux would be its
> > interrupt latency. From the literature it seems that the worst case interrupt
> > latency can be as high as 15 to 20 us - this is a large amount of the
> > available 100 us and would be a major problem.
> >
> > I would imagine that this interrupt latency is solely caused by the amount of
> > time required to switch contexts - i.e. push all the registers etc.
>
> Good guess, but that's not right. The major factor is purely motherboard
> hardware. We have not measured recently on a good non-ISA SBC, but my
> prediction is that it would be quite fast.
> In fact, we really will measure on a embedded PPC750 and MIPS 7000
> soon and perhaps other people can also run some numbers.
>
> (we have measured 12us for a single ISA bus access !)
Thank you Victor for your comments.
My aim is to produce a number of boards for medium- to high-end embedded
system development using a number of simple tools. The programmes running
on the targets would include dedicated embedded systems (i.e. resources
limited and therefore not running RTLinux), as well as larger embedded
systems running RTLinux.
The tools would be gcc as the cross-compiler and gdb as the debugger. The
use of these tools will keep the cost of a whole embedded development
environment down considerably with a base system costing as little as a few
hundred dollars ready to go. I have been told that using gcc will reduce
the efficiency of the embedded system (these comments have come from
compiler developers). I'd be interested in your opinion of using gcc as
the cross-compiler. There may be some work to do getting gcc and gdb
interfaced to the embedded hardware (ROMs etc) - I will consider
contributing the developments I make to the gnu/RTLinux community.
I have in mind to keep everything on the single board, or possibly two
boards stacked on top of each other, with data going between the boards
using some short header cables. The boards will include provision for a
number of A/D converters, much digital I/O, as well as a hard-disk
controller (probably EIDE) and an ethernet - the final user can insert the
chips and hard-disk as desired.
The idea of having everything on one board is to reduce latency and the
complexity of ISA or PCI buses. Also I aim to reduce the delay getting
data from the A/Ds normally experienced. A ROM will be used to boot the
system.
So I'm interested in the limitations of processors themselves, not the
motherboards. I'm yet to design the hardware, but the processors chosen
should be appropriate. I'm limited to processors for which gcc and gdb has
been ported. Initially I could start with Intel PII processors, but I
would like to consider others, such as MIPS and StrongARM and possibly PPC.
Ideally I would like to use low-power processors without fans so the
systems could be physically embedded wherever necessary.
All comments welcome.
--
Andrew Tuckey
Postdoctoral Research Scientist
Eindhoven University of Technology
EE Dept., Group EMV, Room EL 1.13
PO Box 513 Phone: +31 - 40 2 47 3895
5600 MB EINDHOVEN Fax: +31 - 40 2 43 4364
The Netherlands. Email: [EMAIL PROTECTED]
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