Mon, 03 Jul 2000 [EMAIL PROTECTED] wrote:
[...]
> I have been told that using gcc will reduce
> the efficiency of the embedded system (these comments have come from
> compiler developers).
AFAIK, this depends on the target architecture. gcc was designed for real CPUs
with lots of generic (=usable!) registers, while the x86 architecture is
severely crippled with it's 8 halfway generic regs, especially from the compiler
POV. It's not all that bad really, and you can help the compiler a little
by avoiding constructs that need more temporary variables than there are regs
(ie x86 C source optimization), but there are compilers that generate faster
code for the x86.
> I'd be interested in your opinion of using gcc as
> the cross-compiler.
Makes sense IMHO, since you can build the compiler for almost anything,
targetting any of the supported architectures. As to embedded systems
(especially with custom designs), there's probably some work to get a usable
target environment together (object file loading/ROM image building, bootstrap
etc), but there should hardly be a problem finding a suitable host/development
platform to get started. It's also nice that users get a chance to chose their
favourite host platform, rather than being forced to use binary-only tools
from a single vendor. (As an example, I have some C51 hardware and some 24
MHz Atmel chips lying around, but the tools being available for Windoze only
kind of lowers my motivation to do something fun...)
[...]
> The idea of having everything on one board is to reduce latency and the
> complexity of ISA or PCI buses. Also I aim to reduce the delay getting
> data from the A/Ds normally experienced. A ROM will be used to boot the
> system.
Are you going to use some kind of local bus construct for the stuff that's
normally on the ISA, or is the ISA going to run out of spec? The latter seems
easier as standard chipset parts can be used, but it's asking for trouble if
the "turbo-ISA" is exposed on some bus where people can connect standard
stuff. I've had trouble with some old ISA boards and the modern PCs that
overclock the ISA by default (to speed up the on-board ISA stuff, I guess), so
this problem seems rather real to me...
> So I'm interested in the limitations of processors themselves, not the
> motherboards. I'm yet to design the hardware, but the processors chosen
> should be appropriate. I'm limited to processors for which gcc and gdb has
> been ported. Initially I could start with Intel PII processors, but I
> would like to consider others, such as MIPS and StrongARM and possibly PPC.
> Ideally I would like to use low-power processors without fans so the
> systems could be physically embedded wherever necessary.
I think you should forget about PII and use Celeron or Coppermine-PIII
(if you need that much speed) instead, as the PII has an off-chip L2 cache
running at 1/2 CPU core clock while the Celeron and Coppermine CPUs have an
on-die, full speed L2 cache. The difference in latency is big enough to be
clearly noticable in RTL, and it's even been observed that Celeron beats higher
clocked PII's on latency with Linux/lowlatency.
BTW, Celeron performs about the same as a PII on the same clock in average
applications. It's usually faster on things like running audio plugins in real
time applications, and slower where the 512 kB (vs 128 kB) cache size of the
PII starts to pay off.
In both respects (latency and raw performance), the difference should be
smaller with faster RAM (PC100 or PC133 SDRAM) and chipsets, but I'm not sure
how well the PII can take advantage of that.
Unfortunately, I don't have hands-on experience with the late non-x86 hardware,
so I can't help much there. My personal interest is in the PPC G4, as I'm
looking for more SIMD power (AltiVec) for real time audio processing, while the
biggest problem at work is physical limitations of an AC motor and a noisy
sensor, rather than IRQ latency...
David Olofson
Programmer
Reologica Instruments AB
[EMAIL PROTECTED]
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