Re: [casper] ROACH1 serial to USB connection
Hi Jason Its really no problem. I used the steps that you have send me with a ST-link V2 J-TAG (It is almost like the USB wiggler). I can open up a serail connection with Hyperterminal and open up an connection with the OCD Commander. Once i run the Macro I get the following error: Write large: processor running (40:0C) and An error occured during the execution of your Marco file. Exit Marco execution now? and then nothing happens. Thanks for your help!! Heystek On Fri, Mar 31, 2017 at 9:27 PM, Jason Ray wrote: > Heystek, > > Sorry for the delay in replying. > > I'm not sure about the converter script. Every time I've debricked a > roach, I used our USB wiggler, and followed these steps: > http://www2.asiaa.sinica.edu.tw/~homin/wiki/pmwiki-2.1.27/ > uploads/HiSpeedDigital/fileHow_to_update_uboot_file_ > if_ROACH_cannot_bootup.pdf > > And, this procedure as well... > https://casper.berkeley.edu/wiki/ROACH_kernel_uboot_update > > Hope this helps, > Jason > > > > On 3/29/2017 8:45 AM, Heystek Grobler wrote: > > Hi Jason > > I got my hands on a JTAG. I went through the CASPER debricking tutorial > page but I dont understand how to use the converter script? Do you perhaps > know how to use it? > > Thanks for all of your help > > Heystek > > On Mon, Mar 27, 2017 at 11:54 AM, Heystek Grobler < > heystekgrob...@gmail.com> wrote: > >> Hi Jason >> >> Yes, all flow control is off. both the (Xon/Xoff or DC1/DC3) is off. >> >> On Mon, Mar 27, 2017 at 11:32 AM, Jason Manley wrote: >> >>> You've checked that hardware flow control is turned off on your serial >>> port? >>> >>> Jason >>> >>> >>> On 27 Mar 2017, at 11:29, Heystek Grobler >>> wrote: >>> >>> > Hi Jason >>> > >>> > The ROACH1 is a brand new board that we just unboxed. I tried >>> connecing to it using two diffirent serial to usb cables and both gave the >>> same result, a connection to the board, but the terminal only displays a >>> black screen. No Uboot sequence or any kind of output. >>> > >>> > I will double check by shorting pins 2 & 3 and see if I get anyyhing >>> on the terminal. >>> > >>> > If I am right if I say I think that the roach might be bricked? >>> > >>> > Thanks for all the help >>> > >>> > Heystek >>> > >>> > On Wed, Mar 22, 2017 at 9:23 PM, Jason Ray wrote: >>> > Heystek, >>> > >>> > Is this a known good roach1 board? Could it have been bricked by >>> chance? If so it will behave like you describe and you may need to do this: >>> > >>> > https://casper.berkeley.edu/wiki/ROACH_Debricking >>> > >>> > Another thing you can try if you haven't already is to swap pins 2 & >>> 3. Even if you have a null modem cable, something else could be going on >>> (with the adapter perhaps.?) and it never hurts to just swap 2 & 3 and give >>> it another try. >>> > >>> > Also, a simple thing you can do to verify your serial adapter is >>> working is to do a loopback, short pins 2 & 3 together, then type something >>> in the terminal and see if it displays on the screen. >>> > >>> > Good luck, >>> > Jason >>> > >>> > >>> > >>> > >>> > On 3/22/2017 3:08 PM, Heystek Grobler wrote: >>> >> Hi >>> >> >>> >> When I use dev/tty* I can see the adapter. This is the adapter Im >>> using >>> >> >>> >> https://www.unitek-products.com/en/product_detail.php?id=12 >>> >> >>> >> >>> >> On Wed, 22 Mar 2017 at 9:05 PM Jack Hickish >>> wrote: >>> >> H. And the adapter definitely works? >>> >> >>> >> Sorry, I think you're going to need someone smarter than me. >>> >> >>> >> On Wed, 22 Mar 2017 at 11:06 Heystek Grobler < >>> heystekgrob...@gmail.com> wrote: >>> >> Hi Jack >>> >> >>> >> Jip it is the null-modem type with the 9 pins. If I open up an >>> terminal connection through putty or minicom I can open up an connection >>> with the 115200 8N1 settings, but I cant see Uboot. I can only see 'n blank >>> terminal window. >>> >> >>> >> >>> >> On Wed, 22 Mar 2017 at 7:24 PM Jack Hickish >>> wrote: >>> >> Hi Heystek, >>> >> >>> >> Just to be clear, you're connecting to the 9 pin serial connector on >>> the ROACH (not the USB port)? >>> >> If you're using a serial cable between the ROACH and your USB >>> adapter, is it the correct null-modem type? >>> >> Do you have the correct comms settings? -- roach1 is 115200 8N1 >>> >> >>> >> Some info which might help is at https://casper.berkeley.edu/wi >>> ki/ROACH_NFS_guide#Preliminary_setup_1:_The_serial_connection >>> >> >>> >> Cheers >>> >> Jack >>> >> >>> >> On Wed, 22 Mar 2017 at 05:39 Heystek Grobler < >>> heystekgrob...@gmail.com> wrote: >>> >> Good day everyone >>> >> >>> >> I am trying to connect to a ROACH1 board with a serial to usb cable. >>> I have tried the connection through putty and minicom. I can open up a >>> serial connection but I can not see the U-Boot loader kicking in and watch >>> the start up sequence. I also have ROACH2 and I can see U-Boot and the >>> start up sequence fine in it with a USB cable. >>> >> >>> >> Do you perhaps know what the problem could be that I am not getting >>> is right
Re: [casper] Re: Can't open tut3
Hello again I already updated the blocks, but now I have the following error - Version Log -- Version Path System Generator/opt/Xilinx/14.7/ISE_DS/ISE/sysgen Matlab 8.1.0.604 (R2013a) /usr/local/MATLAB/R2013a ISE /opt/Xilinx/14.7/ISE_DS/ISE roach@roach-System-Product-Name:~/Descargas$ cat tut3_sysgen_error.log - Version Log -- Version Path System Generator/opt/Xilinx/14.7/ISE_DS/ISE/sysgen Matlab 8.1.0.604 (R2013a) /usr/local/MATLAB/R2013a ISE /opt/Xilinx/14.7/ISE_DS/ISE Summary of Errors: Error 0001: caught standard exception Block: Unspecified Error 0001: Reported by: Unspecified Details: standard exception: XNetlistEngine: Exception message could not be parsed: com.xilinx.sysgen.netlist.NetlistInternal: couldn't open first pass text file at /home/roach/Descargas/tut3/sysgen/sysgen/masterScript6463651374861082265.pl line 16481' --- My sh interpreter points to bash (sh ->bash), any idea? Also I have sh.distrib->bash Can this be affecting in any way? I am really grateful for the help Regards Claudio 2017-03-29 17:01 GMT-03:00 Paulina : > Parece que tenemos harta pega para el sábado pero veo factible que > podasmos arreglar las librerías del tut3 para trabajar ahí el sábado > cachamos > Saludos. > > > > El 29-03-2017, a las 12:22, Jack Hickish escribió: > > Hi Claudio, > > This is a classic problem -- the library version you are using is not > compatible with the version the tutorials were designed in. The particular > error you have can be solved by deleting the XSG yellow block and pulling a > new one from the library (I believe it is now called XSG_core_config, > without spaces(!)). In fact, deleting and replacing problematic blocks > fixes a wealth of strange Simulink errors. > > Having fixed the XSG block, you might find that you run into similar > problems with other blocks. In this case there are two options -- > 1. Figure out what version of mlib_devel the tutorial was made with -- if > you're lucky the author will have put this information on the tutorials > wiki page. > 2. Update all the blocks in the model to their latest versions. There is > an automated script to do this. After opening the model, from the MATLAB > prompt run "update_casper_blocks(bdroot)". bdroot -- block diagram root > -- is a shortcut to the top level of your model, this script will recurse > through all your blocks and replace all casper blocks with their most > up-to-date versions from your copy of the mlib_devel library. > > In future (at the next workshop) I would suggest we maintain an mlib_devel > git submodule in the tutorials repository, so it's easy to build them > against the correct library version. > > Cheers > Jack > > On Wed, 29 Mar 2017 at 08:52 Claudio Rivera > wrote: > >> Hi everyone, thanks you for your comments. >> I have installed matlab 2013a, and tut3.slx was oppened, but when I >> compile it (run xps) I get the following error >> - >> Failed to find 'XSG core config' in library 'xps_library' referenced by >> 'tut3/XSG >> core config' >> - >> So I'm working in it. >> With respect to tut3.mdl, it shows the same error >> >> 2017-03-27 5:54 GMT-03:00 Wesley New : >> >> Hi Claudio, >> >> 2012b does not support the newer slx file format. Try using an older >> version of the tutorials with an mdl file. >> >> You can try the mdl files from this commit: https://github.com/ >> casper-astro/tutorials_devel/tree/c195b501f67c4f2a4f051f258453e0 >> 751f9825fa/tut3 >> >> Wesley New >> South African SKA Project >> +2721 506 7300 <+27%2021%20506%207300> >> www.ska.ac.za >> >> >> >> On Sat, Mar 25, 2017 at 4:49 PM, Claudio Rivera < >> claudio14riv...@gmail.com> wrote: >> >> Hi everyone >> It would be great if you could help me with this problem... >> I just install matlab r2012a and xilinx 14.7 (design suite: system >> edition), the license of xilinx was "vivado design suite no ise", (in >> ubuntu 12.04, 64 bit), I download the mlib_devel_master from casper and >> create the startsg.local file with the following path >> >> #!/bin/bash >> export MATLAB_PATH=/usr/local/MATLAB/R2012a >> export XILINX_PATH=/opt/Xilinx/14.7/ISE_DS >> export XILINX_PLATFORM=lin64 >> export MLIB_DEVEL_PATH=/home/roach/Casper/mlib_devel-master >> >> >> >> Then, in matlab I start simulink, and when I try to open tut3.slx, it >> stays stuck. >> Any idea? >> >> 2017-03-25 11:41 GMT-03:00 Claudio Rivera : >> >> Hi everyone >> It would be great if you could h
[casper] Minimum Clock Frequency (ROACH2)
Hi All, I'm working in an application where I need high frequency resolution (~10kHz). For my model this means I need to run my ADC at ~40MHz (and the FPGA at 5MHz). I'm not using an special memory block, just brams. I'm using ROACH2, and ADC5G (https://casper.berkeley.edu/wiki/ADC1x5000-8). It is possible to run the ADC at such low frequency? What is the minimum acceptable frequency? I tried to find this information in the ADC datasheet, but I haven't been successful. Also tried compiling simple models at low frequencies, but everything below 600MHz failed. Thanks, Franco -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
Re: [casper] Minimum Clock Frequency (ROACH2)
Hi Franco, I don't know the low frequency limit, but for what it's worth, you could always run the adc at 320 MHz and just use 1 of the 8 outputs, which also has the benefit of avoiding and inter-core mismatch issues, since you'd effectively only be using 1 core. Or run faster and only use every Nth sample. What error do you get when you clock below 600 MHz ADC clock? Cheers Jack On Mon, 3 Apr 2017, 19:22 Franco, wrote: > Hi All, > > I'm working in an application where I need high frequency resolution > (~10kHz). For my model this means I need to run my ADC at ~40MHz (and the > FPGA at 5MHz). I'm not using an special memory block, just brams. I'm using > ROACH2, and ADC5G (https://casper.berkeley.edu/wiki/ADC1x5000-8). It is > possible to run the ADC at such low frequency? What is the minimum > acceptable frequency? I tried to find this information in the ADC > datasheet, but I haven't been successful. Also tried compiling simple > models at low frequencies, but everything below 600MHz failed. > > Thanks, > > Franco > > > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
Re: [casper] Minimum Clock Frequency (ROACH2)
Hey Franco Many of the CASPER blocks were updated a while ago so that you can use them asynchronously i.e data does not need to be fed to the blocks on every clock cycle. You can then run your FPGA at a higher clock rate than the input data rate. Regards Andrew On Tue, Apr 4, 2017 at 4:22 AM, Franco wrote: > Hi All, > > I'm working in an application where I need high frequency resolution > (~10kHz). For my model this means I need to run my ADC at ~40MHz (and the > FPGA at 5MHz). I'm not using an special memory block, just brams. I'm using > ROACH2, and ADC5G (https://casper.berkeley.edu/wiki/ADC1x5000-8). It is > possible to run the ADC at such low frequency? What is the minimum > acceptable frequency? I tried to find this information in the ADC > datasheet, but I haven't been successful. Also tried compiling simple > models at low frequencies, but everything below 600MHz failed. > > Thanks, > > Franco > > > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
