[OpenOCD-devel] pic32mx220f032b better flash support
Hello I have made same minor changes to make a better support for flashing a pic32mx220f032b chip. This chip has 3k boot flash, 32k program flash an 8k ram. Page size is 1k bytes or 256 words. Row size is 128 bytes or 32 words. The modifications were made in src/flash/nor/pic32mx.c The output of diff: 53,56c53,56 < #define PIC32MX_DEVCFG0 0xBFC02FFC < #define PIC32MX_DEVCFG1 0xBFC02FF8 < #define PIC32MX_DEVCFG2 0xBFC02FF4 < #define PIC32MX_DEVCFG3 0xBFC02FF0 --- > #define PIC32MX_DEVCFG0 0xBFC00BFC > #define PIC32MX_DEVCFG1 0xBFC00BF8 > #define PIC32MX_DEVCFG2 0xBFC00BF4 > #define PIC32MX_DEVCFG3 0xBFC00BF0 340c340 < 0x2CD30080, /* sltiu $s3, $a2, 128 */ --- > 0x2CD30020, /* sltiu $s3, $a2, 128->32 */ 346,347c346,347 < 0x24840200, /* addiu $a0, $a0, 512 */ < 0x24A50200, /* addiu $a1, $a1, 512 */ --- > 0x24840080, /* addiu $a0, $a0, 512 ->128 */ > 0x24A50080, /* addiu $a1, $a1, 512 ->128*/ 349c349 < 0x24C6FF80, /* addiu $a2, $a2, -128 */ --- > 0x24C6FFE0, /* addiu $a2, $a2, -128 --> -32*/ 633c633 < page_size = 4096; --- > page_size = 1024; 648c648 < num_pages = (12 * 1024); --- > num_pages = (3 * 1024); 656c656 < num_pages = (512 * 1024); --- > num_pages = (32 * 1024); In this chip resolution of the BMX registers (Program/Data RAM) is 1k not 2K. Now programming flash and erasing sectors work ok. Hope someone is interested in adding support for this kind of chips. Thanks for your good good work. Salvador -- Try before you buy = See our experts in action! The most comprehensive online learning library for Microsoft developers is just $99.99! Visual Studio, SharePoint, SQL - plus HTML5, CSS3, MVC3, Metro Style Apps, more. Free future releases when you subscribe now! http://p.sf.net/sfu/learndevnow-dev2 ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
[OpenOCD-devel] Fwd: BMX register settings in pic32mx.cfg
Hello, after reading and looking at the examples in this data sheet: PIC32MX Section 3. Memory Organization http://ww1.microchip.com/downloads/en/DeviceDoc/61115F.pdf i think the settings in pic32mx.cfg are wrong, but ... Suppose we have 16K of RAM. ( *_WORKAREASIZE 0x4000*). * set _PIC32MX_DATASIZE 0x800 * 2K * set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)] *14K *# BMXDKPBA: 2k kernel data @ 0xa800 mww 0xbf882010 $_PIC32MX_DATASIZE * OK: 2k kernel data from 0xa000 to 0xa800 * # BMXDUDBA: 16k kernel program @ 0xa800* * mww 0xbf882020 $_PIC32MX_PROGSIZE * Why not 16K (_WORKAREASIZE)? Now we have kernel program memory from 2k to 14k and from 14k to 16k in user space 2k. Kernel program memory starts at 0xa800. Size 12k. *# BMXDUPBA: 0k user program* *mww 0xbf882030 $_PIC32MX_PROGSIZE * Why not 16K (_WORKAREASIZE)? Now we have 2k user program memory, and 0k user data memory. * $_TARGETNAME configure -work-area-phys 0xa800 -work-area-size $_PIC32MX_PROGSIZE -work-area-backup 0* We set -work-area-size to 14K but we have only 12k. At first glance, with actual driver code, this is not a problem if we have 16k RAM or more memory. But with 8k or 4k probably it will not work. For example with 4K RAM we end up setting -work-area-size to 2K but there is no kernel program memory at all. I am wrong? Thanks, Salvador. -- Virtualization & Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
[OpenOCD-devel] Bug in mips32_pracc_read_mem32
Hello If i try the command " mdw addr n " with n greater than 1024 the data displayed is wrong from 1025 onward. The bug is located in mips32_pracc.c, in function mips32_pracc_read_mem32 About line 364: count -= blocksize; addr += blocksize; bytesread += blocksize; Should be: count -= blocksize; addr += blocksize * sizeof(uint32_t); bytesread += blocksize; " bytesread " is a variable that counts words A little confusing, isn't it? Thanks Salvador. -- Virtualization & Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/ ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Bug in mips32_pracc_read_mem32
On 03/14/2012 07:24 PM, salvador wrote: > Hello > > If i try the command " mdw addr n " with n greater than 1024 the data > displayed is wrong from 1025 onward. > > > > The bug is located in mips32_pracc.c, in function mips32_pracc_read_mem32 > > > About line 364: > > > count -= blocksize; > addr += blocksize; > bytesread += blocksize; > > > Should be: > > count -= blocksize; > addr += blocksize * sizeof(uint32_t); > bytesread += blocksize; > > > > " bytesread " is a variable that counts words A little confusing, > isn't it? > > > Thanks > Salvador. > > -- > Virtualization& Cloud Management Using Capacity Planning > Cloud computing makes use of virtualization - but cloud computing > also focuses on allowing computing to be delivered as a service. > http://www.accelacomm.com/jaw/sfnl/114/51521223/ > ___ > OpenOCD-devel mailing list > OpenOCD-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/openocd-devel Sorry Drasko, i can see your reply at openocd mail archives but not in my mail box, so i reply to my first mail. Step by step: 1.- There is no call to mips32_pracc_read_mem32() in mips_m4k_read_memory(). 2.- I guess you mean a call to mips32_pracc_read_mem(). This function has a parameter "int size". 3.- The function mips32_pracc_read_mem() is defined in mips32_pracc.c . This function calls mips32_pracc_read_mem32() only if the parameter size is 4 (WORD) and count >1. 4.- In function mips32_pracc_read_mem32(), in the call to mips32_pracc_exec() the variable bytesread is used as an index in a matrix of uint32_t (WORDS). Sorry but i can not find anything in the code that says "bytesread" or "count" counts bytes. But WORDS, yes. Thanks Salvador. -- This SF email is sponsosred by: Try Windows Azure free for 90 days Click Here http://p.sf.net/sfu/sfd2d-msazure ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
[OpenOCD-devel] pic32mx.cfg from git
Hello Please move "global _WORKAREASIZE" to near the the beginning of the config file, before the first use of _WORKAREASIZE, otherwise openocd won't start. Thanks Salvador. -- This SF email is sponsosred by: Try Windows Azure free for 90 days Click Here http://p.sf.net/sfu/sfd2d-msazure ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Fwd: It works! was: Status of PIC32/mips support?
On 03/29/2012 05:02 PM, Uhrheber wrote: > On 29.03.2012 11:38, salvador wrote: > >> adapter_khz 500 > It works now! > The above statement was the problem. > I had to go down to 300kHz to make it work. > At higher frequencies, I get the errors I described before (Error: mini > program did not return to start > Error: timed out while waiting for target halted). > > I don't know what's the cause of this. > Ok, it's a prototype board without ground plane, but the wires between > adapter > and PIC are very short, and the PicoTAP is directly plugged to the > board, without any > cable. > > Nevertheless, it is not perfectly stable. > When I erase the flash and write it again, sometimes it hangs. > I have then to restart OOCD and do it again. Sorry no idea from your hardware, but perhaps this help: Put a bridge between Vss pins. Solder some ceramic capacitor, 100nF or 220nF, from Vdd and Vcap to that bridge, as short as you can. Put a low value resistor, 470 to 1000 Ohm, from /MCLR pin to Vdd. At Vcap i put 10uF/16V tantalum capacitor in parallel with a 100nF ceramic SMD close to the pins of the chip. It should work much faster. My hardware really don't works at 500Khz, with "measure_clk" command it shows a value of 366Khz, close to what i can see in my oscillospe. Thanks Salvador. -- This SF email is sponsosred by: Try Windows Azure free for 90 days Click Here http://p.sf.net/sfu/sfd2d-msazure ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Fwd: It works! was: Status of PIC32/mips support?
On 03/29/2012 05:02 PM, Uhrheber wrote: > > Also I learned that it isn't a good idea to have a #pragma config DEBUG = ON > statement in the code, because this will permanently lock you out from > JTAG after > flashing. > Can this be circumvented by using a srst at mclr? > > Also you should never use #pragma config JTAGEN = OFF, or > mJTAGPortEnable(DEBUG_JTAGPORT_OFF), but this is pretty obvious. I was digging a little with this DEVCFG0 bits. First, i was not able to program this JTAGEN bit. Always read as 1. Can you really program this bit with your Pickit3 ?. Strange, but mplabX behaves accordingly to the data sheet and there is a new errata sheet and nothing about this. Perhaps i got a special chip...:) I also put bit CP (Code protection, bit 28) to 0. This disables debug mode, any reset will time out, target not halted. But i can erase it. Bit 0 does nothing related to Jtag. Same behavior when programming it to 0. Bit 1 disables any access to Jtag. I found no way with /MCLR to enable Jtag again. There is something related to this in http://ww1.microchip.com/downloads/en/DeviceDoc/61118F.pdf See 7.4.2. Any idea? I end erasing my chip with a Pickit2 clone and pic32prog. I suppose that mJTAGPortEnable(DEBUG_JTAGPORT_OFF) will put JTAGEN bit to 0 in CFGCON, and disable Jtag. In this case you can set /MCLR at reset level and erase the chip, if you like. You don't need a running cpu to erase the chip. The only purpose of this Jtag disable is for reusing the pins that uses Jtag. That makes me worry a little. Some input can become outputs and can drive or sink more current than the max 15mA as stated in data sheet. I have 100 ohm resistor in each line, so i think i am save, but you?. I don't mean you should not reuse this pins, but be careful. Thanks Salvador -- Better than sec? Nothing is better than sec when it comes to monitoring Big Data applications. Try Boundary one-second resolution app monitoring today. Free. http://p.sf.net/sfu/Boundary-dev2dev ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Status of PIC32/mips support?
On 04/08/2012 06:05 PM, Vaclav Peroutka wrote: >> Hi, are you sure about that ? Today I started to play with OpenOCD and >> PIC32. I >> have exactly the same chip and my CPUTAPID is 0x04a00053. >> >> What is the correct setting of WORKAREASIZE ? I use 0x1000. This PIC32 has >> 8kB >> but first 2kB must be free, right ? >> >> For development, do you use stock Microchip tools (C-compiler, >> MPLAB8/MPLABX) or >> something else (MIPS GCC etc ) ? >> > Hello, can I have another question? How can I burn FLASH ? "flash write_image > erase unlock test.hex 0 ihex" is not enough . Please see the log below. D3 > debug does not show more info... > > d:\\opt\\OpenOCD\\openocd-0.6.0-dev-111231122355\\bin\\openocd-0.6.0-dev-111231122355.exe > -f jlink.cfg -f pic32mx.cfg -f flash_pro > g.cfg > Open On-Chip Debugger 0.6.0-dev-00308-g7e22576 (2011-12-31-13:49) > Licensed under GNU GPL v2 > For bug reports, read > http://openocd.sourceforge.net/doc/doxygen/bugs.html > Warn : Adapter driver 'jlink' did not declare which transports it allows; > assuming legacy JTAG-only > Info : only one transport option; autoselect 'jtag' > 100 kHz > 0x1000 > adapter_nsrst_delay: 100 > jtag_ntrst_delay: 100 > Runtime Error: flash_prog.cfg:6: flash write_image erase unlock test.hex 0 > ihex: command requires more arguments > in procedure 'script' > at file "embedded:startup.tcl", line 58 > in procedure 'flash' called at file "flash_prog.cfg", line 6 > make: *** [burn] Error 1 You don't need this flash_prog.cfg For full erase: "pic32mx unlock 0" Load the init script: "reset init" For flashing test.hex: "flash write_image test.hex" I suppose you have a telnet console to send commands to openocd. In linux i use: "telnet localhost " after launching openocd. Thanks Salvador -- For Developers, A Lot Can Happen In A Second. Boundary is the first to Know...and Tell You. Monitor Your Applications in Ultra-Fine Resolution. Try it FREE! http://p.sf.net/sfu/Boundary-d2dvs2 ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Status of PIC32/mips support?
On 04/09/2012 04:06 PM, Vaclav Peroutka wrote: >> >> Load the init script: "reset init" >> >> For flashing test.hex: "flash write_image test.hex" > > Salvador, thank you, I forgot "reset init". Anyway, programming and > debugging is terribly slow. I use Segger JLink with TCK set to 200 > kHz. Programming of the chip is even incorrect. So I tried to burn the > code with Pickit3 and then connect with OpenOCD. single step takes > about 20 seconds - excerpt of the Openocd log is below. > > I don't know if it is a problem of PIC32 target or JLink interface. I > tried different TCK settings but still the same. Can somebody else > check where is the problem ? Your openocd version is a little old and don't have support for flashing pic32mx1xx/2xx. If you tray to program with reset init probably will program your flash incorrect. Can you please tray the last version from git? Also you don't need to move the "global _WORKAREASIZE" at pic32mx.cfg in new versions. If you can't, better set " -work-area-size 0 " instead of " -work-area-size$_PIC32MX_PROGSIZE ". It is slow, but a little faster and you get a correct flash programming. I can't see this 20 seconds for single step in gdb. "(gdb) monitor step" takes less than 1 second. "(gdb) step or next" from 1 to 5 seconds. I've got a wiggler clone, runs at 350 Khz, so i can't help much with your JLink interface. Thanks Salvador -- Better than sec? Nothing is better than sec when it comes to monitoring Big Data applications. Try Boundary one-second resolution app monitoring today. Free. http://p.sf.net/sfu/Boundary-dev2dev ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Status of PIC32/mips support?
On 04/10/2012 10:40 AM, Vaclav Peroutka wrote: > Dear Salvador, > > I put comments inside. > >> Your openocd version is a little old and don't have support for >> flashing pic32mx1xx/2xx. If you tray to program with reset init >> probably will program your flash incorrect. Can you please tray the >> last version from git? Also you don't need to move the "global >> _WORKAREASIZE" at pic32mx.cfg in new versions. > > I use version from 4th April 2012 ( openocd-0.6.0-dev-120404085158.zip > ). Your changes are from 31st March ? How can I detect if I use right > OpenOCD ? Sorry but from your previous posts i can see: Open On-Chip Debugger 0.6.0-dev-00308-g7e22576 (2011-12-31-13:49), December last year ? Have you change your version?. "(gdb) monitor version" will show the version and date. Or "version" if you use telnet. > >> >> If you can't, better set " -work-area-size 0 " instead of " >> -work-area-size$_PIC32MX_PROGSIZE ". It is slow, but a little faster >> and you get a correct flash programming. > > I will try it. If you really have a newer version don't need to try this, something is wrong, but not related to the version of openocd. I use "git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd" for downloading. See HACKING in openocd root directory. Next i run "bootstrap" in openocd root directory. Next "configure --option". There is a "--enable-jlink" option. And finally "make". Perhaps in Windows it's a little different, i never tried it. Thanks Salvador -- Better than sec? Nothing is better than sec when it comes to monitoring Big Data applications. Try Boundary one-second resolution app monitoring today. Free. http://p.sf.net/sfu/Boundary-dev2dev ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Fwd: Re: Status of PIC32/mips support?
On 04/11/2012 08:22 AM, Vaclav Peroutka wrote: > > UPDATE: I switched off the debugging (-d 2 parameter) and run it again. PIC32 > was programmed correctly. Programming of 6800Bytes took 5100 seconds! Can I > do some profiling of OpenOCD ? There must be something wrong inside... I > don't know if it is libusb driver or openocd itself... > I use -d3, to see as much as possible. Only for comparing, how much time takes it for this command: " (gdb) monitor mdw 0xa000 1024 " ?. For me about 6 seconds (jtag at 350Khz real). Thanks Salvador -- Better than sec? Nothing is better than sec when it comes to monitoring Big Data applications. Try Boundary one-second resolution app monitoring today. Free. http://p.sf.net/sfu/Boundary-dev2dev ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Fwd: Re: Status of PIC32/mips support?
On 04/11/2012 05:46 PM, Vaclav Peroutka wrote: >>> UPDATE: I switched off the debugging (-d 2 parameter) and run it again. >>> PIC32 >> was programmed correctly. Programming of 6800Bytes took 5100 seconds! Can I >> do >> some profiling of OpenOCD ? There must be something wrong inside... I don't >> know >> if it is libusb driver or openocd itself... >> I use -d3, to see as much as possible. >> >> Only for comparing, >> how much time takes it for this command: " (gdb) monitor mdw 0xa000 >> 1024 " ?. >> >> For me about 6 seconds (jtag at 350Khz real). >> > It took about 3 minutes for me @ 200kHz TCK (set in CFG file). See below. > Unbelievable... What can we do ? > Is like your cpu is clocked very slow, or is forced to sleep state,..??? I can't see any strange messages, only where i see 10ms you have 300 or 600ms. Can you check your hardware for pin connections? If you have a soic, spdip or ssop can you check if pins 8, 19 and 27 are tied to ground (Vss) and that the pins 13, 23 and 28 are really tied to Vdd ( 3.3V in my board)?. I have tested pin 15 (Vbus) to Vdd or Vss, but no change. /MCLR is tied to Vdd through a 820 Ohm resistor, i tested this before, with or without srst line of the adapter, but no change. Pins 14, 16, 17 and 18 are for Jtag. The rest of the pins are left not connected, floating. Have you something attached to this pins?. Thanks Salvador -- Better than sec? Nothing is better than sec when it comes to monitoring Big Data applications. Try Boundary one-second resolution app monitoring today. Free. http://p.sf.net/sfu/Boundary-dev2dev ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Fwd: Re: Status of PIC32/mips support?
On 04/12/2012 03:59 PM, Vaclav Peroutka wrote: >> Only for comparing, >> how much time takes it for this command: " (gdb) monitor mdw 0xa000 >> 1024 " ?. >> >> For me about 6 seconds (jtag at 350Khz real). >> > Hello, I just tried it on another computer - Windows XP again. Result is > approximately 30 seconds @ 200kHz real. I made a snapshot on oscilloscope (I > can send it here, too). I see that between JTAG transfers there are delays of > around 600us. I then experimentally increased TCK to 1MHz. TCK increased but > delay of 600us between transfers was still there. Time of MDW went down to 25 > seconds. > I suppose you really mean 600us, not 600ms. But related to this 600us how much time do you see activity. I suppose you have a full speed usb connection, so packets are send every 1ms or 1000us. So the relation activity to no activity is 400 to 600. This will not explain why it works so slow. > For comparison, I connected STM32 with the same setup. Communication with > STM32 is incomparably faster. Look below. I see the difference that PIC32 MDW > goes to some special function, unlike MDW on STM32. It seems to me, that > something inside mips_m4k_read_memory() works bad. Maybe a memory leak? Some > systems are not affected with it. But it looks that mine is. > > One thing confuses me. Why there is so small amount of debug messages for -d3 > ? This depends on the code, how many LOG_DEBUG's calls are there and when they are called. If all works ok there is no reason to report anything. > Debug: 352 35141 mips_m4k.c:785 mips_m4k_read_memory(): address: 0xa000, > size: 0x0004, count: 0x0400 > User : 410 64766 command.c:547 command_print(): 0xa000: 00078fdf > e37b95f3 9dbf515b cf54e881 95eb62e > 29625ms > ** STM32 > Debug: 442 42125 command.c:145 script_debug(): command - mdw ocd_mdw 0 1024 > User : 444 42203 command.c:547 command_print(): 0x: 20005000 080006c1 > 08000749 0800074d 08000751 08000755 08000759 000 78ms I suppose this STM32 has some debug monitor to make it so fast. I think the only way to see the reason of this slow behavior is to walk through the code and put some extra debug logs to see exactly where the problem is. I will try to help you. Thanks Salvador. -- For Developers, A Lot Can Happen In A Second. Boundary is the first to Know...and Tell You. Monitor Your Applications in Ultra-Fine Resolution. Try it FREE! http://p.sf.net/sfu/Boundary-d2dvs2 ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
[OpenOCD-devel] ftdi driver
There is a problem with the ftdi driver related to drscan. The last bit is never read. The problem is in ftdi_execute_scan(), at line 427 ( bit_offset++; ). This will generate an offset of 32 in a drscan32, so bit 31 is never updated. Commenting out this line the driver works with no problems, at first glance. I tested this with a pic32 and a new ft232h. This driver works for me near 8x faster than with ft2232 driver, good job. Thanks Salvador. -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Stuck rocc bit
On 09/26/2014 10:03 PM, Kent Brinkley wrote: Hi all, I am trying to get Bus Blaster V3 probe working with CI20 (http://www.elinux.org/MIPS_Creator_CI20 ) working with openocd but I'm having not luck. Upon starting openocd, I see the jtag idcode message and see continuous reset messages because rocc (bit 31) cannot be cleared. This would be true if core 1 is Sorry, I don't have this hardware, I can't do any test. But seems you are starting at 15000Khz, I would start at much lower scan rate to discard any problem related to timings. Perhaps the rocc bit is ok but the probe reads it wrong. -- Meet PCI DSS 3.0 Compliance Requirements with EventLog Analyzer Achieve PCI DSS 3.0 Compliant Status with Out-of-the-box PCI DSS Reports Are you Audit-Ready for PCI DSS 3.0 Compliance? Download White paper Comply to PCI DSS 3.0 Requirement 10 and 11.5 with EventLog Analyzer http://pubads.g.doubleclick.net/gampad/clk?id=154622311&iu=/4140/ostg.clktrk___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
[OpenOCD-devel] Fwd: Re: [openocd:tickets] #117 PIC32MX bulk write algorithm failure
Mensaje reenviado
Asunto: Re: [OpenOCD-devel] [openocd:tickets] #117 PIC32MX bulk write
algorithm failure
Fecha: Sun, 31 Jan 2016 10:06:01 +0100
De: Salvador
Para: Ticket 117 <1...@tickets.openocd.p.re.sf.net>
The code you are looking for is in file mips_mk4.c in function
mips_m4k_bulk_write_memory():
..
if (address <= fast_data_area->address + fast_data_area->size &&
fast_data_area->address <= address + count) {
.
The purpose of the code is to warn the user, it's going to overwrite the
handler memory.
A simple way to reproduce the fail (with default settings in pic32mx.cfg):
.
> mww 0xa880 0 0x21
fast_data (0xa800) is within write area (0xa880-0xa8a1).
Change work-area-phys or load_image address!
Falling back to non-bulk write
.
Fast data handler starts at 0xa800. The length is 0x80
(MIPS32_FASTDATA_HANDLER_SIZE).
The end address is 0xa87c.
Obviously outside write area.
Problems:
-Better comment
-Recheck limits, perhaps "<" instead of "<=" solves the problem.
-The final write address is wrong, at least should be multiple of 4.
Feel free to send a patch.
El 29/01/16 a las 22:20, ethereal escribió:
*[tickets:#117] <http://sourceforge.net/p/openocd/tickets/117/>
PIC32MX bulk write algorithm failure*
*Status:* new
*Milestone:* 0.9.0
*Created:* Fri Jan 29, 2016 09:20 PM UTC by ethereal
*Last Updated:* Fri Jan 29, 2016 09:20 PM UTC
*Owner:* nobody
Hi,
When programming a PIC32MX250F128B, the bulk write algorithm fails
with the following message:
Error: fast_data (0xa8d8) is within write area
(0xa958-0xa0001158).
This is consistent across different HEX files. I'll be looking over
the source code for the next little while myself, but I don't have
much hope of it being useful. If someone with more familiarity with
the PIC32MX code could take a look, it would be much appreciated.
Let me know what other information would be useful, and I'll try to
provide.
Thanks!
* ethereal
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Re: [OpenOCD-devel] FTDI FT232H?
On 05/25/2012 01:18 PM, Andreas Fritiofson wrote: > On Fri, May 25, 2012 at 10:34 AM, freddie_chopin wrote: >>> I suggest that you try it. >> I intend to, but if someone knows that it will not work it would be nice to >> know before wasting time& money (; >> >> 4\/3!! > It's certainly a compelling alternative. I haven't tested it but I see > no reason why it shouldn't work, assuming that the MPSSE engine is > identical and the USB descriptors are compatible. Although its id will > have to be added to the list of compatible FTDI chips in both drivers. It works fine for me, with a pic32mx. I added/changed the following pid is 0x6014, for the config files. For ftdi driver In mpsse.c added about line 220: case 0x900: ctx->type = TYPE_FT232H; break; In mpsse.h added about line 39: TYPE_FT232H, For ft2232 driver, in ft2232.c, compiled with libftdi: line 138 added: , TYPE_232H = 6 line 603 added: || ftdi_device == TYPE_232H line 2261 added: "232H", between "4232H",and "Unknown" Something similar for the other library, but not tested. Thanks Salvador -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] [PATCH]: d1af45e Add FT232H to supported chips
On 05/27/2012 07:05 PM, Peter Stuge wrote: > Did you try this with an actual FT232H? Please commit your interface > cfg file for that hardware in that case. > It's a self made adapter, following the specification from the data sheet. Usb powered with 3.3 external regulator. I need only the four standard jtag lines. No buffers, connected directly to the pic32mx with four 100Ohm resistors. The configuration file is opencocd-usb.cfg, but pid is now 0x6014 and the RS configuration is commented out, not needed. Thanks Salvador -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/19/2013 02:55 PM, Mindy Beseler wrote: Hi, I've been playing around with openOCD with a flyswatter3 probe and a MIPS SEAD3 board. When I try to write more than 128 bytes the code is attempting to use the FASTDATA method to write memory. The problem is whenever it uses that code path it returns this error: mini program did not return to start When I turn logging on I see spracc bit is not always returning a zero. Then the code is changed to send each fastdata access out to the probe (rather than queue it up) and checks the spracc bit after each operation it works. Are there known issues with the fastdata method as coded for 0.6.1? Or am I just doing something wrong? Thanks, Mindy Begin with adapter_khz set to 300Khz or lower. With pic32mx and core clock at 4Mhz works at 600Khz, with core clock at 8Mhz works up to 1200Khz and clocked at 80Mhz works at a scan rate of 15000Khz. Thanks, Salvador -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/19/2013 02:55 PM, Mindy Beseler wrote: Hi, I've been playing around with openOCD with a flyswatter3 probe and a MIPS SEAD3 board. When I try to write more than 128 bytes the code is attempting to use the FASTDATA method to write memory. The problem is whenever it uses that code path it returns this error: mini program did not return to start When I turn logging on I see spracc bit is not always returning a zero. Then the code is changed to send each fastdata access out to the probe (rather than queue it up) and checks the spracc bit after each operation it works. Are there known issues with the fastdata method as coded for 0.6.1? Or am I just doing something wrong? Thanks, Mindy You can also take a look at http://openocd.zylin.com/#/c/977/ Thanks Salvador -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/20/2013 05:37 AM, Mindy Beseler wrote: Hi Salvador, That's exactly what I was thinking might be the problem. Next I was going to use jtag_add_clocks(int num_cycles) to keep adding clocks until my setup worked. I've never used git before. I followed the steps in the manual about doing a git clone on the source but when I looked at the history of several files none of them showed anything very recent. Even when I saw a posting to the list that day of a fix in that file. Am I pointing to the wrong repository or how would I see these changes like showed in this log item? Did you fixed this after 0.6.1? Thanks, Mindy To clone current devel code use the new git repo: git clone git://git.code.sf.net/p/openocd/code openocd-code Take a look at https://sourceforge.net/p/openocd/code/ If you want to apply the patch: cd openocd-code git fetch http://openocd.zylin.com/openocd refs/changes/77/977/1 && git checkout FETCH_HEAD (copy and paste from http://openocd.zylin.com/#/c/977/ page) But perhaps you can try the new experimental code at: http://openocd.zylin.com/#/c/1196/ git fetch http://openocd.zylin.com/openocd refs/changes/96/1196/4 && git checkout FETCH_HEAD Your "num_cyles" is called "scan_delay" in this code and can be changed on the fly with mips_m4k cp0 200 num_cycles-value. The initial value is 20. If you try this code let me know if it works for you. Please reply to the list. Thanks Salvador -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/21/2013 03:04 PM, Mindy Beseler wrote: Hello again, Do I need the 977 patch to try the 1196 patch? Thanks, Mindy No, 977 is a different patch and a bit old. 1196 is really a series of patches. If you go to the patch page at http://openocd.zylin.com/#/c/1196/ you will see that it depends on another patch, clicking on this patch you can follow the dependencies and take a look at every patch. With git fetch http://openocd.zylin.com/openocd refs/changes/96/1196/5 && git checkout FETCH_HEAD you apply all the patches, it is the last of the series. Thanks Salvador -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/21/2013 04:52 PM, Laurent Gauch wrote: > Le 21.03.2013 16:41, Salvador Arroyo a écrit : >>> But the num_cycles will be depending on the frequency of the JTAG >>> interface. >> Of course. >>> Are there any bit to check when scanning the target jtag register, >>> to know if the data is valid or not? >>> Laurent >> Each fastdata scan is 33 bits wide. The first bit scanned out, spracc >> bit, indicates if the transfer was successfull or not. >> The problem is that most of us use ftdi based adapters. If we check >> every scan the resulting transfer speed is really 16/4K at most. >> Current code queue all the transfer and execute it, without any wait >> between scans. This works up to some scan rate, but is enough to get >> a transfer rate of 100K.(at least for pic32mx at 8Mhz). >> Adding a little delay between scans with jtag_add_clocks(), transfer >> rates of 500K are easy to reach, at least for pic32mx at 8Mhz and a >> scan rate of 15000Khz. >> >> Thanks >> Salvador. > how much clocks for a scan rate of 15Mhz ? > > Regards, > Laurent 20 But if the wait 0 option for ram access is set, with 17 probably works. Thanks Salvador -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/21/2013 05:19 PM, Laurent Gauch wrote: > Le 21.03.2013 17:03, Salvador Arroyo a écrit : >> On 03/21/2013 04:52 PM, Laurent Gauch wrote: >>> Le 21.03.2013 16:41, Salvador Arroyo a écrit : >>>>> But the num_cycles will be depending on the frequency of the JTAG >>>>> interface. >>>> Of course. >>>>> Are there any bit to check when scanning the target jtag register, >>>>> to know if the data is valid or not? >>>>> Laurent >>>> Each fastdata scan is 33 bits wide. The first bit scanned out, >>>> spracc bit, indicates if the transfer was successfull or not. >>>> The problem is that most of us use ftdi based adapters. If we check >>>> every scan the resulting transfer speed is really 16/4K at most. >>>> Current code queue all the transfer and execute it, without any wait >>>> between scans. This works up to some scan rate, but is enough to get >>>> a transfer rate of 100K.(at least for pic32mx at 8Mhz). >>>> Adding a little delay between scans with jtag_add_clocks(), transfer >>>> rates of 500K are easy to reach, at least for pic32mx at 8Mhz and a >>>> scan rate of 15000Khz. >>>> >>>> Thanks >>>> Salvador. >>> how much clocks for a scan rate of 15Mhz ? >>> >>> Regards, >>> Laurent >> 20 >> >> But if the wait 0 option for ram access is set, with 17 probably works. >> >> Thanks >> Salvador >> >> > Thank Salvador, > > if we up the jtag frequency to 30MHz or 60MHz (for a mips supporting so > high JTAG frequency), does the number cycle will be 40 or 80 ? Not necessarily The same pic clocked at 4Mhz needs 40, and of course the transfer speed is lower. Clocked at 80Mhz does not need any delay and can transfer over 800kbytes/s at the same scan rate (15000khz). Thanks Salvador -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/22/2013 03:23 AM, Mindy Beseler wrote: Hi, I didn't try the patch per se but I put the jtag_add_clocks() call in the fastdata for loop. Hardcoding the number of clocks. My major concern at this point is seeing what's the max download speed we can get out of openOCD. With the code changed to call jtag_execute_queue in each mips_ejtag_fastdata_scan I was seeing download speeds of 2k/sec. The adapter_khz setting seemed to make no difference. I guess you are using the old, now deprecated, ft2232 driver. And probably, in the adapter configuration file, ft2232_latency is set to 2. If that's the case, change ft2232_latency to 1. At least the transfer speed should be near 4k. Please try to use the new ftdi driver. Thanks Salvador -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] Does MIPS FASTDATA in 0.6.1 work?
On 03/22/2013 03:03 PM, Mindy Beseler wrote: I'm using libftdi-0.20 and libusb-win32-bin-1.2.6.0 I believe those are the newer drivers, right? No. But libusb is required. Enable it by adding "--enable-ftdi" at configure, before compiling. Use the driver configuration file from: /tcl/interface/ftdi I suppose flyswatter2.cfg should work for you. There was no ft2232_latency in my flyswatter3.cfg file so I added one setting it to 1 but it made no difference in the download speed. Yes, i see. Are you able to see faster speeds with your version of openOCD? Of course, at a scan rate of 1000Khz around 80Kbyte/s. Or in other words, to get the transfer speed you see (4K) i need to set adapter_khz to around 50Khz. Really strange. Thanks Salvador. -- Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_mar___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
Re: [OpenOCD-devel] PIC32 flash programming
On 05/09/2013 04:24 PM, Mindy Beseler wrote: > I'm using openOCD with a flyswatter3 probe on a PIC32 USB starter Kit II > under gdb trying to "load" a program that's being written to flash but the > flash programming doesn't seem to work. > (gdb) load leds.hex > Loading section .sec1, size 0x124 lma 0x1fc0 > Loading section .sec2, size 0x10 lma 0x1fc02ff0 > Error finishing flash operation > > The erase works and after the load fails reading memory shows nothing was > written to flash. > > Gdb does know this is flash and is using the RPC flash commands: > (gdb) info mem > Using memory regions provided by the target. > Num Enb Low Addr High Addr Attrs > 0 y 0x 0x1d00 rw nocache > 1 y 0x1d00 0x1d08 flash blocksize 0x1000 nocache > 2 y 0x1d08 0x1fc0 rw nocache > 3 y 0x1fc0 0x1fc03000 flash blocksize 0x1000 nocache > 4 y 0x1fc03000 0x9d00 rw nocache > 5 y 0x9d00 0x9d08 flash blocksize 0x1000 nocache > 6 y 0x9d08 0x9fc0 rw nocache > 7 y 0x9fc0 0x9fc03000 flash blocksize 0x1000 nocache > 8 y 0x9fc03000 0xbd00 rw nocache > 9 y 0xbd00 0xbd08 flash blocksize 0x1000 nocache > 10 y 0xbd08 0xbfc0 rw nocache > 11 y 0xbfc0 0xbfc03000 flash blocksize 0x1000 nocache > 12 y 0xbfc03000 0x rw nocache > > I didn't see any ticket in the bug tracking system: > http://sourceforge.net/apps/trac/openocd/ > > Does this work and I am just doing something wrong? If so, what? > > Thanks, > Mindy > > > -- > Learn Graph Databases - Download FREE O'Reilly Book > "Graph Databases" is the definitive new guide to graph databases and > their applications. This 200-page book is written by three acclaimed > leaders in the field. The early access version is available now. > Download your free book today! http://p.sf.net/sfu/neotech_d2d_may > ___ > OpenOCD-devel mailing list > OpenOCD-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/openocd-devel I think this should work: (gdb) monitor flash write_image leds.hex I never tried with "load" from gdb. See more command/options with: (gdb) monitor help flash Thanks Salvador. -- Learn Graph Databases - Download FREE O'Reilly Book "Graph Databases" is the definitive new guide to graph databases and their applications. This 200-page book is written by three acclaimed leaders in the field. The early access version is available now. Download your free book today! http://p.sf.net/sfu/neotech_d2d_may ___ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
