Hi Ken,
In this case, ‘A’ is the name given to the clock constraint.
‘B’ is the net/pin name where this constraint is applied to. Please not that,
in the design there should be a pin with the name ‘B’ in the current module.
Depending on the tool you are using for verification, the TCL command
Say the xdc file required this line
create_clock -period 3.000 -name A -waveform {0.000 1.500} -add [get_pins B]
Where would the A and B be placed in the constructor of ClockConstraint?
CC = ClockConstraint( signal=??, name=?? , freq=None , period=3.000,
port_en=False, virtual_en=False, wavef
Hi all,
I'm on the committee that plans the New England Workshop for Software Defined
Radio (NEWSDR). I can't recall if anyone from the CASPER community has
participated in the past, but I would like to see that change! I would highly
encourage anyone here to check out this workshop! Here's the
Hi all,
For anyone interested, there are two postdoc scholarships at the SETI
Institute currently accepting applications. One is in astrobiology, the
other in technosignatures.
See https://www.seti.org/postdoctoral-fellowships-seti-institute for more
info!
Cheers
Jack
--
You received this mess
If I had to guess I would say this is another issue with casperfpga version
incompatibility. Did you try using the casperfpga from that tutorials
repository which at least _should_ have been tested with whatever
bitstreams are in there --
https://github.com/casper-astro/casperfpga/tree/a88f9af0b16e
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