My email address is changing from:
er...@mips.com
to
eric.john...@imgtec.com
I've already subscribed the new email address to the list. Emails to the
previous address will forward to my new address for an unspecified amount of
time.
The MIPS Technologies website (http://www.mips.com) announces
Sorry mail wrap issue.
> -Original Message-
> From: Jovanovic, Petar
> Sent: Wednesday, December 05, 2012 3:31 PM
> To: Johnson, Eric; qemu-devel@nongnu.org
> Cc: blauwir...@gmail.com; rth7...@gmail.com; afaer...@suse.de;
> aurel...@aurel32.net
> Subject: RE: [
=mips@nongnu.org] On Behalf Of Johnson, Eric
> Sent: Wednesday, December 05, 2012 12:42 PM
> To: Jovanovic, Petar; qemu-devel@nongnu.org
> Cc: blauwir...@gmail.com; rth7...@gmail.com; afaer...@suse.de;
> aurel...@aurel32.net
> Subject: Re: [Qemu-devel] [PATCH v2] target-mips: Fix
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Petar Jovanovic
> Sent: Tuesday, December 04, 2012 3:29 PM
> To: qemu-devel@nongnu.org
> Cc: blauwir...@gmail.com; Jovanovic, Petar; rth7...@gmail.
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Petar Jovanovic
> Sent: Monday, November 26, 2012 7:13 AM
> To: qemu-devel@nongnu.org
> Cc: Jovanovic, Petar; aurel...@aurel32.net
> Subject: [Qemu
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Aurelien Jarno
> Sent: Friday, November 16, 2012 3:04 AM
> To: qemu-devel@nongnu.org
> Cc: Aurelien Jarno
> Subject: [Qemu-devel] [PATCH 5/7] targe
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Aurelien Jarno
> Sent: Friday, November 16, 2012 3:04 AM
> To: qemu-devel@nongnu.org
> Cc: Aurelien Jarno
> Subject: [Qemu-devel] [PATCH 7/7] targe
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Aurelien Jarno
> Sent: Friday, November 16, 2012 3:04 AM
> To: qemu-devel@nongnu.org
> Cc: Aurelien Jarno
> Subject: [Qemu-devel] [PATCH 4/7] targe
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Aurelien Jarno
> Sent: Friday, November 16, 2012 3:04 AM
> To: qemu-devel@nongnu.org
> Cc: Aurelien Jarno
> Subject: [Qemu-devel] [PATCH 6/7] targe
I think you meant to change the 1.3.0 to 1.4.0 for the milestones on the Wiki.
;-)
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Anthony Liguori
> Sent: Monday, December 03, 2012 1:30 PM
> To
> -Original Message-
> From: Richard Henderson [mailto:rth7...@gmail.com] On Behalf Of Richard
> Henderson
> Sent: Tuesday, November 27, 2012 1:19 PM
> To: Johnson, Eric
> Cc: "陳韋任 (Wei-Ren Chen)"; qemu-devel@nongnu.org
> Subject: Re: [Qemu-devel] MIPS exce
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of ??? (Wei-Ren Chen)
> Sent: Thursday, November 22, 2012 11:34 AM
> To: qemu-devel@nongnu.org
> Subject: [Qemu-devel] MIPS exception number limits?
>
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Aurelien Jarno
> Sent: Friday, November 16, 2012 3:04 AM
> To: qemu-devel@nongnu.org
> Cc: Aurelien Jarno
> Subject: [Qemu-devel] [PATCH 3/7] targe
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Richard Henderson
> Sent: Friday, November 16, 2012 2:03 PM
> To: Aurelien Jarno
> Cc: qemu-devel@nongnu.org
> Subject: Re: [Qemu-devel] [PATCH 2/7
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Aurelien Jarno
> Sent: Friday, November 16, 2012 3:04 AM
> To: qemu-devel@nongnu.org
> Cc: Aurelien Jarno
> Subject: [Qemu-devel] [PATCH 1/7] targe
> -Original Message-
> From: 陳韋任 (Wei-Ren Chen) [mailto:che...@iis.sinica.edu.tw]
> Sent: Tuesday, November 20, 2012 10:05 PM
> To: qemu-devel@nongnu.org
> Cc: Johnson, Eric; Aurelien Jarno; Jia Liu
> Subject: [PATCH v3] target-mips: Clean up microMIPS32 major opcode
&
> -Original Message-
> From: 陳韋任 (Wei-Ren Chen) [mailto:che...@iis.sinica.edu.tw]
> Sent: Tuesday, November 20, 2012 9:51 PM
> To: qemu-devel@nongnu.org
> Cc: Johnson, Eric; Aurelien Jarno; Jia Liu
> Subject: [PATCH v2] target-mips: Add comments on POOL32Axf encoding
&
, 2012 6:06 PM
> To: qemu-devel@nongnu.org; qemu-triv...@nongnu.org
> Cc: Johnson, Eric; Jia Liu; Aurelien Jarno
> Subject: [PATCH v2] target-mips: Clean up microMIPS32 major opcode
>
> Hi all,
>
> I check MIPS microMIPS manual [1], and found the major opcode might be
> wr
ch page.
-Eric
> -Original Message-
> From: 陳韋任 (Wei-Ren Chen) [mailto:che...@iis.sinica.edu.tw]
> Sent: Thursday, November 15, 2012 6:30 PM
> To: qemu-devel@nongnu.org; qemu-triv...@nongnu.org
> Cc: Johnson, Eric; Aurelien Jarno; Jia Liu
> Subject: [PATCH] target-mips
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of ??? (Wei-Ren Chen)
> Sent: Thursday, November 15, 2012 1:03 AM
> To: qemu-devel@nongnu.org
> Cc: Jia Liu
> Subject: [Qemu-devel] Question about com
> -Original Message-
> From: 陳韋任 (Wei-Ren Chen) [mailto:che...@iis.sinica.edu.tw]
> Sent: Wednesday, November 14, 2012 9:51 PM
> To: Johnson, Eric
> Cc: qemu-devel@nongnu.org; qemu-triv...@nongnu.org; Jia Liu; Aurelien
> Jarno
> Subject: Re: [Qemu-devel] [PATCH]
> -Original Message-
> From: Aurelien Jarno [mailto:aurel...@aurel32.net]
> Sent: Thursday, November 15, 2012 6:04 AM
> To: Johnson, Eric
> Cc: 陳韋任 (Wei-Ren Chen); qemu-devel@nongnu.org; qemu-triv...@nongnu.org;
> che...@cs.nctu.edu.tw; Jia Liu
> Subject: Re: [Qemu-
k for either MIPS64 or microMIPS64.
Eric
On Nov 14, 2012, at 7:27 PM, "陳韋任 (Wei-Ren Chen)"
wrote:
> On Thu, Nov 15, 2012 at 02:34:31AM +0000, Johnson, Eric wrote:
>> Hi Chen,
>>
>> Please only remove the POOL48A opcode.
>>
>> The others are docu
Hi Chen,
Please only remove the POOL48A opcode.
The others are documented in the microMIPS64 Instruction Set manual (
http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00087-2B-MIPS64BIS-AFP-03.51.pdf
). See http://www.mips.com/products/architectures/mips64/ for other relavent
system_memory, FPGA_ADDRESS, env->irq[4],
> serial_hds[2]);
>
> /* Load firmware in flash / BIOS. */
> dinfo = drive_get(IF_PFLASH, 0, fl_idx);
> --
> 1.7.10.4
>
I double checked with a Malta expert here. He verified that the CBUS UART is
connected to the HW2 interrupt pin.
Reviewed-by: Eric Johnson
-Eric
> -Original Message-
> From: Gerd Hoffmann [mailto:kra...@redhat.com]
> Sent: Wednesday, November 14, 2012 4:42 AM
[...]
> On 11/13/12 19:41, Johnson, Eric wrote:
[...]
> > I wasn't sure how to submit a patch to an unsubmitted patch.
>
> As usual: "
recreate.
-Eric
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Tuesday, November 13, 2012 10:30 AM
> To: Gerd Hoffmann
> Cc: qemu-devel@nongnu.org; Johnson, Eric
> Subject: Re: [Qemu-devel] [PATCH 5/6] pixman: build internal versio
/s390x/event-facility.c: In function
'command_handler':
/home/ericj/work/qemu/kraxel.org/hw/s390x/event-facility.c:110: warning: 'rc'
may be used uninitialized in this function
make[1]: *** [hw/s390x/event-facility.o] Error 1
> -Original Message-
> From: qemu-
This may not be the prettiest fix for the pixman dependency but it seems to
work.
diff --git a/configure b/configure
index f0bc726..fcb744e 100755
--- a/configure
+++ b/configure
@@ -4154,6 +4154,10 @@ echo "QEMU_CFLAGS+=$cflags" >> $config_target_mak
echo "QEMU_INCLUDES+=$includes" >> $config_t
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Stefan Weil
> Sent: Sunday, November 04, 2012 4:11 AM
> To: Blue Swirl
> Cc: Peter Maydell; qemu-devel@nongnu.org
> Subject: Re: [Qemu-devel] [PATC
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Peter Maydell
> Sent: Friday, October 05, 2012 8:07 AM
> To: Kotler, Reed
> Cc: Lau, David; Fuhler, Rich; Gilmore, Douglas; qemu-devel@nongnu.org;
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Jia Liu
> Sent: Monday, October 08, 2012 1:51 AM
> To: qemu-devel@nongnu.org
> Cc: aurel...@aurel32.net
> Subject: [Qemu-devel] [PATCH v10 14/14] t
> -Original Message-
> From: qemu-devel-bounces+ericj=mips@nongnu.org [mailto:qemu-devel-
> bounces+ericj=mips@nongnu.org] On Behalf Of Aurelien Jarno
> Sent: Thursday, September 06, 2012 2:11 AM
> To: Jia Liu
> Cc: qemu-devel@nongnu.org
> Subject: Re: [Qemu-devel] [PATCH v7 04/14]
Hi Zhi-zhou Zhang,
You are correct. This should not be a reserved instruction exception on MIPS64
(nor should MOVN).
-Eric
From: qemu-devel-bounces+ericj=mips@nongnu.org
[mailto:qemu-devel-bounces+ericj=mips@nongnu.org] On Behalf Of Zhi-zhou
Zhang
Sent: Friday, May 18, 2012 4:39 AM
T
You may want to just put those includes inside an '#ifdef MIPS_DEBUG_DISAS'
instead of removing them.
Although I suppose we could just add back the minimum needed along with the
patches to fix the compile when MIPS_DEBUG_DISAS is defined.
-Original Message-
From: qemu-devel-bounces+eric
The patch applies to a8467c7a0e8b024a18608ff7db31ca2f2297e641.
-Original Message-
From: qemu-devel-bounces+ericj=mips@nongnu.org
[mailto:qemu-devel-bounces+ericj=mips@nongnu.org] On Behalf Of Eric Johnson
Sent: Saturday, September 17, 2011 5:06 PM
To: qemu-devel@nongnu.org; aurel.
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