[PATCH 22/22] drm/amd/display: Promote DAL to 3.2.246
From: Martin Leung This version brings along following fixes: - Fix a regression in blank pixel data caused by coding mistake - Fix a bug when searching for insert_above_mpcc - Fix backlight off cmd for OLED panel - Update add plane to context logic with a new algorithm - Adjust visual confirm dpp height offset to be 1/240 of v addressable - Add interface to enable DPIA trace - Support plane clip with zero recout size - Blocking invalid 420 modes on HDMI TMDS for DCN31 and DCN314 - Make mpc32 functions available to future DCNs - Change HDCP update sequence for DM Acked-by: Tom Chung Signed-off-by: Martin Leung --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index ee9226f3ab7c..cc0a39db8aa0 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -47,7 +47,7 @@ struct aux_payload; struct set_config_cmd_payload; struct dmub_notification; -#define DC_VER "3.2.245" +#define DC_VER "3.2.246" #define MAX_SURFACES 3 #define MAX_PLANES 6 -- 2.25.1
[PATCH 21/22] drm/amd/display: Change HDCP update sequence for DM
From: Bhawanpreet Lakha
Refactor the sequence in hdcp_update_display() to use
mod_hdcp_update_display().
Previous sequence:
- remove()->add()
This Sequence was used to update the display, (mod_hdcp_update_display
didn't exist at the time). This meant for any hdcp updates (type changes,
enable/disable) we would remove, reconstruct, and add. This leads to
unnecessary calls to psp eventually
New Sequence using mod_hdcp_update_display():
- add() once when stream is enabled
- use update() for all updates
The update function checks for prev == new states and will not
unnecessarily end up calling psp via add/remove.
Reviewed-by: Qingqing Zhuo
Acked-by: Tom Chung
Signed-off-by: Bhawanpreet Lakha
---
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 80 +--
1 file changed, 38 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
index 8db47f66eac0..20cfc5be21a4 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
@@ -168,53 +168,45 @@ void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
bool enable_encryption)
{
struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
- struct mod_hdcp_display *display = &hdcp_work[link_index].display;
- struct mod_hdcp_link *link = &hdcp_work[link_index].link;
- struct mod_hdcp_display_query query;
+ struct mod_hdcp_link_adjustment link_adjust;
+ struct mod_hdcp_display_adjustment display_adjust;
unsigned int conn_index = aconnector->base.index;
mutex_lock(&hdcp_w->mutex);
hdcp_w->aconnector[conn_index] = aconnector;
- query.display = NULL;
- mod_hdcp_query_display(&hdcp_w->hdcp, aconnector->base.index, &query);
-
- if (query.display) {
- memcpy(display, query.display, sizeof(struct mod_hdcp_display));
- mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index,
&hdcp_w->output);
-
- hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
-
- if (enable_encryption) {
- /* Explicitly set the saved SRM as sysfs call will be
after
-* we already enabled hdcp (s3 resume case)
-*/
- if (hdcp_work->srm_size > 0)
- psp_set_srm(hdcp_work->hdcp.config.psp.handle,
hdcp_work->srm,
- hdcp_work->srm_size,
- &hdcp_work->srm_version);
-
- display->adjust.disable = MOD_HDCP_DISPLAY_NOT_DISABLE;
- if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0) {
- hdcp_w->link.adjust.hdcp1.disable = 0;
- hdcp_w->link.adjust.hdcp2.force_type =
MOD_HDCP_FORCE_TYPE_0;
- } else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1)
{
- hdcp_w->link.adjust.hdcp1.disable = 1;
- hdcp_w->link.adjust.hdcp2.force_type =
MOD_HDCP_FORCE_TYPE_1;
- }
+ memset(&link_adjust, 0, sizeof(link_adjust));
+ memset(&display_adjust, 0, sizeof(display_adjust));
- schedule_delayed_work(&hdcp_w->property_validate_dwork,
-
msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
- } else {
- display->adjust.disable =
MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
- hdcp_w->encryption_status[conn_index] =
MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
- cancel_delayed_work(&hdcp_w->property_validate_dwork);
+ if (enable_encryption) {
+ /* Explicitly set the saved SRM as sysfs call will be after we
already enabled hdcp
+* (s3 resume case)
+*/
+ if (hdcp_work->srm_size > 0)
+ psp_set_srm(hdcp_work->hdcp.config.psp.handle,
hdcp_work->srm,
+ hdcp_work->srm_size,
+ &hdcp_work->srm_version);
+
+ display_adjust.disable = MOD_HDCP_DISPLAY_NOT_DISABLE;
+
+ link_adjust.auth_delay = 2;
+
+ if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0) {
+ link_adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
+ } else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
+ link_adjust.hdcp1.disable = 1;
+ link_adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_1;
}
- display->state = MOD_HDCP_DISPLAY_ACTIVE;
+ schedule_delayed_work(&hdcp_w->property_validate_dwork,
+
msecs_to_ji
[PATCH 20/22] drm/amd/display: Fix backlight off cmd for OLED panel
From: Swapnil Patel
[Why]
Currently driver fails to send backlight off command while
powering down.
This is because in dce110_edp_backlight_control, current backlight
status isn't being acccessed correctly for OLED panel with AUX control.
[How]
Add support for accessing current backlight status for OLED panels
with AUX control.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by: Swapnil Patel
---
.../display/dc/dce110/dce110_hw_sequencer.c | 3 +--
drivers/gpu/drm/amd/display/dc/inc/link.h | 1 +
.../drm/amd/display/dc/link/link_factory.c| 1 +
.../link/protocols/link_edp_panel_control.c | 19 +++
.../link/protocols/link_edp_panel_control.h | 1 +
5 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index bf2d7fbaccd7..e50da69a2b97 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -965,8 +965,7 @@ void dce110_edp_backlight_control(
}
if (link->panel_cntl) {
- bool is_backlight_on =
link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);
-
+ bool is_backlight_on =
ctx->dc->link_srv->edp_get_backlight_enable_status(link);
if ((enable && is_backlight_on) || (!enable &&
!is_backlight_on)) {
DC_LOG_HW_RESUME_S3(
"%s: panel already powered up/off. Do
nothing.\n",
diff --git a/drivers/gpu/drm/amd/display/dc/inc/link.h
b/drivers/gpu/drm/amd/display/dc/inc/link.h
index f839494d59d8..dad730792a9a 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/link.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/link.h
@@ -273,6 +273,7 @@ struct link_service {
bool (*edp_is_ilr_optimization_required)(struct dc_link *link,
struct dc_crtc_timing *crtc_timing);
bool (*edp_backlight_enable_aux)(struct dc_link *link, bool enable);
+ bool (*edp_get_backlight_enable_status)(struct dc_link *link);
void (*edp_add_delay_for_T9)(struct dc_link *link);
bool (*edp_receiver_ready_T9)(struct dc_link *link);
bool (*edp_receiver_ready_T7)(struct dc_link *link);
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c
b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
index ac1c3e2e7c1d..cab68b5c80f3 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_factory.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
@@ -211,6 +211,7 @@ static void construct_link_service_edp_panel_control(struct
link_service *link_s
link_srv->edp_is_ilr_optimization_required =
edp_is_ilr_optimization_required;
link_srv->edp_backlight_enable_aux = edp_backlight_enable_aux;
+ link_srv->edp_get_backlight_enable_status =
edp_get_backlight_enable_status;
link_srv->edp_add_delay_for_T9 = edp_add_delay_for_T9;
link_srv->edp_receiver_ready_T9 = edp_receiver_ready_T9;
link_srv->edp_receiver_ready_T7 = edp_receiver_ready_T7;
diff --git
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 8b360c09e0e8..adebcef00e74 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -243,6 +243,25 @@ bool edp_backlight_enable_aux(struct dc_link *link, bool
enable)
return true;
}
+bool edp_get_backlight_enable_status(struct dc_link *link)
+{
+ uint8_t backlight_status = 0;
+
+ if (!link || (link->connector_signal != SIGNAL_TYPE_EDP &&
+ link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
+ return false;
+
+ if (link->dpcd_sink_ext_caps.bits.oled ||
+ link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1 ||
+ link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1) {
+ if (core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_ENABLE,
+ &backlight_status, 1) != DC_OK)
+ return false;
+ return (backlight_status > 0);
+ } else
+ return
link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);
+}
+
// we read default from 0x320 because we expect BIOS wrote it there
// regular get_backlight_nit reads from panel set at 0x326
static bool read_default_bl_aux(struct dc_link *link, uint32_t
*backlight_millinits)
diff --git
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
index fa89bdb3a336..f2ab8799ddf1 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
+++ b/dr
[PATCH 19/22] drm/amd/display: rename acquire_idle_pipe_for_layer to acquire_free_pipe_as_sec_dpp_pipe
From: Wenjing Liu
[why]
Secondary DPP pipes are used for rendering secondary layers of planes.
The name "for layer" doesn't make it obvious. The function is acquiring
a free pipe as secondary dpp pipe only. We rename it so it is more obvious.
In a future follow up change, we want to add functions to acquire free pipe as
opp head pipe or otg master pipe as well. They will have their separate
allocation priority.
Reviewed-by: Jun Lei
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 40 +--
.../amd/display/dc/dce110/dce110_resource.c | 2 +-
.../drm/amd/display/dc/dcn10/dcn10_resource.c | 6 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 6 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 2 +-
.../amd/display/dc/dcn201/dcn201_resource.c | 6 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 2 +-
.../amd/display/dc/dcn302/dcn302_resource.c | 2 +-
.../amd/display/dc/dcn303/dcn303_resource.c | 2 +-
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
.../amd/display/dc/dcn314/dcn314_resource.c | 2 +-
.../amd/display/dc/dcn315/dcn315_resource.c | 2 +-
.../amd/display/dc/dcn316/dcn316_resource.c | 2 +-
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 70 +--
.../drm/amd/display/dc/dcn32/dcn32_resource.h | 2 +-
.../amd/display/dc/dcn321/dcn321_resource.c | 2 +-
.../drm/amd/display/dc/dml/calcs/dcn_calcs.c | 2 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 12 +---
drivers/gpu/drm/amd/display/dc/inc/resource.h | 12 ++--
21 files changed, 85 insertions(+), 95 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 103dfe82dc28..7561fe748c72 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1563,7 +1563,7 @@ enum dc_status resource_build_scaling_params_for_context(
return DC_OK;
}
-struct pipe_ctx *find_idle_secondary_pipe_legacy(
+struct pipe_ctx *find_free_secondary_pipe_legacy(
struct resource_context *res_ctx,
const struct resource_pool *pool,
const struct pipe_ctx *primary_pipe)
@@ -1623,38 +1623,38 @@ struct pipe_ctx *find_idle_secondary_pipe_legacy(
return secondary_pipe;
}
-int resource_find_idle_pipe_used_in_cur_mpc_blending_tree(
+int resource_find_free_pipe_used_in_cur_mpc_blending_tree(
const struct resource_context *cur_res_ctx,
struct resource_context *new_res_ctx,
const struct pipe_ctx *cur_opp_head)
{
const struct pipe_ctx *cur_sec_dpp = cur_opp_head->bottom_pipe;
struct pipe_ctx *new_sec_dpp;
- int idle_pipe_idx = IDLE_PIPE_INDEX_NOT_FOUND;
+ int free_pipe_idx = FREE_PIPE_INDEX_NOT_FOUND;
while (cur_sec_dpp) {
- /* find an idle pipe used in current opp blend tree,
+ /* find a free pipe used in current opp blend tree,
* this is to avoid MPO pipe switching to different opp blending
* tree
*/
new_sec_dpp = &new_res_ctx->pipe_ctx[cur_sec_dpp->pipe_idx];
if (new_sec_dpp->plane_state == NULL &&
new_sec_dpp->stream == NULL) {
- idle_pipe_idx = cur_sec_dpp->pipe_idx;
+ free_pipe_idx = cur_sec_dpp->pipe_idx;
break;
}
cur_sec_dpp = cur_sec_dpp->bottom_pipe;
}
- return idle_pipe_idx;
+ return free_pipe_idx;
}
-int recource_find_idle_pipe_not_used_in_cur_res_ctx(
+int recource_find_free_pipe_not_used_in_cur_res_ctx(
const struct resource_context *cur_res_ctx,
struct resource_context *new_res_ctx,
const struct resource_pool *pool)
{
- int idle_pipe_idx = IDLE_PIPE_INDEX_NOT_FOUND;
+ int free_pipe_idx = FREE_PIPE_INDEX_NOT_FOUND;
const struct pipe_ctx *new_sec_dpp, *cur_sec_dpp;
int i;
@@ -1666,20 +1666,20 @@ int recource_find_idle_pipe_not_used_in_cur_res_ctx(
cur_sec_dpp->stream == NULL &&
new_sec_dpp->plane_state == NULL &&
new_sec_dpp->stream == NULL) {
- idle_pipe_idx = i;
+ free_pipe_idx = i;
break;
}
}
- return idle_pipe_idx;
+ return free_pipe_idx;
}
-int resource_find_idle_pipe_used_as_cur_sec_dpp_in_mpcc_combine(
+int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine(
const struct resource_context *cur_res_ctx,
struct resource_context *new_res_ctx,
const struct r
[PATCH 18/22] drm/amd/display: move idle pipe allocation logic into dcn specific layer
From: Wenjing Liu
[why]
generic dc resource file should not know what an optimal idle pipe is
because this is dcn hardware dependent.
[how]
We move the optimial pipe searching logic in dcn specific layer.
Reviewed-by: Jun Lei
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 184 +++---
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 87 -
drivers/gpu/drm/amd/display/dc/inc/resource.h | 19 +-
3 files changed, 174 insertions(+), 116 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 218fe2c401e1..103dfe82dc28 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1623,139 +1623,101 @@ struct pipe_ctx *find_idle_secondary_pipe_legacy(
return secondary_pipe;
}
-/*
- * Find the most optimal idle pipe from res_ctx, which could be used as a
- * secondary dpp pipe for input opp head pipe.
- *
- * an idle pipe - a pipe in input res_ctx not yet used for any streams or
- * planes.
- * secondary dpp pipe - a pipe gets inserted to a head OPP pipe's MPC blending
- * tree. This is typical used for rendering MPO planes or additional offset
- * areas in MPCC combine.
- *
- * Hardware Transition Minimization Algorithm for Finding a Secondary DPP Pipe
- * -
- *
- * PROBLEM:
- *
- * 1. There is a hardware limitation that a secondary DPP pipe cannot be
- * transferred from one MPC blending tree to the other in a single frame.
- * Otherwise it could cause glitches on the screen.
- *
- * For instance, we cannot transition from state 1 to state 2 in one frame.
This
- * is because PIPE1 is transferred from PIPE0's MPC blending tree over to
- * PIPE2's MPC blending tree, which is not supported by hardware.
- * To support this transition we need to first remove PIPE1 from PIPE0's MPC
- * blending tree in one frame and then insert PIPE1 to PIPE2's MPC blending
tree
- * in the next frame. This is not optimal as it will delay the flip for two
- * frames.
- *
- * State 1:
- * PIPE0 -- secondary DPP pipe --> (PIPE1)
- * PIPE2 -- secondary DPP pipe --> NONE
- *
- * State 2:
- * PIPE0 -- secondary DPP pipe --> NONE
- * PIPE2 -- secondary DPP pipe --> (PIPE1)
- *
- * 2. We want to in general minimize the unnecessary changes in pipe topology.
- * If a pipe is already added in current blending tree and there are no changes
- * to plane topology, we don't want to swap it with another idle pipe
- * unnecessarily in every update. Powering up and down a pipe would require a
- * full update which delays the flip for 1 frame. If we use the original pipe
- * we don't have to toggle its power. So we can flip faster.
- */
-struct pipe_ctx *find_optimal_idle_pipe_as_secondary_dpp_pipe(
+int resource_find_idle_pipe_used_in_cur_mpc_blending_tree(
const struct resource_context *cur_res_ctx,
struct resource_context *new_res_ctx,
- const struct resource_pool *pool,
- const struct pipe_ctx *new_head)
+ const struct pipe_ctx *cur_opp_head)
{
- const struct pipe_ctx *cur_head, *cur_sec;
- struct pipe_ctx *new_sec;
- bool found = false;
- int i;
-
- cur_head = &cur_res_ctx->pipe_ctx[new_head->pipe_idx];
- cur_sec = cur_head->bottom_pipe;
+ const struct pipe_ctx *cur_sec_dpp = cur_opp_head->bottom_pipe;
+ struct pipe_ctx *new_sec_dpp;
+ int idle_pipe_idx = IDLE_PIPE_INDEX_NOT_FOUND;
- while (cur_sec) {
+ while (cur_sec_dpp) {
/* find an idle pipe used in current opp blend tree,
* this is to avoid MPO pipe switching to different opp blending
* tree
*/
- new_sec = &new_res_ctx->pipe_ctx[cur_sec->pipe_idx];
- if (new_sec->plane_state == NULL && new_sec->stream == NULL) {
- new_sec->pipe_idx = cur_sec->pipe_idx;
- found = true;
+ new_sec_dpp = &new_res_ctx->pipe_ctx[cur_sec_dpp->pipe_idx];
+ if (new_sec_dpp->plane_state == NULL &&
+ new_sec_dpp->stream == NULL) {
+ idle_pipe_idx = cur_sec_dpp->pipe_idx;
break;
}
- cur_sec = cur_sec->bottom_pipe;
+ cur_sec_dpp = cur_sec_dpp->bottom_pipe;
}
- /* Up until here if we have not found an idle secondary pipe, we will
-* need to wait for at least one frame to complete the transition
-* sequence.
-*/
- if (!found) {
- /* find a free pipe not used in current res ctx, this is to
-* avoid tearing down other pipe's topology
-*/
- for (i = 0; i < pool->pipe_count; i++)
[PATCH 17/22] drm/amd/display: Use max memclk variable when setting max memclk
From: Alvin Lee
[Description]
In overclocking scenarios the max memclk could be higher
than the DC mode limit. However, for configs that don't
support MCLK switching we need to set the max memclk to
the overclocked max instead of the DC mode max or we
could result in underflow.
Reviewed-by: Samson Tam
Acked-by: Tom Chung
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
index ccd60aff19e7..2f65591d2f62 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
@@ -802,7 +802,7 @@ static void dcn32_set_hard_min_memclk(struct clk_mgr
*clk_mgr_base, bool current
khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz));
else
dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,
-
clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_memclk_levels
- 1].memclk_mhz);
+
clk_mgr_base->bw_params->max_memclk_mhz);
} else {
dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,
clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz);
--
2.25.1
[PATCH 15/22] drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN314
From: Leo Chen
[Why & How]
HDMI TMDS does not have ODM support. Filtering 420 modes that
exceed the 4096 FMT limitation on DCN314 will resolve
intermittent corruptions issues.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Leo Chen
---
.../gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
index 32251af76935..a94aa0f21a7f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
@@ -4227,7 +4227,9 @@ void dml314_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_
}
if (v->OutputFormat[k] == dm_420 &&
v->HActive[k] > DCN314_MAX_FMT_420_BUFFER_WIDTH
&&
v->ODMCombineEnablePerState[i][k] != dm_odm_combine_mode_4to1) {
- if (v->HActive[k] / 2 >
DCN314_MAX_FMT_420_BUFFER_WIDTH) {
+ if (v->Output[k] == dm_hdmi) {
+ FMTBufferExceeded = true;
+ } else if (v->HActive[k] / 2 >
DCN314_MAX_FMT_420_BUFFER_WIDTH) {
v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1;
v->PlaneRequiredDISPCLK =
v->PlaneRequiredDISPCLKWithODMCombine4To1;
--
2.25.1
[PATCH 16/22] drm/amd/display: Add vendor Id for reference
From: Mike Hsieh Add a new vendor ID code for reference Reviewed-by: Wenjing Liu Acked-by: Tom Chung Signed-off-by: Mike Hsieh --- drivers/gpu/drm/amd/display/include/ddc_service_types.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/include/ddc_service_types.h b/drivers/gpu/drm/amd/display/include/ddc_service_types.h index f843fc497855..68dfc7968017 100644 --- a/drivers/gpu/drm/amd/display/include/ddc_service_types.h +++ b/drivers/gpu/drm/amd/display/include/ddc_service_types.h @@ -40,6 +40,7 @@ #define DP_BRANCH_HW_REV_20 0x20 #define DP_DEVICE_ID_38EC11 0x38EC11 +#define DP_DEVICE_ID_BA4159 0xBA4159 #define DP_FORCE_PSRSU_CAPABILITY 0x40F #define DP_SINK_PSR_ACTIVE_VTOTAL 0x373 -- 2.25.1
[PATCH 14/22] drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN31
From: Leo Chen
[Why & How]
HDMI TMDS does not have ODM support. Filtering 420 modes that
exceed the 4096 FMT limitation on DCN31 will resolve
intermittent corruptions issues.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Leo Chen
---
.../gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c| 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index eba51144fee7..adea459e7d36 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -4135,7 +4135,9 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
}
if (v->OutputFormat[k] == dm_420 &&
v->HActive[k] > DCN31_MAX_FMT_420_BUFFER_WIDTH
&&
v->ODMCombineEnablePerState[i][k] != dm_odm_combine_mode_4to1) {
- if (v->HActive[k] / 2 >
DCN31_MAX_FMT_420_BUFFER_WIDTH) {
+ if (v->Output[k] == dm_hdmi) {
+ FMTBufferExceeded = true;
+ } else if (v->HActive[k] / 2 >
DCN31_MAX_FMT_420_BUFFER_WIDTH) {
v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1;
v->PlaneRequiredDISPCLK =
v->PlaneRequiredDISPCLKWithODMCombine4To1;
--
2.25.1
[PATCH 13/22] drm/amd/display: Revert "dc: read down-spread percentage from lut to adjust dprefclk"
From: Leo Chen
[Why & How]
Revert commit feb90174e9c6 ("drm/amd/display: Read down-spread percentage from
lut to adjust dprefclk.")
This change was causing 240hz display to not light up after s0i3.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Leo Chen
---
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.c| 32 +--
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.h| 7
2 files changed, 1 insertion(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
index 3ba2e13d691d..7326b7565846 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
@@ -87,14 +87,6 @@ static const struct IP_BASE CLK_BASE = { { { { 0x00016C00,
0x02401800, 0, 0, 0,
#define CLK1_CLK_PLL_REQ__PllSpineDiv_MASK 0xF000L
#define CLK1_CLK_PLL_REQ__FbMult_frac_MASK 0xL
-#define regCLK1_CLK2_BYPASS_CNTL 0x029c
-#define regCLK1_CLK2_BYPASS_CNTL_BASE_IDX 0
-
-#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL__SHIFT 0x0
-#define CLK1_CLK2_BYPASS_CNTL__LK2_BYPASS_DIV__SHIFT 0x10
-#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL_MASK0x0007L
-#define CLK1_CLK2_BYPASS_CNTL__LK2_BYPASS_DIV_MASK 0x000FL
-
#define REG(reg_name) \
(CLK_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ##
reg_name)
@@ -444,11 +436,6 @@ static DpmClocks314_t dummy_clocks;
static struct dcn314_watermarks dummy_wms = { 0 };
-static struct dcn314_ss_info_table ss_info_table = {
- .ss_divider = 1000,
- .ss_percentage = {0, 0, 375, 375, 375}
-};
-
static void dcn314_build_watermark_ranges(struct clk_bw_params *bw_params,
struct dcn314_watermarks *table)
{
int i, num_valid_sets;
@@ -728,20 +715,6 @@ static struct clk_mgr_funcs dcn314_funcs = {
};
extern struct clk_mgr_funcs dcn3_fpga_funcs;
-static void dcn314_read_ss_info_from_lut(struct clk_mgr_internal *clk_mgr)
-{
- uint32_t clock_source;
-
- REG_GET(CLK1_CLK2_BYPASS_CNTL, CLK2_BYPASS_SEL, &clock_source);
-
- clk_mgr->dprefclk_ss_percentage =
ss_info_table.ss_percentage[clock_source];
-
- if (clk_mgr->dprefclk_ss_percentage != 0) {
- clk_mgr->ss_on_dprefclk = true;
- clk_mgr->dprefclk_ss_divider = ss_info_table.ss_divider;
- }
-}
-
void dcn314_clk_mgr_construct(
struct dc_context *ctx,
struct clk_mgr_dcn314 *clk_mgr,
@@ -808,11 +781,8 @@ void dcn314_clk_mgr_construct(
clk_mgr->base.base.dprefclk_khz = 60;
clk_mgr->base.base.clks.ref_dtbclk_khz = 60;
-
- dcn314_read_ss_info_from_lut(&clk_mgr->base);
+ dce_clock_read_ss_info(&clk_mgr->base);
/*if bios enabled SS, driver needs to adjust dtb clock, only enable
with correct bios*/
- clk_mgr->base.base.dprefclk_khz =
- dce_adjust_dp_ref_freq_for_ss(&clk_mgr->base,
clk_mgr->base.base.dprefclk_khz);
clk_mgr->base.base.bw_params = &dcn314_bw_params;
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
index e0670dafe260..171f84340eb2 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
@@ -28,8 +28,6 @@
#define __DCN314_CLK_MGR_H__
#include "clk_mgr_internal.h"
-#define NUM_CLOCK_SOURCES 5
-
struct dcn314_watermarks;
struct dcn314_smu_watermark_set {
@@ -42,11 +40,6 @@ struct clk_mgr_dcn314 {
struct dcn314_smu_watermark_set smu_wm_set;
};
-struct dcn314_ss_info_table {
- uint32_t ss_divider;
- uint32_t ss_percentage[NUM_CLOCK_SOURCES];
-};
-
bool dcn314_are_clock_states_equal(struct dc_clocks *a,
struct dc_clocks *b);
--
2.25.1
[PATCH 12/22] drm/amd/display: do not treat clip_rect size change as a scaling change
From: Wenjing Liu [why] With previous ODM + MPO policy we will only allocate pipes when MPO plane has intersection with current ODM slice. With this policy we have to indicate scaling change when plane clip is updated in case plane clip change causes MPO plane to go in or out current ODM slice. With new ODM + MPO policy we allocate pipe independent from plane clip size so we no longer treat it as a scaling change. There no need to do a full update due to clip size change anymore. Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Wenjing Liu --- drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 413258db6746..8504e6ee9582 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -2495,9 +2495,7 @@ static enum surface_update_type get_scaling_info_update_type( if (!u->scaling_info) return UPDATE_TYPE_FAST; - if (u->scaling_info->clip_rect.width != u->surface->clip_rect.width - || u->scaling_info->clip_rect.height != u->surface->clip_rect.height - || u->scaling_info->dst_rect.width != u->surface->dst_rect.width + if (u->scaling_info->dst_rect.width != u->surface->dst_rect.width || u->scaling_info->dst_rect.height != u->surface->dst_rect.height || u->scaling_info->scaling_quality.integer_scaling != u->surface->scaling_quality.integer_scaling -- 2.25.1
[PATCH 10/22] drm/amd/display: update add plane to context logic with a new algorithm
From: Wenjing Liu
[why]
Preivous algorithm for finding an optimal idle pipe for a new plane was
implemented to handle dynamic pipe allocation when MPO plane moves
from one ODM slice to the other. Now pipe allocation is more static so
it no longer depends on the MPO plane's position. We are simplifying
our logic and remove unnecessary handling in our code.
[how]
Apply a new simplified version of pipe resource allocation logic to reduce
unnecessary flip delay caused by swapping secondary dpp pipe to other
MPC blending tree.
Reviewed-by: Jun Lei
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 353 +-
.../amd/display/dc/dce110/dce110_resource.c | 10 +-
.../drm/amd/display/dc/dcn10/dcn10_resource.c | 11 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 11 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 5 +-
.../amd/display/dc/dcn201/dcn201_resource.c | 11 +-
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 119 ++
.../drm/amd/display/dc/dcn32/dcn32_resource.h | 8 +-
.../amd/display/dc/dcn321/dcn321_resource.c | 2 +-
.../drm/amd/display/dc/dml/calcs/dcn_calcs.c | 2 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 42 +--
drivers/gpu/drm/amd/display/dc/inc/resource.h | 8 +-
12 files changed, 328 insertions(+), 254 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index dc6ebfa205b0..43273e54147b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1557,7 +1557,7 @@ enum dc_status resource_build_scaling_params_for_context(
return DC_OK;
}
-struct pipe_ctx *find_idle_secondary_pipe(
+struct pipe_ctx *find_idle_secondary_pipe_legacy(
struct resource_context *res_ctx,
const struct resource_pool *pool,
const struct pipe_ctx *primary_pipe)
@@ -1617,6 +1617,165 @@ struct pipe_ctx *find_idle_secondary_pipe(
return secondary_pipe;
}
+/*
+ * Find the most optimal idle pipe from res_ctx, which could be used as a
+ * secondary dpp pipe for input opp head pipe.
+ *
+ * an idle pipe - a pipe in input res_ctx not yet used for any streams or
+ * planes.
+ * secondary dpp pipe - a pipe gets inserted to a head OPP pipe's MPC blending
+ * tree. This is typical used for rendering MPO planes or additional offset
+ * areas in MPCC combine.
+ *
+ * Hardware Transition Minimization Algorithm for Finding a Secondary DPP Pipe
+ * -
+ *
+ * PROBLEM:
+ *
+ * 1. There is a hardware limitation that a secondary DPP pipe cannot be
+ * transferred from one MPC blending tree to the other in a single frame.
+ * Otherwise it could cause glitches on the screen.
+ *
+ * For instance, we cannot transition from state 1 to state 2 in one frame.
This
+ * is because PIPE1 is transferred from PIPE0's MPC blending tree over to
+ * PIPE2's MPC blending tree, which is not supported by hardware.
+ * To support this transition we need to first remove PIPE1 from PIPE0's MPC
+ * blending tree in one frame and then insert PIPE1 to PIPE2's MPC blending
tree
+ * in the next frame. This is not optimal as it will delay the flip for two
+ * frames.
+ *
+ * State 1:
+ * PIPE0 -- secondary DPP pipe --> (PIPE1)
+ * PIPE2 -- secondary DPP pipe --> NONE
+ *
+ * State 2:
+ * PIPE0 -- secondary DPP pipe --> NONE
+ * PIPE2 -- secondary DPP pipe --> (PIPE1)
+ *
+ * 2. We want to in general minimize the unnecessary changes in pipe topology.
+ * If a pipe is already added in current blending tree and there are no changes
+ * to plane topology, we don't want to swap it with another idle pipe
+ * unnecessarily in every update. Powering up and down a pipe would require a
+ * full update which delays the flip for 1 frame. If we use the original pipe
+ * we don't have to toggle its power. So we can flip faster.
+ */
+struct pipe_ctx *find_optimal_idle_pipe_as_secondary_dpp_pipe(
+ const struct resource_context *cur_res_ctx,
+ struct resource_context *new_res_ctx,
+ const struct resource_pool *pool,
+ const struct pipe_ctx *new_head)
+{
+ const struct pipe_ctx *cur_head, *cur_sec;
+ struct pipe_ctx *new_sec;
+ bool found = false;
+ int i;
+
+ cur_head = &cur_res_ctx->pipe_ctx[new_head->pipe_idx];
+ cur_sec = cur_head->bottom_pipe;
+
+ while (cur_sec) {
+ /* find an idle pipe used in current opp blend tree,
+* this is to avoid MPO pipe switching to different opp blending
+* tree
+*/
+ new_sec = &new_res_ctx->pipe_ctx[cur_sec->pipe_idx];
+ if (new_sec->plane_state == NULL && new_sec->stream == NULL) {
+ new_sec->pipe_idx = cur_sec->pipe_idx;
+
[PATCH 11/22] drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v addressable
From: Wenjing Liu [why] For timing with large v addressable visual confirm is just too small. It is difficult to tell visually which DPP we are using. On the other hand with timing with small v addressable visual confirm is too large and covers the UI area. [how] We calculate visual confirm dpp height offset based on v addressable so it stays relatively the same height i.e. 1/240 verticle portion of the screen. Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Wenjing Liu --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 43273e54147b..218fe2c401e1 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -72,7 +72,12 @@ #define VISUAL_CONFIRM_BASE_DEFAULT 3 #define VISUAL_CONFIRM_BASE_MIN 1 #define VISUAL_CONFIRM_BASE_MAX 10 -#define VISUAL_CONFIRM_DPP_OFFSET 3 +/* we choose 240 because it is a common denominator of common v addressable + * such as 2160, 1440, 1200, 960. So we take 1/240 portion of v addressable as + * the visual confirm dpp offset height. So visual confirm height can stay + * relatively the same independent from timing used. + */ +#define VISUAL_CONFIRM_DPP_OFFSET_DENO 240 #define DC_LOGGER_INIT(logger) @@ -1002,7 +1007,8 @@ static void adjust_recout_for_visual_confirm(struct rect *recout, if (dc->debug.visual_confirm == VISUAL_CONFIRM_DISABLE) return; - dpp_offset = pipe_ctx->plane_res.dpp->inst * VISUAL_CONFIRM_DPP_OFFSET; + dpp_offset = pipe_ctx->stream->timing.v_addressable / VISUAL_CONFIRM_DPP_OFFSET_DENO; + dpp_offset *= pipe_ctx->plane_res.dpp->inst; if ((dc->debug.visual_confirm_rect_height >= VISUAL_CONFIRM_BASE_MIN) && dc->debug.visual_confirm_rect_height <= VISUAL_CONFIRM_BASE_MAX) -- 2.25.1
[PATCH 09/22] drm/amd/display: always acquire MPO pipe for every blending tree
From: Wenjing Liu
[why]
We only acquire MPO pipe for blending tree where the plane clip will
be rendered. If an MPO plane is outside current ODM slice rect, we will
skip pipe allocation. With new programming policy we want to allocate
pipes for every ODM slice blending tree even for those whose ODM slice
rect doesn't intersect with plane clip. This is aligned with DML validation
so the pipe topology is programmed independently from the plane's
position and dst plane size.
[how]
- Remove the logic to allocate pipe only when the MPO plane intersects
with ODM slice and replace with the new logic to always allocate pipes.
- Remove the logic to tear down ODM configuration in favor for supporting
secondary MPO planes.
- Remove the logic to use full update when MPO goes accross ODM slice
boundary.
Reviewed-by: Jun Lei
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 94 ---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 235 +-
2 files changed, 12 insertions(+), 317 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 4326daa21094..413258db6746 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2701,96 +2701,6 @@ static enum surface_update_type
check_update_surfaces_for_stream(
return overall_type;
}
-static bool dc_check_is_fullscreen_video(struct rect src, struct rect
clip_rect)
-{
- int view_height, view_width, clip_x, clip_y, clip_width, clip_height;
-
- view_height = src.height;
- view_width = src.width;
-
- clip_x = clip_rect.x;
- clip_y = clip_rect.y;
-
- clip_width = clip_rect.width;
- clip_height = clip_rect.height;
-
- /* check for centered video accounting for off by 1 scaling truncation
*/
- if ((view_height - clip_y - clip_height <= clip_y + 1) &&
- (view_width - clip_x - clip_width <= clip_x + 1) &&
- (view_height - clip_y - clip_height >= clip_y - 1) &&
- (view_width - clip_x - clip_width >= clip_x - 1)) {
-
- /* when OS scales up/down to letter box, it may end up
-* with few blank pixels on the border due to truncating.
-* Add offset margin to account for this
-*/
- if (clip_x <= 4 || clip_y <= 4)
- return true;
- }
-
- return false;
-}
-
-static enum surface_update_type
check_boundary_crossing_for_windowed_mpo_with_odm(struct dc *dc,
- struct dc_surface_update *srf_updates, int surface_count,
- enum surface_update_type update_type)
-{
- enum surface_update_type new_update_type = update_type;
- int i, j;
- struct pipe_ctx *pipe = NULL;
- struct dc_stream_state *stream;
-
- /* Check that we are in windowed MPO with ODM
-* - look for MPO pipe by scanning pipes for first pipe matching
-* surface that has moved ( position change )
-* - MPO pipe will have top pipe
-* - check that top pipe has ODM pointer
-*/
- if ((surface_count > 1) && dc->config.enable_windowed_mpo_odm) {
- for (i = 0; i < surface_count; i++) {
- if (srf_updates[i].surface &&
srf_updates[i].scaling_info
- &&
srf_updates[i].surface->update_flags.bits.position_change) {
-
- for (j = 0; j < dc->res_pool->pipe_count; j++) {
- if (srf_updates[i].surface ==
dc->current_state->res_ctx.pipe_ctx[j].plane_state) {
- pipe =
&dc->current_state->res_ctx.pipe_ctx[j];
- stream = pipe->stream;
- break;
- }
- }
-
- if (pipe && pipe->top_pipe &&
(get_num_odm_splits(pipe->top_pipe) > 0) && stream
- &&
!dc_check_is_fullscreen_video(stream->src,
srf_updates[i].scaling_info->clip_rect)) {
- struct rect old_clip_rect,
new_clip_rect;
- bool old_clip_rect_left,
old_clip_rect_right, old_clip_rect_middle;
- bool new_clip_rect_left,
new_clip_rect_right, new_clip_rect_middle;
-
- old_clip_rect =
srf_updates[i].surface->clip_rect;
- new_clip_rect =
srf_updates[i].scaling_info->clip_rect;
-
- old_clip_rect_left = ((old_clip_rect.x
+ old_clip_rect.width) <= (stream->src.x + (stream->src.width/2)));
- old_clip_rect_right = (old_clip_rect
[PATCH 07/22] drm/amd/display: Use DTBCLK as refclk instead of DPREFCLK
From: Austin Zheng
[Why]
Flash of corruption observed when UCLK switching after transitioning
from DTBCLK to DPREFCLK on subVP(DP) + subVP(HDMI) config
Scenario where DPREFCLK is required instead of DTBCLK is not expected
[How]
Always set the DTBCLK source as DTBCLK0
Reviewed-by: Alvin Lee
Acked-by: Tom Chung
Signed-off-by: Austin Zheng
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
index 61ceff6bc0b1..921f58c0c729 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
@@ -281,7 +281,8 @@ static void dccg32_set_dpstreamclk(
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
/* set the dtbclk_p source */
- dccg32_set_dtbclk_p_src(dccg, src, otg_inst);
+ /* always program refclk as DTBCLK. No use-case expected to require
DPREFCLK as refclk */
+ dccg32_set_dtbclk_p_src(dccg, DTBCLK0, otg_inst);
/* enabled to select one of the DTBCLKs for pipe */
switch (dp_hpo_inst) {
--
2.25.1
[PATCH 08/22] drm/amd/display: support plane clip with zero recout size
From: Wenjing Liu
[why]
If plane clip is outside current pipe's ODM slice rect, our logic will
fail validation because we assume that when a pipe is acquired
to support a plane clip, it must blend some portion of the plane
on the screen. This assumption needs to be changed.
When a pipe is acquired to render the plane, we are now allowing
it to support a case where it can take minimum viewport and draw
with zero recout size when the plane clip is outside current ODM
slice rect. The reason is that we want to allocate and get the pipe
pre-programmed so it is ready to be rendered when user moves
the plane over to the current ODM slice with a fast update.
Whereas with the existing solution when user moves the plane
over, we will need to allocate a pipe as needed and power it up
and program it through a full update. This not only impacts the
user experience with unnecessary delay of a frame but also
doesn't generate any benefit to the user because DML doesn't
support it. DML will invalidate based on worst case scenario and
it doesn't depend on the plane location. So having our
programming sequence support such dynamic pipe allocation is
not meaningful anyway.
[how]
In build scaler params allow recout to be zero size and if viewport
is smaller than minimum, set minimum viewport size.
Reviewed-by: Jun Lei
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 57 +++
1 file changed, 33 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index d0f4b86cadf1..ea09830a649c 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1157,15 +1157,23 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx)
pipe_ctx, &plane_clip);
odm_slice = calculate_odm_slice_in_timing_active(pipe_ctx);
overlapping_area = intersect_rec(&mpc_slice_of_plane_clip, &odm_slice);
- /* shift the overlapping area so it is with respect to current ODM
-* slice's position
-*/
- pipe_ctx->plane_res.scl_data.recout = shift_rec(
- &overlapping_area,
- -odm_slice.x, -odm_slice.y);
+ if (overlapping_area.height > 0 &&
+ overlapping_area.width > 0) {
+ /* shift the overlapping area so it is with respect to current
+* ODM slice's position
+*/
+ pipe_ctx->plane_res.scl_data.recout = shift_rec(
+ &overlapping_area,
+ -odm_slice.x, -odm_slice.y);
+ adjust_recout_for_visual_confirm(
+ &pipe_ctx->plane_res.scl_data.recout,
+ pipe_ctx);
+ } else {
+ /* if there is no overlap, zero recout */
+ memset(&pipe_ctx->plane_res.scl_data.recout, 0,
+ sizeof(struct rect));
+ }
- adjust_recout_for_visual_confirm(&pipe_ctx->plane_res.scl_data.recout,
- pipe_ctx);
}
static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)
@@ -1292,6 +1300,7 @@ static void calculate_inits_and_viewports(struct pipe_ctx
*pipe_ctx)
struct rect recout_dst_in_active_timing;
struct rect recout_clip_in_active_timing;
struct rect recout_clip_in_recout_dst;
+ struct rect overlap_in_active_timing;
struct rect odm_slice = calculate_odm_slice_in_timing_active(pipe_ctx);
int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
|| data->format == PIXEL_FORMAT_420BPP10) ? 2 :
1;
@@ -1301,11 +1310,16 @@ static void calculate_inits_and_viewports(struct
pipe_ctx *pipe_ctx)
&data->recout, odm_slice.x, odm_slice.y);
recout_dst_in_active_timing = calculate_plane_rec_in_timing_active(
pipe_ctx, &plane_state->dst_rect);
- recout_clip_in_recout_dst = shift_rec(&recout_clip_in_active_timing,
- -recout_dst_in_active_timing.x,
- -recout_dst_in_active_timing.y);
- ASSERT(recout_clip_in_recout_dst.x >= 0 &&
- recout_clip_in_recout_dst.y >= 0);
+ overlap_in_active_timing = intersect_rec(&recout_clip_in_active_timing,
+ &recout_dst_in_active_timing);
+ if (overlap_in_active_timing.width > 0 &&
+ overlap_in_active_timing.height > 0)
+ recout_clip_in_recout_dst = shift_rec(&overlap_in_active_timing,
+ -recout_dst_in_active_timing.x,
+ -recout_dst_in_active_timing.y);
+ else
+ memset(&recout_clip_in_recout_dst, 0, sizeof(struct rect));
+
/*
* Work in recout rotation since that requires less
[PATCH 06/22] drm/amd/display: Set Stream Update Flags in commit_state_no_check
From: Austin Zheng
[Why]
Front-end would be programmed using the stream update flags set
from the previous update and the full update should be triggered
whenever commit_state_no_check gets called.
[How]
Set all stream update flags before programming the front-end
Clear all flags that got set to avoid redundant programming
Reviewed-by: Alvin Lee
Acked-by: Tom Chung
Signed-off-by: Austin Zheng
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index dfd31b169412..4326daa21094 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1925,6 +1925,14 @@ static enum dc_status dc_commit_state_no_check(struct dc
*dc, struct dc_state *c
dc_trigger_sync(dc, context);
+ /* Full update should unconditionally be triggered when
dc_commit_state_no_check is called */
+ for (i = 0; i < context->stream_count; i++) {
+ uint32_t prev_dsc_changed =
context->streams[i]->update_flags.bits.dsc_changed;
+
+ context->streams[i]->update_flags.raw = 0x;
+ context->streams[i]->update_flags.bits.dsc_changed =
prev_dsc_changed;
+ }
+
/* Program all planes within new context*/
if (dc->hwss.program_front_end_for_ctx) {
dc->hwss.interdependent_update_lock(dc, context, true);
@@ -2003,6 +2011,11 @@ static enum dc_status dc_commit_state_no_check(struct dc
*dc, struct dc_state *c
for (i = 0; i < context->stream_count; i++)
context->streams[i]->mode_changed = false;
+ /* Clear update flags that were set earlier to avoid redundant
programming */
+ for (i = 0; i < context->stream_count; i++) {
+ context->streams[i]->update_flags.raw = 0x0;
+ }
+
old_state = dc->current_state;
dc->current_state = context;
--
2.25.1
[PATCH 05/22] drm/amd/display: Make mpc32 functions available to future DCNs
From: Wesley Chalmers Make the mpc32 functions available for future DCNs to use Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Wesley Chalmers --- .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 28 - .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h | 61 +++ 2 files changed, 75 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c index c8041cfd594d..3082da04a63d 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c @@ -64,7 +64,7 @@ void mpc32_mpc_init(struct mpc *mpc) } } -static void mpc32_power_on_blnd_lut( +void mpc32_power_on_blnd_lut( struct mpc *mpc, uint32_t mpcc_id, bool power_on) @@ -120,7 +120,7 @@ static enum dc_lut_mode mpc32_get_post1dlut_current(struct mpc *mpc, uint32_t mp return mode; } -static void mpc32_configure_post1dlut( +void mpc32_configure_post1dlut( struct mpc *mpc, uint32_t mpcc_id, bool is_ram_a) @@ -163,7 +163,7 @@ static void mpc32_post1dlut_get_reg_field( } /*program blnd lut RAM A*/ -static void mpc32_program_post1dluta_settings( +void mpc32_program_post1dluta_settings( struct mpc *mpc, uint32_t mpcc_id, const struct pwl_params *params) @@ -192,7 +192,7 @@ static void mpc32_program_post1dluta_settings( } /*program blnd lut RAM B*/ -static void mpc32_program_post1dlutb_settings( +void mpc32_program_post1dlutb_settings( struct mpc *mpc, uint32_t mpcc_id, const struct pwl_params *params) @@ -220,7 +220,7 @@ static void mpc32_program_post1dlutb_settings( cm_helper_program_gamcor_xfer_func(mpc->ctx, params, &gam_regs); } -static void mpc32_program_post1dlut_pwl( +void mpc32_program_post1dlut_pwl( struct mpc *mpc, uint32_t mpcc_id, const struct pwl_result_data *rgb, @@ -321,7 +321,7 @@ static enum dc_lut_mode mpc32_get_shaper_current(struct mpc *mpc, uint32_t mpcc_ } -static void mpc32_configure_shaper_lut( +void mpc32_configure_shaper_lut( struct mpc *mpc, bool is_ram_a, uint32_t mpcc_id) @@ -336,7 +336,7 @@ static void mpc32_configure_shaper_lut( } -static void mpc32_program_shaper_luta_settings( +void mpc32_program_shaper_luta_settings( struct mpc *mpc, const struct pwl_params *params, uint32_t mpcc_id) @@ -486,7 +486,7 @@ static void mpc32_program_shaper_luta_settings( } -static void mpc32_program_shaper_lutb_settings( +void mpc32_program_shaper_lutb_settings( struct mpc *mpc, const struct pwl_params *params, uint32_t mpcc_id) @@ -637,7 +637,7 @@ static void mpc32_program_shaper_lutb_settings( } -static void mpc32_program_shaper_lut( +void mpc32_program_shaper_lut( struct mpc *mpc, const struct pwl_result_data *rgb, uint32_t num, @@ -671,7 +671,7 @@ static void mpc32_program_shaper_lut( } -static void mpc32_power_on_shaper_3dlut( +void mpc32_power_on_shaper_3dlut( struct mpc *mpc, uint32_t mpcc_id, bool power_on) @@ -789,7 +789,7 @@ static enum dc_lut_mode get3dlut_config( } -static void mpc32_select_3dlut_ram( +void mpc32_select_3dlut_ram( struct mpc *mpc, enum dc_lut_mode mode, bool is_color_channel_12bits, @@ -803,7 +803,7 @@ static void mpc32_select_3dlut_ram( } -static void mpc32_select_3dlut_ram_mask( +void mpc32_select_3dlut_ram_mask( struct mpc *mpc, uint32_t ram_selection_mask, uint32_t mpcc_id) @@ -816,7 +816,7 @@ static void mpc32_select_3dlut_ram_mask( } -static void mpc32_set3dlut_ram12( +void mpc32_set3dlut_ram12( struct mpc *mpc, const struct dc_rgb *lut, uint32_t entries, @@ -848,7 +848,7 @@ static void mpc32_set3dlut_ram12( } -static void mpc32_set3dlut_ram10( +void mpc32_set3dlut_ram10( struct mpc *mpc, const struct dc_rgb *lut, uint32_t entries, diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h index 2c2ecd053806..9ac584fa89ce 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h @@ -332,4 +332,65 @@ void dcn32_mpc_construct(struct dcn30_mpc *mpc30, int num_mpcc, int num_rmu); +void mpc32_power_on_blnd_lut( + struct mpc *mpc, + uint32_t mpcc_id, + bool power_on); +void mpc32_program_post1dlut_pwl( + struct mpc *mpc, + uint32_t mpcc_id, + const s
[PATCH 04/22] drm/amd/display: Fix a bug when searching for insert_above_mpcc
From: Wesley Chalmers [WHY] Currently, when insert_plane is called with insert_above_mpcc parameter that is equal to tree->opp_list, the function returns NULL. [HOW] Instead, the function should insert the plane at the top of the tree. Cc: Mario Limonciello Cc: Alex Deucher Cc: sta...@vger.kernel.org Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Wesley Chalmers --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c index 8e9384094f6d..f2f55565e98a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c @@ -212,8 +212,9 @@ struct mpcc *mpc1_insert_plane( /* check insert_above_mpcc exist in tree->opp_list */ struct mpcc *temp_mpcc = tree->opp_list; - while (temp_mpcc && temp_mpcc->mpcc_bot != insert_above_mpcc) - temp_mpcc = temp_mpcc->mpcc_bot; + if (temp_mpcc != insert_above_mpcc) + while (temp_mpcc && temp_mpcc->mpcc_bot != insert_above_mpcc) + temp_mpcc = temp_mpcc->mpcc_bot; if (temp_mpcc == NULL) return NULL; } -- 2.25.1
[PATCH 03/22] drm/amd/display: Enable DPIA trace with DC debug mask
From: Stylon Wang
[Why]
DPIA traces from DMUB is not enabled by default, which is
less convenient to debug DPIA related issues because we have
to resort to other means to enable DPIA trace.
[How]
Reuse existing DC debug mask to enable DPIA trace log from
kernel command line. This makes debugging DPIA issues easier
especially when system power state (suspend/reboot) is involved.
To turn on DPIA trace, simply add "amdgpu.dcdebugmask=0x80" to
kernel command line.
Reviewed-by: Aurabindo Pillai
Acked-by: Tom Chung
Signed-off-by: Stylon Wang
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 32fb551862b0..d21241af1aa5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1822,9 +1822,14 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
* It is expected that DMUB will resend any pending notifications at
this point, for
* example HPD from DPIA.
*/
- if (dc_is_dmub_outbox_supported(adev->dm.dc))
+ if (dc_is_dmub_outbox_supported(adev->dm.dc)) {
dc_enable_dmub_outbox(adev->dm.dc);
+ /* DPIA trace goes to dmesg logs only if outbox is enabled */
+ if (amdgpu_dc_debug_mask & DC_ENABLE_DPIA_TRACE)
+ dc_dmub_srv_enable_dpia_trace(adev->dm.dc);
+ }
+
if (amdgpu_dm_initialize_drm_device(adev)) {
DRM_ERROR(
"amdgpu: failed to initialize sw for display support.\n");
--
2.25.1
[PATCH 02/22] drm/amd/display: Add interface to enable DPIA trace
From: Stylon Wang
[Why]
DPIA traces from DMUB is not enabled by default, which is
less convenient to debug DPIA related issues because we have
to resort to other debug tools to enable DPIA trace.
[How]
Exposes interfaces to update trace mask from the DMUB GPING commands.
Also provides DC implementations to enable DPIA trace.
Reviewed-by: Aurabindo Pillai
Acked-by: Tom Chung
Signed-off-by: Stylon Wang
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 29 +++
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 3 ++
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 18
3 files changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 24433409d7de..8c75f7510880 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1021,3 +1021,32 @@ bool dc_dmub_check_min_version(struct dmub_srv *srv)
return true;
return srv->hw_funcs.is_psrsu_supported(srv);
}
+
+void dc_dmub_srv_enable_dpia_trace(const struct dc *dc)
+{
+ struct dc_dmub_srv *dc_dmub_srv = dc->ctx->dmub_srv;
+ struct dmub_srv *dmub;
+ enum dmub_status status;
+ static const uint32_t timeout_us = 30;
+
+ if (!dc_dmub_srv || !dc_dmub_srv->dmub) {
+ DC_LOG_ERROR("%s: invalid parameters.", __func__);
+ return;
+ }
+
+ dmub = dc_dmub_srv->dmub;
+
+ status = dmub_srv_send_gpint_command(dmub,
DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD1, 0x0010, timeout_us);
+ if (status != DMUB_STATUS_OK) {
+ DC_LOG_ERROR("timeout updating trace buffer mask word\n");
+ return;
+ }
+
+ status = dmub_srv_send_gpint_command(dmub,
DMUB_GPINT__UPDATE_TRACE_BUFFER_MASK, 0x, timeout_us);
+ if (status != DMUB_STATUS_OK) {
+ DC_LOG_ERROR("timeout updating trace buffer mask word\n");
+ return;
+ }
+
+ DC_LOG_DEBUG("Enabled DPIA trace\n");
+}
\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
index 099f94b6107c..bb3fe162dd93 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
@@ -87,4 +87,7 @@ void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv
*dc_dmub_srv);
void dc_send_update_cursor_info_to_dmu(struct pipe_ctx *pCtx, uint8_t
pipe_idx);
bool dc_dmub_check_min_version(struct dmub_srv *srv);
+
+void dc_dmub_srv_enable_dpia_trace(const struct dc *dc);
+
#endif /* _DMUB_DC_SRV_H_ */
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index adde1d84d773..f849d0159720 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -658,6 +658,24 @@ enum dmub_gpint_command {
* DESC: Notifies DMCUB detection is done so detection required can be
cleared.
*/
DMUB_GPINT__NOTIFY_DETECTION_DONE = 12,
+ /**
+* DESC: Updates the trace buffer lower 32-bit mask.
+* ARGS: The new mask
+* RETURN: Lower 32-bit mask.
+*/
+ DMUB_GPINT__UPDATE_TRACE_BUFFER_MASK = 101,
+ /**
+* DESC: Updates the trace buffer lower 32-bit mask.
+* ARGS: The new mask
+* RETURN: Lower 32-bit mask.
+*/
+ DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD0 = 102,
+ /**
+* DESC: Updates the trace buffer mask bi0~bit15.
+* ARGS: The new mask
+* RETURN: Lower 32-bit mask.
+*/
+ DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD1 = 103,
};
/**
--
2.25.1
[PATCH 01/22] drm/amd/display: fix a regression in blank pixel data caused by coding mistake
From: Wenjing Liu
[why]
There was unfortunately a coding mistake. It gets caught with an ultrawide
monitor
that requires ODM 4:1 combine. We are blanking or unblanking pixel data we
are supposed to enumerate through all ODM pipes and program DPG for each
of those pipes. However the coding mistake causes us to program only the
first and last ODM pipes.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Martin Leung
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c| 2 +-
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index fc1af33dbe3c..b196b7ff1a0d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1084,7 +1084,7 @@ void dcn20_blank_pixel_data(
while (odm_pipe->next_odm_pipe) {
dc->hwss.set_disp_pattern_generator(dc,
- pipe_ctx,
+ odm_pipe,
test_pattern,
test_pattern_color_space,
stream->timing.display_color_depth,
diff --git a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
index bce0428ad612..9fd68a11fad2 100644
--- a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
+++ b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
@@ -513,7 +513,7 @@ static void set_crtc_test_pattern(struct dc_link *link,
odm_opp = odm_pipe->stream_res.opp;
odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, ¶ms);
link->dc->hwss.set_disp_pattern_generator(link->dc,
- pipe_ctx,
+ odm_pipe,
controller_test_pattern,
controller_color_space,
color_depth,
--
2.25.1
[PATCH 00/22] DC Patches Aug 04 2023
This DC patchset brings improvements in multiple areas. In summary, we have: - Fix a regression in blank pixel data caused by coding mistake - Fix a bug when searching for insert_above_mpcc - Fix backlight off cmd for OLED panel - Update add plane to context logic with a new algorithm - Adjust visual confirm dpp height offset to be 1/240 of v addressable - Add interface to enable DPIA trace - Support plane clip with zero recout size - Blocking invalid 420 modes on HDMI TMDS for DCN31 and DCN314 - Make mpc32 functions available to future DCNs - Change HDCP update sequence for DM Cc: Daniel Wheeler Alvin Lee (1): drm/amd/display: Use max memclk variable when setting max memclk Austin Zheng (2): drm/amd/display: Set Stream Update Flags in commit_state_no_check drm/amd/display: Use DTBCLK as refclk instead of DPREFCLK Bhawanpreet Lakha (1): drm/amd/display: Change HDCP update sequence for DM Leo Chen (3): drm/amd/display: Revert "dc: read down-spread percentage from lut to adjust dprefclk" drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN31 drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN314 Martin Leung (1): drm/amd/display: Promote DAL to 3.2.246 Mike Hsieh (1): drm/amd/display: Add vendor Id for reference Stylon Wang (2): drm/amd/display: Add interface to enable DPIA trace drm/amd/display: Enable DPIA trace with DC debug mask Swapnil Patel (1): drm/amd/display: Fix backlight off cmd for OLED panel Wenjing Liu (8): drm/amd/display: fix a regression in blank pixel data caused by coding mistake drm/amd/display: support plane clip with zero recout size drm/amd/display: always acquire MPO pipe for every blending tree drm/amd/display: update add plane to context logic with a new algorithm drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v addressable drm/amd/display: do not treat clip_rect size change as a scaling change drm/amd/display: move idle pipe allocation logic into dcn specific layer drm/amd/display: rename acquire_idle_pipe_for_layer to acquire_free_pipe_as_sec_dpp_pipe Wesley Chalmers (2): drm/amd/display: Fix a bug when searching for insert_above_mpcc drm/amd/display: Make mpc32 functions available to future DCNs .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 +- .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 80 ++- .../dc/clk_mgr/dcn314/dcn314_clk_mgr.c| 32 +- .../dc/clk_mgr/dcn314/dcn314_clk_mgr.h| 7 - .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 111 +--- .../gpu/drm/amd/display/dc/core/dc_resource.c | 589 -- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 29 + drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 3 + .../display/dc/dce110/dce110_hw_sequencer.c | 3 +- .../amd/display/dc/dce110/dce110_resource.c | 12 +- .../gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 5 +- .../drm/amd/display/dc/dcn10/dcn10_resource.c | 15 +- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 2 +- .../drm/amd/display/dc/dcn20/dcn20_resource.c | 15 +- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 7 +- .../amd/display/dc/dcn201/dcn201_resource.c | 15 +- .../drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +- .../drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +- .../amd/display/dc/dcn301/dcn301_resource.c | 2 +- .../amd/display/dc/dcn302/dcn302_resource.c | 2 +- .../amd/display/dc/dcn303/dcn303_resource.c | 2 +- .../drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +- .../amd/display/dc/dcn314/dcn314_resource.c | 2 +- .../amd/display/dc/dcn315/dcn315_resource.c | 2 +- .../amd/display/dc/dcn316/dcn316_resource.c | 2 +- .../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 3 +- .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 28 +- .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h | 61 ++ .../drm/amd/display/dc/dcn32/dcn32_resource.c | 188 +++--- .../drm/amd/display/dc/dcn32/dcn32_resource.h | 8 +- .../amd/display/dc/dcn321/dcn321_resource.c | 2 +- .../drm/amd/display/dc/dml/calcs/dcn_calcs.c | 2 +- .../dc/dml/dcn31/display_mode_vba_31.c| 4 +- .../dc/dml/dcn314/display_mode_vba_314.c | 4 +- .../gpu/drm/amd/display/dc/inc/core_types.h | 38 +- drivers/gpu/drm/amd/display/dc/inc/link.h | 1 + drivers/gpu/drm/amd/display/dc/inc/resource.h | 21 +- .../display/dc/link/accessories/link_dp_cts.c | 2 +- .../drm/amd/display/dc/link/link_factory.c| 1 + .../link/protocols/link_edp_panel_control.c | 19 + .../link/protocols/link_edp_panel_control.h | 1 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 18 + .../amd/display/include/ddc_service_types.h | 1 + 45 files changed, 651 insertions(+), 705 deletions(-) -- 2.25.1
[PATCH] drm/amdgpu: Report vbios version instead of PN
Report VBIOS version in vbios_version sysfs node instead of part number. Part number remains constant for a SKU type. Signed-off-by: Lijo Lazar --- drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c index dce9e7d5e4ec..73ee14f7a9a4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c @@ -1776,7 +1776,7 @@ static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev, struct amdgpu_device *adev = drm_to_adev(ddev); struct atom_context *ctx = adev->mode_info.atom_context; - return sysfs_emit(buf, "%s\n", ctx->vbios_pn); + return sysfs_emit(buf, "%s\n", ctx->vbios_ver_str); } static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version, -- 2.25.1
[PATCH] drm/amd/pm: Fix SMU v13.0.6 energy reporting
Energy counter should be reported in units of 15.259 uJ. Don't apply any conversion. Signed-off-by: Lijo Lazar --- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c index 00eba3f950c6..90e003fbca81 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c @@ -1965,9 +1965,8 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table gpu_metrics->average_socket_power = SMUQ10_TO_UINT(metrics->SocketPower); - /* Energy is reported in 15.625mJ units */ - gpu_metrics->energy_accumulator = - SMUQ10_TO_UINT(metrics->SocketEnergyAcc); + /* Energy counter reported in 15.259uJ (2^-16) units */ + gpu_metrics->energy_accumulator = metrics->SocketEnergyAcc; gpu_metrics->current_gfxclk = SMUQ10_TO_UINT(metrics->GfxclkFrequency[xcc0]); -- 2.25.1
[PATCH] drm/amdgpu: Refactor 'amdgpu_connector_dvi_detect' in amdgpu_connectors.c
Fixes the below:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: Missing a blank line after declarations
WARNING: Too many leading tabs - consider code refactoring
+ if
(list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
WARNING: Too many leading tabs - consider code refactoring
+ if
(!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) {
Cc: Guchun Chen
Cc: Christian König
Cc: Alex Deucher
Cc: "Pan, Xinhui"
Cc: Rodrigo Siqueira
Cc: Aurabindo Pillai
Signed-off-by: Srinivasan Shanmugam
---
.../gpu/drm/amd/amdgpu/amdgpu_connectors.c| 69 +++
1 file changed, 42 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
index d34037b85cf8..173e836b00fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
@@ -103,7 +103,7 @@ int amdgpu_connector_get_monitor_bpc(struct drm_connector
*connector)
struct amdgpu_connector *amdgpu_connector =
to_amdgpu_connector(connector);
struct amdgpu_connector_atom_dig *dig_connector;
int bpc = 8;
- unsigned mode_clock, max_tmds_clock;
+ unsigned int mode_clock, max_tmds_clock;
switch (connector->connector_type) {
case DRM_MODE_CONNECTOR_DVII:
@@ -255,6 +255,7 @@ struct edid *amdgpu_connector_edid(struct drm_connector
*connector)
return amdgpu_connector->edid;
} else if (edid_blob) {
struct edid *edid = kmemdup(edid_blob->data, edid_blob->length,
GFP_KERNEL);
+
if (edid)
amdgpu_connector->edid = edid;
}
@@ -588,6 +589,7 @@ static int amdgpu_connector_set_property(struct
drm_connector *connector,
amdgpu_encoder = to_amdgpu_encoder(connector->encoder);
} else {
const struct drm_connector_helper_funcs
*connector_funcs = connector->helper_private;
+
amdgpu_encoder =
to_amdgpu_encoder(connector_funcs->best_encoder(connector));
}
@@ -804,6 +806,7 @@ static int amdgpu_connector_set_lcd_property(struct
drm_connector *connector,
amdgpu_encoder = to_amdgpu_encoder(connector->encoder);
else {
const struct drm_connector_helper_funcs *connector_funcs =
connector->helper_private;
+
amdgpu_encoder =
to_amdgpu_encoder(connector_funcs->best_encoder(connector));
}
@@ -986,6 +989,41 @@ amdgpu_connector_check_hpd_status_unchanged(struct
drm_connector *connector)
return false;
}
+static void amdgpu_connector_shared_ddc(enum drm_connector_status *status,
+ struct drm_connector *connector,
+ struct amdgpu_connector
*amdgpu_connector)
+{
+ struct drm_connector *list_connector;
+ struct drm_connector_list_iter iter;
+ struct amdgpu_connector *list_amdgpu_connector;
+ struct drm_device *dev = connector->dev;
+ struct amdgpu_device *adev = drm_to_adev(dev);
+
+ if (amdgpu_connector->shared_ddc && *status ==
connector_status_connected) {
+ drm_connector_list_iter_begin(dev, &iter);
+ drm_for_each_connector_iter(list_connector,
+ &iter) {
+ if (connector == list_connector)
+ continue;
+ list_amdgpu_connector =
to_amdgpu_connector(list_connector);
+ if (list_amdgpu_connector->shared_ddc &&
+ list_amdgpu_connector->ddc_bus->rec.i2c_id ==
+amdgpu_connector->ddc_bus->rec.i2c_id) {
+ /* cases where both connectors are digital */
+ if (list_connector->connector_type !=
DRM_MODE_CONNECTOR_VGA) {
+ /* hpd is our only option in this case
*/
+ if (!amdgpu_display_hpd_sense(adev,
+
amdgpu_connector->hpd.hpd)) {
+
amdgpu_connector_free_edid(connector);
+ *status =
connector_status_disconnected;
+ }
+ }
+ }
+ }
+ drm_connector_list_iter_end(&iter);
+ }
+}
+
/*
* DVI is complicated
* Do a DDC probe, if DDC probe passes, get the full EDID so
@@ -1072,32 +1110,7 @@ amdgpu_connector_dvi_detect(struct drm_connector
*connector, bool force)
* DDC line. The latter is more complex because with
DVI<->HDMI adapters
RE: [PATCH] drm/amdgpu: Fix unused variable ‘i’ in 'gfxhub_v1_2_xcc_gart_enable'
[Public]
Reviewed-by: Guchun Chen
> -Original Message-
> From: SHANMUGAM, SRINIVASAN
> Sent: Wednesday, August 2, 2023 9:39 AM
> To: Koenig, Christian ; Deucher, Alexander
> ; Chen, Guchun ;
> Pan, Xinhui
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
>
> Subject: [PATCH] drm/amdgpu: Fix unused variable ‘i’ in
> 'gfxhub_v1_2_xcc_gart_enable'
>
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c: In function
> ‘gfxhub_v1_2_xcc_gart_enable’:
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c:405:6: warning: unused
> variable ‘i’ [-Wunused-variable]
> 405 | int i;
> |
>
> Cc: Guchun Chen
> Cc: Christian König
> Cc: Alex Deucher
> Cc: "Pan, Xinhui"
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> index db7ad3af7439..0834af771549 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> @@ -402,8 +402,6 @@ static void
> gfxhub_v1_2_xcc_program_invalidation(struct amdgpu_device *adev, static
> int gfxhub_v1_2_xcc_gart_enable(struct amdgpu_device *adev,
> uint32_t xcc_mask)
> {
> - int i;
> -
> /* GART Enable. */
> gfxhub_v1_2_xcc_init_gart_aperture_regs(adev, xcc_mask);
> gfxhub_v1_2_xcc_init_system_aperture_regs(adev, xcc_mask);
> --
> 2.25.1
[PATCH] drm/amdgpu: Fix unused variable ‘i’ in 'gfxhub_v1_2_xcc_gart_enable'
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c: In function
‘gfxhub_v1_2_xcc_gart_enable’:
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c:405:6: warning: unused variable ‘i’
[-Wunused-variable]
405 | int i;
|
Cc: Guchun Chen
Cc: Christian König
Cc: Alex Deucher
Cc: "Pan, Xinhui"
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index db7ad3af7439..0834af771549 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
@@ -402,8 +402,6 @@ static void gfxhub_v1_2_xcc_program_invalidation(struct
amdgpu_device *adev,
static int gfxhub_v1_2_xcc_gart_enable(struct amdgpu_device *adev,
uint32_t xcc_mask)
{
- int i;
-
/* GART Enable. */
gfxhub_v1_2_xcc_init_gart_aperture_regs(adev, xcc_mask);
gfxhub_v1_2_xcc_init_system_aperture_regs(adev, xcc_mask);
--
2.25.1
RE: [PATCH] gpu: drm: amd: amdgpu: Fix calls to dev_{info,err}
[Public]
Hi Bert,
Thanks for your patch. However, I guess adding a dev member for printing
purpose only does not introduce much benefit. So, instead, the culprit commits
have been reverted.
https://patchwork.freedesktop.org/patch/550297/
https://patchwork.freedesktop.org/patch/550396/
Regards,
Guchun
> -Original Message-
> From: Bert Karwatzki
> Sent: Monday, July 31, 2023 5:55 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: SHANMUGAM, SRINIVASAN ;
> Chen, Guchun ; Alex Deucher
>
> Subject: [PATCH] gpu: drm: amd: amdgpu: Fix calls to dev_{info,err}
>
> Commit b0bd0a92b8158ea9c809d885e0f0c21518bdbd14 introduced
> dev_{info,err} calls which failed (leading to a hang on boot) because of an
> incorrect usage of the container_of macro. This fixes the error by introducing
> a pointer to the device as an additional element in struct amdgpu_atpx and
> struct radeon_atpx.
>
> Fixes: https://gitlab.freedesktop.org/drm/amd/-/issues/2744
> Signed-off-by: Bert Karwatzki
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 40 +--
> drivers/gpu/drm/radeon/radeon_atpx_handler.c | 30 +++---
> 2 files changed, 32 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> index 6f241c574665..29242ecec7b0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> @@ -37,6 +37,7 @@ struct amdgpu_atpx_functions {
>
> struct amdgpu_atpx {
> acpi_handle handle;
> + struct device *dev;
> struct amdgpu_atpx_functions functions;
> bool is_hybrid;
> bool dgpu_req_power_for_displays;
> @@ -104,22 +105,20 @@ void *amdgpu_atpx_get_dhandle(void)
> /**
> * amdgpu_atpx_call - call an ATPX method
> *
> - * @handle: acpi handle
> + * @atpx: amdgpu atpx struct
> * @function: the ATPX function to execute
> * @params: ATPX function params
> *
> * Executes the requested ATPX function (all asics).
> * Returns a pointer to the acpi output buffer.
> */
> -static union acpi_object *amdgpu_atpx_call(acpi_handle handle, int
> function,
> +static union acpi_object *amdgpu_atpx_call(struct amdgpu_atpx *atpx,
> +int
> function,
> struct acpi_buffer *params)
> {
> acpi_status status;
> union acpi_object atpx_arg_elements[2];
> struct acpi_object_list atpx_arg;
> struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
> - struct acpi_device *adev = container_of(handle, struct acpi_device,
> handle);
> - struct device *dev = &adev->dev;
>
> atpx_arg.count = 2;
> atpx_arg.pointer = &atpx_arg_elements[0]; @@ -137,11 +136,11
> @@ static union acpi_object *amdgpu_atpx_call(acpi_handle handle, int
> function,
> atpx_arg_elements[1].integer.value = 0;
> }
>
> - status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer);
> + status = acpi_evaluate_object(atpx->handle, NULL, &atpx_arg,
> &buffer);
>
> /* Fail only if calling the method fails and ATPX is supported */
> if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
> - dev_err(dev, "failed to evaluate ATPX got %s\n",
> + dev_err(atpx->dev, "failed to evaluate ATPX got %s\n",
> acpi_format_exception(status));
> kfree(buffer.pointer);
> return NULL;
> @@ -183,15 +182,13 @@ static void amdgpu_atpx_parse_functions(struct
> amdgpu_atpx_functions *f, u32 mas
> static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx) {
> u32 valid_bits = 0;
> - struct acpi_device *adev = container_of(atpx->handle, struct
> acpi_device, handle);
> - struct device *dev = &adev->dev;
>
> if (atpx->functions.px_params) {
> union acpi_object *info;
> struct atpx_px_params output;
> size_t size;
>
> - info = amdgpu_atpx_call(atpx->handle,
> ATPX_FUNCTION_GET_PX_PARAMETERS, NULL);
> + info = amdgpu_atpx_call(atpx,
> ATPX_FUNCTION_GET_PX_PARAMETERS,
> NULL);
> if (!info)
> return -EIO;
>
> @@ -199,7 +196,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx
> *atpx)
>
> size = *(u16 *) info->buffer.pointer;
> if (size < 10) {
> - dev_err(dev, "ATPX buffer is too small: %zu\n", size);
> + dev_err(atpx->dev, "ATPX buffer is too small: %zu\n",
> size);
> kfree(info);
> return -EINVAL;
> }
> @@ -232,11 +229,11 @@ static int amdgpu_atpx_validate(struct
> amdgpu_atpx *atpx)
> atpx->is_hybrid = false;
> if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
> if (amdgpu_atpx_priv.quirks &
> AMDGPU_PX_QUIRK_FORCE_ATPX) {
> - dev_info(dev, "ATPX Hybrid Graphics, forcing to
> ATPX\n");
> + dev_in
RE: [PATCH -next] drm/amd/pm: Remove many unnecessary NULL values
[AMD Official Use Only - General]
Reviewed-by: Evan Quan
> -Original Message-
> From: Ruan Jinjie
> Sent: Tuesday, August 1, 2023 8:55 PM
> To: Quan, Evan ; Deucher, Alexander
> ; Koenig, Christian
> ; Pan, Xinhui ;
> airl...@gmail.com; dan...@ffwll.ch; mrip...@kernel.org;
> tzimmerm...@suse.de; d...@mailo.com; amd-gfx@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: ruanjin...@huawei.com
> Subject: [PATCH -next] drm/amd/pm: Remove many unnecessary NULL values
>
> Ther are many pointers assigned first, which need not to be initialized, so
> remove the NULL assignment.
>
> Signed-off-by: Ruan Jinjie
> ---
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c | 2 +-
> drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 2 +-
> drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c| 2 +-
> drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c | 2 +-
> drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c | 2 +-
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> index 182118e3fd5f..5794b64507bf 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> @@ -1237,7 +1237,7 @@ static int get_vce_clock_voltage_limit_table(struct
> pp_hwmgr *hwmgr,
> const VCEClockInfoArray*array)
> {
> unsigned long i;
> - struct phm_vce_clock_voltage_dependency_table *vce_table = NULL;
> + struct phm_vce_clock_voltage_dependency_table *vce_table;
>
> vce_table = kzalloc(struct_size(vce_table, entries, table->numEntries),
> GFP_KERNEL);
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> index 4bc8db1be738..9e4228232f02 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> @@ -2732,7 +2732,7 @@ static bool ci_is_dpm_running(struct pp_hwmgr
> *hwmgr)
>
> static int ci_smu_init(struct pp_hwmgr *hwmgr)
> {
> - struct ci_smumgr *ci_priv = NULL;
> + struct ci_smumgr *ci_priv;
>
> ci_priv = kzalloc(sizeof(struct ci_smumgr), GFP_KERNEL);
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c
> b/drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c
> index 02c094a06605..5e43ad2b2956 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c
> @@ -332,7 +332,7 @@ static bool fiji_is_hw_avfs_present(struct pp_hwmgr
> *hwmgr)
>
> static int fiji_smu_init(struct pp_hwmgr *hwmgr)
> {
> - struct fiji_smumgr *fiji_priv = NULL;
> + struct fiji_smumgr *fiji_priv;
>
> fiji_priv = kzalloc(sizeof(struct fiji_smumgr), GFP_KERNEL);
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
> b/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
> index 060fc140c574..97d9802fe673 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
> @@ -259,7 +259,7 @@ static int iceland_start_smu(struct pp_hwmgr
> *hwmgr)
>
> static int iceland_smu_init(struct pp_hwmgr *hwmgr)
> {
> - struct iceland_smumgr *iceland_priv = NULL;
> + struct iceland_smumgr *iceland_priv;
>
> iceland_priv = kzalloc(sizeof(struct iceland_smumgr), GFP_KERNEL);
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c
> b/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c
> index acbe41174d7e..6fe6e6abb5d8 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c
> @@ -226,7 +226,7 @@ static int tonga_start_smu(struct pp_hwmgr
> *hwmgr)
>
> static int tonga_smu_init(struct pp_hwmgr *hwmgr)
> {
> - struct tonga_smumgr *tonga_priv = NULL;
> + struct tonga_smumgr *tonga_priv;
>
> tonga_priv = kzalloc(sizeof(struct tonga_smumgr), GFP_KERNEL);
> if (tonga_priv == NULL)
> --
> 2.34.1
[PATCH] drm/amd: fix debugfs access for discovery blob
Accessing the blob for amdgpu discovery from debugfs triggers:
[ 1924.487667] kernel BUG at mm/usercopy.c:102!
usercopy_abort() explains that it needs to be solved by creating
a cache to store the data.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2748#note_2023519
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 17 -
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 ++
3 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a3b86b86dc477..66a2251bdeba4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -791,8 +791,11 @@ struct amdgpu_device {
boolaccel_working;
struct notifier_block acpi_nb;
struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
- struct debugfs_blob_wrapper debugfs_vbios_blob;
- struct debugfs_blob_wrapper debugfs_discovery_blob;
+#if defined(CONFIG_DEBUG_FS)
+ struct debugfs_blob_wrapper debugfs_vbios_blob;
+ struct debugfs_blob_wrapper debugfs_discovery_blob;
+ struct kmem_cache *discovery_blob_cache;
+#endif
struct mutexsrbm_mutex;
/* GRBM index mutex. Protects concurrent access to GRBM index */
struct mutexgrbm_idx_mutex;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 56e89e76ff179..55ea5be14b188 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -2180,7 +2180,15 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
debugfs_create_blob("amdgpu_vbios", 0444, root,
&adev->debugfs_vbios_blob);
- adev->debugfs_discovery_blob.data = adev->mman.discovery_bin;
+
+ adev->discovery_blob_cache =
kmem_cache_create_usercopy("amdgpu_discovery",
+
adev->mman.discovery_tmr_size,
+ 0, 0, 0,
+
adev->mman.discovery_tmr_size,
+ NULL);
+ adev->debugfs_discovery_blob.data =
kmem_cache_alloc(adev->discovery_blob_cache, GFP_KERNEL);
+ memcpy(adev->debugfs_discovery_blob.data, adev->mman.discovery_bin,
+ adev->mman.discovery_tmr_size);
adev->debugfs_discovery_blob.size = adev->mman.discovery_tmr_size;
debugfs_create_blob("amdgpu_discovery", 0444, root,
&adev->debugfs_discovery_blob);
@@ -2188,6 +2196,12 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
return 0;
}
+void amdgpu_debugfs_fini(struct amdgpu_device *adev)
+{
+ kmem_cache_free(adev->discovery_blob_cache,
adev->debugfs_discovery_blob.data);
+ kmem_cache_destroy(adev->discovery_blob_cache);
+}
+
#else
int amdgpu_debugfs_init(struct amdgpu_device *adev)
{
@@ -2197,4 +2211,5 @@ int amdgpu_debugfs_regs_init(struct amdgpu_device *adev)
{
return 0;
}
+inline void amdgpu_debugfs_fini(struct amdgpu_device *adev) {}
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0593ef8fe0a63..1a3b30dff5171 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2276,6 +2276,8 @@ amdgpu_pci_remove(struct pci_dev *pdev)
struct drm_device *dev = pci_get_drvdata(pdev);
struct amdgpu_device *adev = drm_to_adev(dev);
+ amdgpu_debugfs_fini(adev);
+
amdgpu_xcp_dev_unplug(adev);
drm_dev_unplug(dev);
--
2.34.1
Re: [PATCH v2] drm/amdgpu: Prefer pr_err/_warn/_notice over printk in amdgpu_atpx_handler.c
On 2023-08-01 01:01, Srinivasan Shanmugam wrote:
> Fixes the following style issues:
>
> ERROR: open brace '{' following function definitions go on the next line
> WARNING: printk() should include KERN_ facility level
>
> Cc: Guchun Chen
> Cc: Christian König
> Cc: Alex Deucher
> Cc: Bert Karwatzki
> Cc: "Pan, Xinhui"
> Cc: Luben Tuikov
> Signed-off-by: Srinivasan Shanmugam
Yeah, looks good.
Reviewed-by: Luben Tuikov
Regards,
Luben
> ---
> v2:
> - Updated commit title as per log levels updated in this patch
> - Updated with appropriate log levels (Luben)
>
> .../gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 29 +++
> 1 file changed, 17 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> index d6d986be906a..375f02002579 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> @@ -74,24 +74,29 @@ struct atpx_mux {
> u16 mux;
> } __packed;
>
> -bool amdgpu_has_atpx(void) {
> +bool amdgpu_has_atpx(void)
> +{
> return amdgpu_atpx_priv.atpx_detected;
> }
>
> -bool amdgpu_has_atpx_dgpu_power_cntl(void) {
> +bool amdgpu_has_atpx_dgpu_power_cntl(void)
> +{
> return amdgpu_atpx_priv.atpx.functions.power_cntl;
> }
>
> -bool amdgpu_is_atpx_hybrid(void) {
> +bool amdgpu_is_atpx_hybrid(void)
> +{
> return amdgpu_atpx_priv.atpx.is_hybrid;
> }
>
> -bool amdgpu_atpx_dgpu_req_power_for_displays(void) {
> +bool amdgpu_atpx_dgpu_req_power_for_displays(void)
> +{
> return amdgpu_atpx_priv.atpx.dgpu_req_power_for_displays;
> }
>
> #if defined(CONFIG_ACPI)
> -void *amdgpu_atpx_get_dhandle(void) {
> +void *amdgpu_atpx_get_dhandle(void)
> +{
> return amdgpu_atpx_priv.dhandle;
> }
> #endif
> @@ -134,7 +139,7 @@ static union acpi_object *amdgpu_atpx_call(acpi_handle
> handle, int function,
>
> /* Fail only if calling the method fails and ATPX is supported */
> if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
> - printk("failed to evaluate ATPX got %s\n",
> + pr_err("failed to evaluate ATPX got %s\n",
> acpi_format_exception(status));
> kfree(buffer.pointer);
> return NULL;
> @@ -190,7 +195,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
>
> size = *(u16 *) info->buffer.pointer;
> if (size < 10) {
> - printk("ATPX buffer is too small: %zu\n", size);
> + pr_err("ATPX buffer is too small: %zu\n", size);
> kfree(info);
> return -EINVAL;
> }
> @@ -223,11 +228,11 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx
> *atpx)
> atpx->is_hybrid = false;
> if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
> if (amdgpu_atpx_priv.quirks & AMDGPU_PX_QUIRK_FORCE_ATPX) {
> - printk("ATPX Hybrid Graphics, forcing to ATPX\n");
> + pr_warn("ATPX Hybrid Graphics, forcing to ATPX\n");
> atpx->functions.power_cntl = true;
> atpx->is_hybrid = false;
> } else {
> - printk("ATPX Hybrid Graphics\n");
> + pr_notice("ATPX Hybrid Graphics\n");
> /*
>* Disable legacy PM methods only when pcie port PM is
> usable,
>* otherwise the device might fail to power off or
> power on.
> @@ -269,7 +274,7 @@ static int amdgpu_atpx_verify_interface(struct
> amdgpu_atpx *atpx)
>
> size = *(u16 *) info->buffer.pointer;
> if (size < 8) {
> - printk("ATPX buffer is too small: %zu\n", size);
> + pr_err("ATPX buffer is too small: %zu\n", size);
> err = -EINVAL;
> goto out;
> }
> @@ -278,8 +283,8 @@ static int amdgpu_atpx_verify_interface(struct
> amdgpu_atpx *atpx)
> memcpy(&output, info->buffer.pointer, size);
>
> /* TODO: check version? */
> - printk("ATPX version %u, functions 0x%08x\n",
> -output.version, output.function_bits);
> + pr_notice("ATPX version %u, functions 0x%08x\n",
> + output.version, output.function_bits);
>
> amdgpu_atpx_parse_functions(&atpx->functions, output.function_bits);
>
--
Regards,
Luben
[PATCH v5 19/22] drm: restore CONFIG_DRM_USE_DYNAMIC_DEBUG un-BROKEN
Lots of burn-in testing needed before signing, upstreaming. NOTE: I set default Y to maximize testing by default. Is there a better way to do this ? Signed-off-by: Jim Cromie --- drivers/gpu/drm/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index ba3fb04bb691..ff478fcba67e 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -52,8 +52,7 @@ config DRM_DEBUG_MM config DRM_USE_DYNAMIC_DEBUG bool "use dynamic debug to implement drm.debug" - default n - depends on BROKEN + default y depends on DRM depends on DYNAMIC_DEBUG || DYNAMIC_DEBUG_CORE depends on JUMP_LABEL -- 2.41.0
[PATCH v5 22/22] checkpatch: reword long-line warn about commit-msg
Reword the warning to complain about line length 1st, since thats
whats actually tested.
Cc: a...@canonical.com
Cc: j...@perches.com
Signed-off-by: Jim Cromie
---
scripts/checkpatch.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index f6b6b2a50dfe..31c55e3ece09 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -3272,7 +3272,7 @@ sub process {
# A Fixes:, link or signature tag line
$commit_log_possible_stack_dump)) {
WARN("COMMIT_LOG_LONG_LINE",
-"Possible unwrapped commit description (prefer a
maximum 75 chars per line)\n" . $herecurr);
+"Prefer a maximum 75 chars per line (possible
unwrapped commit description?)\n" . $herecurr);
$commit_log_long_line = 1;
}
--
2.41.0
[PATCH v5 21/22] dyndbg-doc: add classmap info to howto
Add some basic info on classmap usage and api Signed-off-by: Jim Cromie --- .../admin-guide/dynamic-debug-howto.rst | 64 ++- 1 file changed, 63 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 8dc668cc1216..b8d2a7235cbb 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -224,7 +224,6 @@ the ``p`` flag has meaning, other flags are ignored. Note the regexp ``^[-+=][flmpt_]+$`` matches a flags specification. To clear all flags at once, use ``=_`` or ``-flmpt``. - Debug messages during Boot Process == @@ -374,3 +373,66 @@ just a shortcut for ``print_hex_dump(KERN_DEBUG)``. For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is its ``prefix_str`` argument, if it is constant string; or ``hexdump`` in case ``prefix_str`` is built dynamically. + +Dynamic Debug classmaps +=== + +Dyndbg generally selects *prdbg* callsites using structural info: +module, file, function, line. Using classmaps, user modules can +organize/select pr_debug()s as they like. + +- classes coordinates/spans multiple modules +- complements the mod,file,func attrs +- keeps pr_debug's 0-off-cost JUMP_LABEL goodness +- isolates each from other class'd and un-class'd pr_debugs() + (one doesn't intermix 2 clients' bank accounts) + + # IOW this doesn't change DRM.debug settings + #> echo -p > /proc/dynamic_debug/control + + # change the classes by naming them explicitly (no wildcard here) + #> echo class DRM_UT_CORE +p > /proc/dynamic_debug/control + +To support DRM.debug (/sys/module/drm/parameters/debug), dyndbg +provides DYNDBG_CLASSMAP_PARAM*. It maps the categories/classes: +DRM_UT_CORE.. to bits 0..N, allowing to set all classes at once. + +Dynamic Debug Classmap API +== + +DYNDBG_CLASSMAP_DEFINE - modules create CLASSMAPs, naming the classes +and type, and mapping the class-names to consecutive _class_ids. By +doing so, they tell dyndbg that they are using those class_ids, and +authorize dyndbg to manipulate the callsites by their class-names. + +Its expected that client modules will follow the DRM.debug model: +1. define their debug-classes using an enum type, where the enum +symbol and its integer value define both the classnames and class-ids. +2. use or macro-wrap __pr_debug_cls(ENUM_VAL, "hello world\n") + +There are 2 types of classmaps: + + DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, like DRM.debug + DD_CLASS_TYPE_LEVEL_NUM: classes are relative, ordered (V3 > V2) + +Both these classmap-types use the class-names/ENUM_VALs to validate +commands into >control. + +DYNDBG_CLASSMAP_PARAM - refers to a DEFINEd classmap, exposing the set +of defined classes to manipulation as a group. This interface +enforces the relatedness of classes of DD_CLASS_TYPE_LEVEL_NUM typed +classmaps; all classes are independent in the >control parser itself. + +DYNDBG_CLASSMAP_USE - drm drivers use the CLASSMAP that drm DEFINEs. +This shares the classmap definition, authorizes coordinated changes +amongst the CLASSMAP DEFINEr and multiple USErs, and tells dyndbg +how to initialize the user's prdbgs at modprobe. + +Modules or module-groups (drm & drivers) can define multiple +classmaps, as long as they share the limited 0..62 per-module-group +_class_id range, without overlap. + +``#define DEBUG`` will enable all pr_debugs in scope, including any +class'd ones (__pr_debug_cls(id,fmt..)). This won't be reflected in +the PARAM readback value, but the pr_debug callsites can be toggled +into agreement with the param. -- 2.41.0
[PATCH v5 20/22] drm-drivers: DRM_CLASSMAP_USE in 2nd batch of drivers, helpers
Add a DRM_CLASSMAP_USE declaration to 2nd batch of helpers and *_drv.c
files. For drivers, add the decl just above the module's PARAMs,
since it identifies the "inherited" drm.debug param.
Note: with CONFIG_DRM_USE_DYNAMIC_DEBUG=y, a module not also declaring
DRM_CLASSMAP_USE will have its class'd prdbgs stuck in the initial
(disabled, but for DEBUG) state.
The stuck sites are evident in /proc/dynamic_debug/control as:
class unknown, _id:N # control's last column
rather than a proper "enumeration":
class:DRM_UT_CORE
This set of updates was found by choosing M for all DRM-config items I
found (not allmodconfig), building & modprobing them, and grepping
"class unknown," control. There may yet be others.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 2 ++
drivers/gpu/drm/gud/gud_drv.c | 2 ++
drivers/gpu/drm/mgag200/mgag200_drv.c | 2 ++
drivers/gpu/drm/qxl/qxl_drv.c | 2 ++
drivers/gpu/drm/radeon/radeon_drv.c| 2 ++
drivers/gpu/drm/udl/udl_main.c | 2 ++
drivers/gpu/drm/vkms/vkms_drv.c| 2 ++
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c| 2 ++
8 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
b/drivers/gpu/drm/drm_gem_shmem_helper.c
index 4ea6507a77e5..5e02df98327b 100644
--- a/drivers/gpu/drm/drm_gem_shmem_helper.c
+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
@@ -23,6 +23,8 @@
#include
#include
+DRM_CLASSMAP_USE(drm_debug_classes);
+
MODULE_IMPORT_NS(DMA_BUF);
/**
diff --git a/drivers/gpu/drm/gud/gud_drv.c b/drivers/gpu/drm/gud/gud_drv.c
index 9d7bf8ee45f1..5b555045fce4 100644
--- a/drivers/gpu/drm/gud/gud_drv.c
+++ b/drivers/gpu/drm/gud/gud_drv.c
@@ -31,6 +31,8 @@
#include "gud_internal.h"
+DRM_CLASSMAP_USE(drm_debug_classes);
+
/* Only used internally */
static const struct drm_format_info gud_drm_format_r1 = {
.format = GUD_DRM_FORMAT_R1,
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
b/drivers/gpu/drm/mgag200/mgag200_drv.c
index 976f0ab2006b..a1b2be1c27f6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -24,6 +24,8 @@ int mgag200_modeset = -1;
MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, mgag200_modeset, int, 0400);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
int mgag200_init_pci_options(struct pci_dev *pdev, u32 option, u32 option2)
{
struct device *dev = &pdev->dev;
diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c
index a3b83f89e061..12600f557c23 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.c
+++ b/drivers/gpu/drm/qxl/qxl_drv.c
@@ -65,6 +65,8 @@ module_param_named(modeset, qxl_modeset, int, 0400);
MODULE_PARM_DESC(num_heads, "Number of virtual crtcs to expose (default 4)");
module_param_named(num_heads, qxl_num_crtc, int, 0400);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
static struct drm_driver qxl_driver;
static struct pci_driver qxl_pci_driver;
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
b/drivers/gpu/drm/radeon/radeon_drv.c
index e4374814f0ef..4219276ade6a 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -274,6 +274,8 @@ int radeon_cik_support = 1;
MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 =
disabled)");
module_param_named(cik_support, radeon_cik_support, int, 0444);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
static struct pci_device_id pciidlist[] = {
radeon_PCI_IDS
};
diff --git a/drivers/gpu/drm/udl/udl_main.c b/drivers/gpu/drm/udl/udl_main.c
index 061cb88c08a2..8f9dfe89f64a 100644
--- a/drivers/gpu/drm/udl/udl_main.c
+++ b/drivers/gpu/drm/udl/udl_main.c
@@ -19,6 +19,8 @@
#define NR_USB_REQUEST_CHANNEL 0x12
+DRM_CLASSMAP_USE(drm_debug_classes);
+
#define MAX_TRANSFER (PAGE_SIZE*16 - BULK_SIZE)
#define WRITES_IN_FLIGHT (20)
#define MAX_VENDOR_DESCRIPTOR_SIZE 256
diff --git a/drivers/gpu/drm/vkms/vkms_drv.c b/drivers/gpu/drm/vkms/vkms_drv.c
index 6d3a2d57d992..086a9933fcdf 100644
--- a/drivers/gpu/drm/vkms/vkms_drv.c
+++ b/drivers/gpu/drm/vkms/vkms_drv.c
@@ -39,6 +39,8 @@
static struct vkms_config *default_config;
+DRM_CLASSMAP_USE(drm_debug_classes);
+
static bool enable_cursor = true;
module_param_named(enable_cursor, enable_cursor, bool, 0444);
MODULE_PARM_DESC(enable_cursor, "Enable/Disable cursor support");
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 8b24ecf60e3e..9cb6be422621 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -275,6 +275,8 @@ static int vmw_probe(struct pci_dev *, const struct
pci_device_id *);
static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
void *ptr);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
MODULE_PARM_DESC(restrict_iommu, "Try to limit IOMMU usage for TTM pages");
module_param_named(restrict_iommu, vmw_restrict_iommu, int, 0600);
MODULE_PA
[PATCH v5 17/22] dyndbg-API: promote DYNDBG_CLASSMAP_PARAM to API
move macro from test-dynamic-debug.c into header, and refine it.
Distinguish the 2 use cases of DYNDBG_CLASSMAP_PARAM*
1.DYNDBG_CLASSMAP_PARAM_REF
for DRM, to pass in extern __drm_debug by name.
dyndbg keeps bits in it, so drm can still use it as before
2.DYNDBG_CLASSMAP_PARAM
new user (test_dynamic_debug) doesn't need to share state,
decls a static long unsigned int to store the bitvec.
__DYNDBG_CLASSMAP_PARAM
bottom layer - allocate,init a ddebug-class-param, module-param-cb.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_print.c | 8 ++-
include/drm/drm_print.h | 6 --
include/linux/dynamic_debug.h | 39 +--
lib/test_dynamic_debug.c | 22 +++-
4 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index dabcfa0dd279..8f4b609353a5 100644
--- a/drivers/gpu/drm/drm_print.c
+++ b/drivers/gpu/drm/drm_print.c
@@ -69,12 +69,8 @@ DRM_CLASSMAP_DEFINE(drm_debug_classes,
DD_CLASS_TYPE_DISJOINT_BITS,
"DRM_UT_DP",
"DRM_UT_DRMRES");
-static struct ddebug_class_param drm_debug_bitmap = {
- .bits = &__drm_debug,
- .flags = "p",
- .map = &drm_debug_classes,
-};
-module_param_cb(debug, ¶m_ops_dyndbg_classes, &drm_debug_bitmap, 0600);
+DRM_CLASSMAP_PARAM_REF(debug, __drm_debug, drm_debug_classes, p);
+
#endif
void __drm_puts_coredump(struct drm_printer *p, const char *str)
diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
index 706afc97c79c..94d4f5500030 100644
--- a/include/drm/drm_print.h
+++ b/include/drm/drm_print.h
@@ -322,11 +322,13 @@ enum drm_debug_category {
};
#ifdef CONFIG_DRM_USE_DYNAMIC_DEBUG
-#define DRM_CLASSMAP_DEFINE(...) DYNDBG_CLASSMAP_DEFINE(__VA_ARGS__)
-#define DRM_CLASSMAP_USE(name) DYNDBG_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_DEFINE(...) DYNDBG_CLASSMAP_DEFINE(__VA_ARGS__)
+#define DRM_CLASSMAP_USE(name) DYNDBG_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_PARAM_REF(...)DYNDBG_CLASSMAP_PARAM_REF(__VA_ARGS__)
#else
#define DRM_CLASSMAP_DEFINE(...)
#define DRM_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_PARAM_REF(...)
#endif
static inline bool drm_debug_enabled_raw(enum drm_debug_category category)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 85f9b91034ca..871de0c32034 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -90,7 +90,7 @@ struct ddebug_class_map {
* module, and to validate inputs to DD_CLASS_TYPE_*_NAMES typed params.
*/
#define DYNDBG_CLASSMAP_DEFINE(_var, _maptype, _base, ...) \
- const char *_var##_classnames[] = { __VA_ARGS__ }; \
+ static const char *_var##_classnames[] = { __VA_ARGS__ }; \
struct ddebug_class_map __aligned(8) __used \
__section("__dyndbg_classes") _var = { \
.mod = THIS_MODULE, \
@@ -119,7 +119,7 @@ struct ddebug_class_user {
DYNDBG_CLASSMAP_USE_(_var, __UNIQUE_ID(ddebug_class_user))
#define DYNDBG_CLASSMAP_USE_(_var, _uname) \
extern struct ddebug_class_map _var;\
- struct ddebug_class_user __used \
+ static struct ddebug_class_user __used \
__section("__dyndbg_class_users") _uname = {\
.user_mod_name = KBUILD_MODNAME,\
.map = &_var, \
@@ -144,6 +144,41 @@ struct ddebug_class_param {
const struct ddebug_class_map *map;
};
+/**
+ * DYNDBG_CLASSMAP_PARAM - wrap a dyndbg-classmap with a controlling sys-param
+ * @_name sysfs node name
+ * @_var name of the struct classmap var defining the controlled classes
+ * @_flags flags to be toggled, typically just 'p'
+ *
+ * Creates a sysfs-param to control the classes defined by the
+ * classmap. Keeps bits in a private/static
+ */
+#define DYNDBG_CLASSMAP_PARAM(_name, _var, _flags) \
+ static unsigned long _name##_bvec; \
+ __DYNDBG_CLASSMAP_PARAM(_name, _name##_bvec, _var, _flags)
+
+/**
+ * DYNDBG_CLASSMAP_PARAM_REF - wrap a dyndbg-classmap with a controlling
sys-param
+ * @_name sysfs node name
+ * @_bits name of the module's unsigned long bit-vector, ex: __drm_debug
+ * @_var name of the struct classmap var defining the controlled classes
+ * @_flags flags to be toggled, typically just 'p'
+ *
+ * Creates a sysfs-param to control the classmap, keeping bitvec in user
@_bits.
+ * This lets drm use __drm_debug elsewhere too.
+ */
+#define DYNDBG_CLASSMAP_PARAM_REF(_name, _bits, _var, _flags) \
+ __DYNDBG_CLASSMAP_PARAM(_name, _bits, _var, _flags)
+
+#define __DYNDBG_CLASSMAP_
[PATCH v5 16/22] dyndbg: refactor ddebug_classparam_clamp_input
Extract input validation code, from param_set_dyndbg_module_classes()
(the sys-node >handler) to new: ddebug_classparam_clamp_input(kp),
call it from former. It takes kernel-param arg, so it can complain
about "foo: bad input".
Reuse ddparam_clamp_input(kp) in ddebug_sync_classbits(),
to validate inputs from parent's params, just like our own.
To support that reuse, alter ddebug_sync_classbits() and caller to
pass kp instead of kp->arg.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 66 ++---
1 file changed, 45 insertions(+), 21 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index c4d7a70a0723..63420f90bcb1 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -655,6 +655,30 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
#define CLASSMAP_BITMASK(width) ((1UL << (width)) - 1)
+static void ddebug_class_param_clamp_input(unsigned long *inrep, const struct
kernel_param *kp)
+{
+ const struct ddebug_class_param *dcp = kp->arg;
+ const struct ddebug_class_map *map = dcp->map;
+
+ switch (map->map_type) {
+ case DD_CLASS_TYPE_DISJOINT_BITS:
+ /* expect bits. mask and warn if too many */
+ if (*inrep & ~CLASSMAP_BITMASK(map->length)) {
+ pr_warn("%s: input: 0x%lx exceeds mask: 0x%lx,
masking\n",
+ KP_NAME(kp), *inrep,
CLASSMAP_BITMASK(map->length));
+ *inrep &= CLASSMAP_BITMASK(map->length);
+ }
+ break;
+ case DD_CLASS_TYPE_LEVEL_NUM:
+ /* input is bitpos, of highest verbosity to be enabled */
+ if (*inrep > map->length) {
+ pr_warn("%s: level:%ld exceeds max:%d, clamping\n",
+ KP_NAME(kp), *inrep, map->length);
+ *inrep = map->length;
+ }
+ break;
+ }
+}
static int param_set_dyndbg_module_classes(const char *instr,
const struct kernel_param *kp,
const char *modnm)
@@ -673,26 +697,15 @@ static int param_set_dyndbg_module_classes(const char
*instr,
pr_err("expecting numeric input, not: %s > %s\n", instr,
KP_NAME(kp));
return -EINVAL;
}
+ ddebug_class_param_clamp_input(&inrep, kp);
switch (map->map_type) {
case DD_CLASS_TYPE_DISJOINT_BITS:
- /* expect bits. mask and warn if too many */
- if (inrep & ~CLASSMAP_BITMASK(map->length)) {
- pr_warn("%s: input: 0x%lx exceeds mask: 0x%lx,
masking\n",
- KP_NAME(kp), inrep,
CLASSMAP_BITMASK(map->length));
- inrep &= CLASSMAP_BITMASK(map->length);
- }
v2pr_info("bits:0x%lx > %s.%s\n", inrep, modnm ?: "*",
KP_NAME(kp));
totct += ddebug_apply_class_bitmap(dcp, &inrep, *dcp->bits,
modnm);
*dcp->bits = inrep;
break;
case DD_CLASS_TYPE_LEVEL_NUM:
- /* input is bitpos, of highest verbosity to be enabled */
- if (inrep > map->length) {
- pr_warn("%s: level:%ld exceeds max:%d, clamping\n",
- KP_NAME(kp), inrep, map->length);
- inrep = map->length;
- }
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
new_bits = CLASSMAP_BITMASK(inrep);
v2pr_info("lvl:%ld bits:0x%lx > %s\n", inrep, new_bits,
KP_NAME(kp));
@@ -1155,16 +1168,27 @@ static const char * const ddebug_classmap_typenames[] =
{
ddebug_classmap_typenames[_cm->map_type]);\
})
-static void ddebug_sync_classbits(const struct ddebug_class_param *dcp, const
char *modname)
+static void ddebug_sync_classbits(const struct kernel_param *kp, const char
*modname)
{
- /* clamp initial bitvec, mask off hi-bits */
- if (*dcp->bits & ~CLASSMAP_BITMASK(dcp->map->length)) {
- *dcp->bits &= CLASSMAP_BITMASK(dcp->map->length);
- v2pr_info("preset classbits: %lx\n", *dcp->bits);
+ struct ddebug_class_param *dcp = kp->arg;
+ unsigned long new_bits;
+
+ ddebug_class_param_clamp_input(dcp->bits, kp);
+
+ switch (dcp->map->map_type) {
+ case DD_CLASS_TYPE_DISJOINT_BITS:
+ v2pr_info("%s: classbits: 0x%lx\n", KP_NAME(kp), *dcp->bits);
+ ddebug_apply_class_bitmap(dcp, dcp->bits, 0UL, modname);
+ break;
+ case DD_CLASS_TYPE_LEVEL_NUM:
+ new_bits = CLASSMAP_BITMASK(*dcp->lvl);
+ v2pr_info("%s: lvl:%ld bits:0x%lx\n", KP_NAME(kp), *dcp->lvl,
new_bits);
+ ddebug_apply_class_bitmap(dcp, &new_bits, 0UL, modname);
+ break;
+ default:
+
[PATCH v5 18/22] dyndbg-test: build it with just CONFIG_DYNAMIC_DEBUG_CORE
Make the test-module buildable with CONFIG_DYNAMIC_DEBUG_CORE; add CFLAGS_$ofile defns to supply -DDYNAMIC_DEBUG_MODULE to cc. Change the Kconfig entry to allow building with just _CORE, and fix the help text. Signed-off-by: Jim Cromie --- lib/Kconfig.debug | 10 +- lib/Makefile | 2 ++ 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug index ce51d4dc6803..22e022ceb9a1 100644 --- a/lib/Kconfig.debug +++ b/lib/Kconfig.debug @@ -2695,12 +2695,12 @@ config TEST_STATIC_KEYS If unsure, say N. config TEST_DYNAMIC_DEBUG - tristate "Test DYNAMIC_DEBUG" - depends on DYNAMIC_DEBUG + tristate "Build test-dynamic-debug module" + depends on DYNAMIC_DEBUG || DYNAMIC_DEBUG_CORE help - This module registers a tracer callback to count enabled - pr_debugs in a 'do_debugging' function, then alters their - enablements, calls the function, and compares counts. + This module works/demo's the dyndbg's classmap API, by + creating 2 classes: a DISJOINT classmap (like DRM.debug) + and a LEVELS/VERBOSE classmap (like verbose2 > verbose1). If unsure, say N. diff --git a/lib/Makefile b/lib/Makefile index f36048371dd2..8411015a57c1 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -233,6 +233,8 @@ obj-$(CONFIG_HAVE_ARCH_TRACEHOOK) += syscall.o obj-$(CONFIG_DYNAMIC_DEBUG_CORE) += dynamic_debug.o #ensure exported functions have prototypes CFLAGS_dynamic_debug.o := -DDYNAMIC_DEBUG_MODULE +CFLAGS_test_dynamic_debug.o := -DDYNAMIC_DEBUG_MODULE +CFLAGS_test_dynamic_debug_submod.o := -DDYNAMIC_DEBUG_MODULE obj-$(CONFIG_SYMBOLIC_ERRNAME) += errname.o -- 2.41.0
[PATCH v5 15/22] dyndbg: add for_each_boxed_vector
Add a for_each iterator to walk a counted vector member in a struct
(ie the box), and use it to replace 8 open-coded loops.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index d78e48d3af1c..c4d7a70a0723 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -157,6 +157,9 @@ static void vpr_info_dq(const struct ddebug_query *query,
const char *msg)
_dt->num_class_users);\
})
+#define for_each_boxed_vector(_box, _vec, _len, _ct, _curs)\
+ for (_ct = 0, _curs = _box->_vec; _ct < _box->_len; _ct++, _curs++)
+
#define __outvar /* filled by callee */
static struct ddebug_class_map *ddebug_find_valid_class(struct ddebug_table
const *dt,
const char
*class_string,
@@ -166,7 +169,7 @@ static struct ddebug_class_map
*ddebug_find_valid_class(struct ddebug_table cons
struct ddebug_class_user *cli;
int i, idx;
- for (i = 0, map = dt->classes; i < dt->num_classes; i++, map++) {
+ for_each_boxed_vector(dt, classes, num_classes, i, map) {
idx = match_string(map->class_names, map->length, class_string);
if (idx >= 0) {
*class_id = idx + map->base;
@@ -174,7 +177,7 @@ static struct ddebug_class_map
*ddebug_find_valid_class(struct ddebug_table cons
return map;
}
}
- for (i = 0, cli = dt->class_users; i < dt->num_class_users; i++, cli++)
{
+ for_each_boxed_vector(dt, class_users, num_class_users, i, cli) {
idx = match_string(cli->map->class_names, cli->map->length,
class_string);
if (idx >= 0) {
*class_id = idx + cli->map->base;
@@ -1053,11 +1056,11 @@ static const char *ddebug_class_name(struct
ddebug_table *dt, struct _ddebug *dp
struct ddebug_class_user *cli = dt->class_users;
int i;
- for (i = 0; i < dt->num_classes; i++, map++)
+ for_each_boxed_vector(dt, classes, num_classes, i, map)
if (class_in_range(dp->class_id, map))
return map->class_names[dp->class_id - map->base];
- for (i = 0; i < dt->num_class_users; i++, cli++)
+ for_each_boxed_vector(dt, class_users, num_class_users, i, cli)
if (class_in_range(dp->class_id, cli->map))
return cli->map->class_names[dp->class_id -
cli->map->base];
@@ -1211,7 +1214,7 @@ static void ddebug_attach_module_classes(struct
ddebug_table *dt, struct _ddebug
struct ddebug_class_map *cm;
int i, nc = 0;
- for (i = 0, cm = di->classes; i < di->num_classes; i++, cm++) {
+ for_each_boxed_vector(di, classes, num_classes, i, cm) {
if (!strcmp(cm->mod_name, dt->mod_name)) {
vpr_cm_info(cm, "classes[%d]:", i);
@@ -1224,7 +1227,7 @@ static void ddebug_attach_module_classes(struct
ddebug_table *dt, struct _ddebug
vpr_info("module:%s attached %d classes\n", dt->mod_name, nc);
/* now iterate dt */
- for (i = 0, cm = dt->classes; i < dt->num_classes; i++, cm++)
+ for_each_boxed_vector(di, classes, num_classes, i, cm)
ddebug_apply_params(cm, cm->mod_name);
}
@@ -1244,7 +1247,7 @@ static void ddebug_attach_user_module_classes(struct
ddebug_table *dt,
* module's refs, save to dt. For loadables, this is the
* whole array.
*/
- for (i = 0, cli = di->class_users; i < di->num_class_users; i++, cli++)
{
+ for_each_boxed_vector(di, class_users, num_class_users, i, cli) {
if (WARN_ON(!cli || !cli->map || !cli->user_mod_name))
continue;
@@ -1259,8 +1262,7 @@ static void ddebug_attach_user_module_classes(struct
ddebug_table *dt,
}
dt->num_class_users = nc;
- /* now iterate dt */
- for (i = 0, cli = dt->class_users; i < dt->num_class_users; i++, cli++)
+ for_each_boxed_vector(di, class_users, num_class_users, i, cli)
ddebug_apply_params(cli->map, cli->user_mod_name);
vpr_dt_info(dt, "attach-client-module: ");
--
2.41.0
[PATCH v5 14/22] dyndbg-API: fix CONFIG_DRM_USE_DYNAMIC_DEBUG regression
DECLARE_DYNDBG_CLASSMAP() has a design error; it fails a basic K&R
rule: "define once, refer many times".
When DRM_USE_DYNAMIC_DEBUG=y, DECLARE_DYNDBG_CLASSMAP() is used across
DRM core & drivers; they all repeat the same classmap-defn args, which
must match for the modules to respond together when DRM.debug
categories are enabled.
Worse, it causes the CONFIG_DRM_USE_DYNAMIC_DEBUG=Y regression; 1st
drm.ko loads, and dyndbg initializes its DRM.debug callsites, then a
drm-driver loads, but too late - it missed the DRM.debug enablement.
So replace it with 2 macros:
DYNDBG_CLASSMAP_DEFINE - invoked once from core - drm.ko
DYNDBG_CLASSMAP_USE- from all drm drivers and helpers.
DYNDBG_CLASSMAP_DEFINE: based on DECLARE_DYNDBG_CLASSMAP, but now it
drops the static on the constructed classmap variable, and exports it
instead.
DYNDBG_CLASSMAP_USE: then refers to the exported var by name:
* used from drivers, helper-mods
* lets us drop the repetitive "classname" args
* fixes 2nd-defn problem
* creates a ddebug_class_user record in new __dyndbg_class_users section
this allows ddebug_add_module(etal) to handle them per-module.
The distinction, and the usage record, allows dyndbg to initialize the
driver's DRM.debug callsites separately after it is modprobed.
Since DRM now needs updates to use the new macros, it also gets 2
wrappers: DRM_CLASSMAP_DEFINE, DRM_CLASSMAP_USE which declutter the
users by hiding the ifdef CONFIG_DRM_USE_DYNAMIC_DEBUG.
To review, dyndbg's existing __dyndbg_classes[] section does:
. catalogs the classmaps defined by the module (or builtin modules)
. authorizes dyndbg to >control those class'd prdbgs for the module.
. DYNDBG_CLASSMAP_DEFINE(and old one) creates classmaps in this section.
This patch adds __dyndbg_class_users[] section:
. catalogs uses/references to the classmap definitions.
. authorizes dyndbg to >control those class'd prdbgs in ref'g module.
. DYNDBG_CLASSMAP_USE() creates classmap-user records in this section.
Now ddebug_add_module(etal) can handle classmap-uses like (and after)
classmaps; when a dependent module is loaded, its parent's kernel
params are scanned to find the param wired to dyndbg-param-ops, whose
classmap matches the one ref'd by the client.
To support this, a few data/header changes:
. new struct ddebug_class_user
contains: user-module-name, &classmap-defn
it records drm-driver's use of a classmap in the section, allowing lookup
struct ddebug_info gets 2 new fields to encapsulate the new section:
class_users, num_class_users.
set by dynamic_debug_init() for builtins.
or by kernel/module/main:load_info() for loadable modules.
vmlinux.lds.h: new BOUNDED_SECTION for __dyndbg_class_users
dynamic_debug.c has 2 changes in ddebug_add_module(), ddebug_change():
ddebug_add_module() previously called ddebug_attach_module_classes()
to handle classmap DEFINEd by a module, now it also calls
ddebug_attach_user_module_classes() to handle USEd classmaps.
ddebug_attach_user_module_classes() scans the module's class_users
section, follows the refs to the parent's classmap, and calls
ddebug_apply_params() on each.
ddebug_apply_params(new fn):
It scans module's/builtin kernel-params, calls ddebug_match_attach_kparam
for each to find the params/sysfs-nodes which may be wired to a classmap.
ddebug_match_apply_kparam(new fn):
1st, it tests the kernel-param.ops is dyndbg's; this guarantees that
the attached arg is a struct ddebug_class_param, which has a ref to
the param's state, and to the classmap defining the param's handling.
2nd, it requires that the classmap ref'd by the kparam is the one
we're called for; modules can use many separate classmaps (as
test_dynamic_debug does).
Then apply the "parent" kparam's setting to the dependent module,
using ddebug_apply_class_bitmap().
ddebug_change(and callees) also gets adjustments:
ddebug_find_valid_class(): This does a search over the module's
classmaps, looking for the class FOO echo'd to >control. So now it
searches over __dyndbg_class_users[] after __dyndbg_classes[].
ddebug_class_name(): return class-names for defined AND used classes.
test_dynamic_debug.c, test_dynamic_debug_submod.c:
This (already) demonstrates the 2 types of classmaps & sysfs-params,
following the 4-part recipe:
1. define an enum for the classmap: DRM.debug has DRM_UT_{CORE,KMS,...}
multiple classes must share 0-62 classid space.
2. DYNDBG_CLASSMAP_DEFINE(.. DRM_UT_{CORE,KMS,...})
3. DYNDBG_CLASSMAP_PARAM* (classmap)
4. DYNDBG_CLASSMAP_USE()
by _submod only, skipping 2,3
Move all the enum declarations together, to better explain how they
share the 0..62 class-id space available to a module (non-overlapping
subranges).
reorg macros 2,3 by name. This gives a tabular format, making it easy
to see the pattern of repetition, and the points of change.
And extend the test to replicate the 2-module (parent & dependent)
scenario which caused the CONFIG_DRM_USE_DYNAMIC_DEBUG=y regression
seen in drm & drivers.
[PATCH v5 11/22] dyndbg: tighten fn-sig of ddebug_apply_class_bitmap
old_bits arg is currently a pointer to the input bits, but this could
allow inadvertent changes to the input by the fn. Disallow this.
And constify new_bits while here.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index f392f692b452..abdb54e3ddfa 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -592,7 +592,8 @@ static int ddebug_exec_queries(char *query, const char
*modname)
/* apply a new class-param setting */
static int ddebug_apply_class_bitmap(const struct ddebug_class_param *dcp,
-unsigned long *new_bits, unsigned long
*old_bits,
+const unsigned long *new_bits,
+const unsigned long old_bits,
const char *query_modname)
{
#define QUERY_SIZE 128
@@ -601,12 +602,12 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
int matches = 0;
int bi, ct;
- if (*new_bits != *old_bits)
+ if (*new_bits != old_bits)
v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
- *old_bits, query_modname ?: "'*'");
+ old_bits, query_modname ?: "'*'");
for (bi = 0; bi < map->length; bi++) {
- if (test_bit(bi, new_bits) == test_bit(bi, old_bits))
+ if (test_bit(bi, new_bits) == test_bit(bi, &old_bits))
continue;
snprintf(query, QUERY_SIZE, "class %s %c%s",
map->class_names[bi],
@@ -618,9 +619,9 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
v2pr_info("bit_%d: %d matches on class: %s -> 0x%lx\n", bi,
ct, map->class_names[bi], *new_bits);
}
- if (*new_bits != *old_bits)
+ if (*new_bits != old_bits)
v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
- *old_bits, query_modname ?: "'*'");
+ old_bits, query_modname ?: "'*'");
return matches;
}
@@ -677,7 +678,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
continue;
}
curr_bits ^= BIT(cls_id);
- totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
dcp->bits, NULL);
+ totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
*dcp->bits, NULL);
*dcp->bits = curr_bits;
v2pr_info("%s: changed bit %d:%s\n", KP_NAME(kp),
cls_id,
map->class_names[cls_id]);
@@ -687,7 +688,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
curr_bits = CLASSMAP_BITMASK(cls_id + (wanted ? 1 : 0
));
- totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
&old_bits, NULL);
+ totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
old_bits, NULL);
*dcp->lvl = (cls_id + (wanted ? 1 : 0));
v2pr_info("%s: changed bit-%d: \"%s\" %lx->%lx\n",
KP_NAME(kp), cls_id,
map->class_names[cls_id], old_bits,
curr_bits);
@@ -741,7 +742,7 @@ static int param_set_dyndbg_module_classes(const char
*instr,
inrep &= CLASSMAP_BITMASK(map->length);
}
v2pr_info("bits:0x%lx > %s.%s\n", inrep, modnm ?: "*",
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, &inrep, dcp->bits,
modnm);
+ totct += ddebug_apply_class_bitmap(dcp, &inrep, *dcp->bits,
modnm);
*dcp->bits = inrep;
break;
case DD_CLASS_TYPE_LEVEL_NUM:
@@ -754,7 +755,7 @@ static int param_set_dyndbg_module_classes(const char
*instr,
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
new_bits = CLASSMAP_BITMASK(inrep);
v2pr_info("lvl:%ld bits:0x%lx > %s\n", inrep, new_bits,
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, &new_bits, &old_bits,
modnm);
+ totct += ddebug_apply_class_bitmap(dcp, &new_bits, old_bits,
modnm);
*dcp->lvl = inrep;
break;
default:
--
2.41.0
[PATCH v5 13/22] checkpatch: special case for file-scoped extern linker-symbol
"externs should be avoided in .c files" needs an exception for linker
symbols, like those that mark the start, stop of many kernel sections.
Since code already checks REALNAME to avoid linker-scripts entirely,
add a new else-if block to look at them instead. As a simple
heuristic, treat all words (in the patch-line) as possible symbols,
and save them to screen the WARN quoted above.
For my test case, this included BOUNDED_BY (a macro), which is extra,
but not troublesome - any extra words collected would have to also be
symbols the script would otherwise complain about.
Where the WARN is issued, precede it with an else-if block to catch
one common extern-in-c use case: "extern struct foo bar[]". Here we
can at least issue a softer warning, after checking for a match with a
maybe-linker-symbol parsed earlier from the patch. Though heuristic,
it worked for my test-case, allowing both (start|stop)$symbol's,
matched by $symbol, it wasn't thrown by noise (BOUNDED_BY) in the
maybe-linker-symbols.
NB: git diff ordering dependence on vmlinux.lds.h before c files ?
Cc: a...@canonical.com
Cc: j...@perches.com
Signed-off-by: Jim Cromie
---
scripts/checkpatch.pl | 20
1 file changed, 20 insertions(+)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index b30114d637c4..f6b6b2a50dfe 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -74,6 +74,8 @@ my $git_command ='export LANGUAGE=en_US.UTF-8; git';
my $tabsize = 8;
my ${CONFIG_} = "CONFIG_";
+my %maybe_linker_symbol; # for externs in c exceptions, when seen in
*vmlinux.lds.h
+
sub help {
my ($exitcode) = @_;
@@ -6051,6 +6053,9 @@ sub process {
# check for line continuations outside of #defines, preprocessor #, and asm
+ } elsif ($realfile =~ m@/vmlinux.lds.h$@) {
+ $line =~ s/(\w+)/$maybe_linker_symbol{$1}++/ge;
+ #print "REAL: $realfile\nln: $line\nkeys:", sort keys
%maybe_linker_symbol;
} else {
if ($prevline !~ /^..*\\$/ &&
$line !~ /^\+\s*\#.*\\$/ && # preprocessor
@@ -7107,6 +7112,21 @@ sub process {
"arguments for function declarations
should follow identifier\n" . $herecurr);
}
+ } elsif ($realfile =~ /\.c$/ && defined $stat &&
+ $stat =~ /^\+extern struct\s+(\w+)\s+(\w+)\[\];/)
+ {
+ my ($st_type, $st_name) = ($1, $2);
+
+ for my $s (keys %maybe_linker_symbol) {
+ #print "Linker symbol? $st_name : $s\n";
+ goto LIKELY_LINKER_SYMBOL
+ if $st_name =~ /$s/;
+ }
+ WARN("AVOID_EXTERNS",
+"found a file-scoped extern type:$st_type
name:$st_name in .c file\n"
+. "is this a linker symbol ?\n" . $herecurr);
+ LIKELY_LINKER_SYMBOL:
+
} elsif ($realfile =~ /\.c$/ && defined $stat &&
$stat =~ /^.\s*extern\s+/)
{
--
2.41.0
[PATCH v5 09/22] dyndbg: silence debugs with no-change updates
check for actual changes before announcing them, declutter logs.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 2a5cbb68d88d..a8973d1a6896 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -590,7 +590,7 @@ static int ddebug_exec_queries(char *query, const char
*modname)
return nfound;
}
-/* apply a new bitmap to the sys-knob's current bit-state */
+/* apply a new class-param setting */
static int ddebug_apply_class_bitmap(const struct ddebug_class_param *dcp,
unsigned long *new_bits, unsigned long
*old_bits,
const char *query_modname)
@@ -601,8 +601,9 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
int matches = 0;
int bi, ct;
- v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
- query_modname ?: "");
+ if (*new_bits != *old_bits)
+ v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
+ *old_bits, query_modname ?: "'*'");
for (bi = 0; bi < map->length; bi++) {
if (test_bit(bi, new_bits) == test_bit(bi, old_bits))
@@ -617,8 +618,9 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
v2pr_info("bit_%d: %d matches on class: %s -> 0x%lx\n", bi,
ct, map->class_names[bi], *new_bits);
}
- v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
- query_modname ?: "");
+ if (*new_bits != *old_bits)
+ v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
+ *old_bits, query_modname ?: "'*'");
return matches;
}
--
2.41.0
[PATCH v5 13/22] checkpatch: file-scoped extern special case for linker-symbol
"externs should be avoided in .c files" needs an exception for linker
symbols, like those that mark the start, stop of many kernel sections.
Since code already checks REALNAME to avoid linker-scripts entirely,
add a new else-if block to look at them instead. As a simple
heuristic, treat all words (in the patch-line) as possible symbols,
and save them to screen the WARN quoted above. For my test case, this
included BOUNDED_BY (a macro), which is extra, but not troublesome.
Where the WARN is issued, precede it with an else-if block to catch
one common extern-in-c use case: "extern struct foo bar[]". Here we
can at least issue a softer warning, after checking for a match with a
maybe-linker-symbol parsed earlier from the patch. Though heuristic,
it worked for my test-case, allowing both (start|stop)$symbol's,
matched by $symbol, it wasn't thrown by noise (BOUNDED_BY) in the
maybe-linker-symbols.
NB: git diff ordering dependence on vmlinux.lds.h before c files ?
Cc: a...@canonical.com
Cc: j...@perches.com
Signed-off-by: Jim Cromie
---
scripts/checkpatch.pl | 20
1 file changed, 20 insertions(+)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index b30114d637c4..f6b6b2a50dfe 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -74,6 +74,8 @@ my $git_command ='export LANGUAGE=en_US.UTF-8; git';
my $tabsize = 8;
my ${CONFIG_} = "CONFIG_";
+my %maybe_linker_symbol; # for externs in c exceptions, when seen in
*vmlinux.lds.h
+
sub help {
my ($exitcode) = @_;
@@ -6051,6 +6053,9 @@ sub process {
# check for line continuations outside of #defines, preprocessor #, and asm
+ } elsif ($realfile =~ m@/vmlinux.lds.h$@) {
+ $line =~ s/(\w+)/$maybe_linker_symbol{$1}++/ge;
+ #print "REAL: $realfile\nln: $line\nkeys:", sort keys
%maybe_linker_symbol;
} else {
if ($prevline !~ /^..*\\$/ &&
$line !~ /^\+\s*\#.*\\$/ && # preprocessor
@@ -7107,6 +7112,21 @@ sub process {
"arguments for function declarations
should follow identifier\n" . $herecurr);
}
+ } elsif ($realfile =~ /\.c$/ && defined $stat &&
+ $stat =~ /^\+extern struct\s+(\w+)\s+(\w+)\[\];/)
+ {
+ my ($st_type, $st_name) = ($1, $2);
+
+ for my $s (keys %maybe_linker_symbol) {
+ #print "Linker symbol? $st_name : $s\n";
+ goto LIKELY_LINKER_SYMBOL
+ if $st_name =~ /$s/;
+ }
+ WARN("AVOID_EXTERNS",
+"found a file-scoped extern type:$st_type
name:$st_name in .c file\n"
+. "is this a linker symbol ?\n" . $herecurr);
+ LIKELY_LINKER_SYMBOL:
+
} elsif ($realfile =~ /\.c$/ && defined $stat &&
$stat =~ /^.\s*extern\s+/)
{
--
2.41.0
[PATCH v5 10/22] dyndbg: tighten ddebug_class_name() 1st arg type
Change function's 1st arg-type, and deref in the caller.
The fn doesn't need any other fields in the struct.
no functional change.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index a8973d1a6896..f392f692b452 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -1112,12 +1112,12 @@ static void *ddebug_proc_next(struct seq_file *m, void
*p, loff_t *pos)
#define class_in_range(class_id, map) \
(class_id >= map->base && class_id < map->base + map->length)
-static const char *ddebug_class_name(struct ddebug_iter *iter, struct _ddebug
*dp)
+static const char *ddebug_class_name(struct ddebug_table *dt, struct _ddebug
*dp)
{
- struct ddebug_class_map *map = iter->table->classes;
- int i, nc = iter->table->num_classes;
+ struct ddebug_class_map *map = dt->classes;
+ int i;
- for (i = 0; i < nc; i++, map++)
+ for (i = 0; i < dt->num_classes; i++, map++)
if (class_in_range(dp->class_id, map))
return map->class_names[dp->class_id - map->base];
@@ -1151,7 +1151,7 @@ static int ddebug_proc_show(struct seq_file *m, void *p)
seq_puts(m, "\"");
if (dp->class_id != _DPRINTK_CLASS_DFLT) {
- class = ddebug_class_name(iter, dp);
+ class = ddebug_class_name(iter->table, dp);
if (class)
seq_printf(m, " class:%s", class);
else
--
2.41.0
[PATCH v5 12/22] dyndbg-API: remove DD_CLASS_TYPE_(DISJOINT|LEVEL)_NAMES and code
Remove the NAMED class types; these 2 classmap types accept class
names at the PARAM interface, for example:
echo +DRM_UT_CORE,-DRM_UT_KMS > /sys/module/drm/parameters/debug_names
The code works, but its only used by test-dynamic-debug, and wasn't
asked for by anyone else, so simplify things for now.
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 19 ++-
lib/dynamic_debug.c | 103 +++---
lib/test_dynamic_debug.c | 12
3 files changed, 12 insertions(+), 122 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 719c5b6ad0f9..b927dfacc429 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -59,24 +59,13 @@ struct _ddebug {
enum class_map_type {
DD_CLASS_TYPE_DISJOINT_BITS,
/**
-* DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, one per bit.
-* expecting hex input. Built for drm.debug, basis for other types.
+* DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, mapped to
bits[0..N].
+* Expects hex input. Built for drm.debug, basis for other types.
*/
DD_CLASS_TYPE_LEVEL_NUM,
/**
-* DD_CLASS_TYPE_LEVEL_NUM: input is numeric level, 0-N.
-* N turns on just bits N-1 .. 0, so N=0 turns all bits off.
-*/
- DD_CLASS_TYPE_DISJOINT_NAMES,
- /**
-* DD_CLASS_TYPE_DISJOINT_NAMES: input is a CSV of [+-]CLASS_NAMES,
-* classes are independent, like _DISJOINT_BITS.
-*/
- DD_CLASS_TYPE_LEVEL_NAMES,
- /**
-* DD_CLASS_TYPE_LEVEL_NAMES: input is a CSV of [+-]CLASS_NAMES,
-* intended for names like: INFO,DEBUG,TRACE, with a module prefix
-* avoid EMERG,ALERT,CRIT,ERR,WARNING: they're not debug
+* DD_CLASS_TYPE_LEVEL_NUM: input is numeric level, 0..N.
+* Input N turns on bits 0..N-1
*/
};
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index abdb54e3ddfa..42320689e283 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -631,77 +631,6 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
#define CLASSMAP_BITMASK(width) ((1UL << (width)) - 1)
-/* accept comma-separated-list of [+-] classnames */
-static int param_set_dyndbg_classnames(const char *instr, const struct
kernel_param *kp)
-{
- const struct ddebug_class_param *dcp = kp->arg;
- const struct ddebug_class_map *map = dcp->map;
- unsigned long curr_bits, old_bits;
- char *cl_str, *p, *tmp;
- int cls_id, totct = 0;
- bool wanted;
-
- cl_str = tmp = kstrdup(instr, GFP_KERNEL);
- p = strchr(cl_str, '\n');
- if (p)
- *p = '\0';
-
- /* start with previously set state-bits, then modify */
- curr_bits = old_bits = *dcp->bits;
- vpr_info("\"%s\" > %s:0x%lx\n", cl_str, KP_NAME(kp), curr_bits);
-
- for (; cl_str; cl_str = p) {
- p = strchr(cl_str, ',');
- if (p)
- *p++ = '\0';
-
- if (*cl_str == '-') {
- wanted = false;
- cl_str++;
- } else {
- wanted = true;
- if (*cl_str == '+')
- cl_str++;
- }
- cls_id = match_string(map->class_names, map->length, cl_str);
- if (cls_id < 0) {
- pr_err("%s unknown to %s\n", cl_str, KP_NAME(kp));
- continue;
- }
-
- /* have one or more valid class_ids of one *_NAMES type */
- switch (map->map_type) {
- case DD_CLASS_TYPE_DISJOINT_NAMES:
- /* the +/- pertains to a single bit */
- if (test_bit(cls_id, &curr_bits) == wanted) {
- v3pr_info("no change on %s\n", cl_str);
- continue;
- }
- curr_bits ^= BIT(cls_id);
- totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
*dcp->bits, NULL);
- *dcp->bits = curr_bits;
- v2pr_info("%s: changed bit %d:%s\n", KP_NAME(kp),
cls_id,
- map->class_names[cls_id]);
- break;
- case DD_CLASS_TYPE_LEVEL_NAMES:
- /* cls_id = N in 0..max. wanted +/- determines N or N-1
*/
- old_bits = CLASSMAP_BITMASK(*dcp->lvl);
- curr_bits = CLASSMAP_BITMASK(cls_id + (wanted ? 1 : 0
));
-
- totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
old_bits, NULL);
- *dcp->lvl = (cls_id + (wanted ? 1 : 0));
- v2pr_info("%s: changed bit-%d: \"%s\" %lx->%lx\n",
KP_NAME(kp), cls_id,
- map->class
[PATCH v5 08/22] dyndbg: reduce verbose/debug clutter
currently, for verbose=3, these are logged (blank lines for clarity):
dyndbg: query 0: "class DRM_UT_CORE +p" mod:*
dyndbg: split into words: "class" "DRM_UT_CORE" "+p"
dyndbg: op='+'
dyndbg: flags=0x1
dyndbg: *flagsp=0x1 *maskp=0x
dyndbg: parsed: func="" file="" module="" format="" lineno=0-0 class=...
dyndbg: no matches for query
dyndbg: no-match: func="" file="" module="" format="" lineno=0-0 class=...
dyndbg: processed 1 queries, with 0 matches, 0 errs
That is excessive, so this patch:
- shrinks 3 lines of 2nd stanza to single line
- drops 1st 2 lines of 3rd stanza
3rd is like 1st, with result, not procedure.
2nd is just status, retold in 4th, with more info.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 6070d37c24ac..2a5cbb68d88d 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -265,9 +265,6 @@ static int ddebug_change(const struct ddebug_query *query,
}
mutex_unlock(&ddebug_lock);
- if (!nfound && verbose)
- pr_info("no matches for query\n");
-
return nfound;
}
@@ -496,7 +493,6 @@ static int ddebug_parse_flags(const char *str, struct
flag_settings *modifiers)
pr_err("bad flag-op %c, at start of %s\n", *str, str);
return -EINVAL;
}
- v3pr_info("op='%c'\n", op);
for (; *str ; ++str) {
for (i = ARRAY_SIZE(opt_array) - 1; i >= 0; i--) {
@@ -510,7 +506,6 @@ static int ddebug_parse_flags(const char *str, struct
flag_settings *modifiers)
return -EINVAL;
}
}
- v3pr_info("flags=0x%x\n", modifiers->flags);
/* calculate final flags, mask based upon op */
switch (op) {
@@ -526,7 +521,7 @@ static int ddebug_parse_flags(const char *str, struct
flag_settings *modifiers)
modifiers->flags = 0;
break;
}
- v3pr_info("*flagsp=0x%x *maskp=0x%x\n", modifiers->flags,
modifiers->mask);
+ v3pr_info("op='%c' flags=0x%x maskp=0x%x\n", op, modifiers->flags,
modifiers->mask);
return 0;
}
@@ -536,7 +531,7 @@ static int ddebug_exec_query(char *query_string, const char
*modname)
struct flag_settings modifiers = {};
struct ddebug_query query = {};
#define MAXWORDS 9
- int nwords, nfound;
+ int nwords;
char *words[MAXWORDS];
nwords = ddebug_tokenize(query_string, words, MAXWORDS);
@@ -554,10 +549,7 @@ static int ddebug_exec_query(char *query_string, const
char *modname)
return -EINVAL;
}
/* actually go and implement the change */
- nfound = ddebug_change(&query, &modifiers);
- vpr_info_dq(&query, nfound ? "applied" : "no-match");
-
- return nfound;
+ return ddebug_change(&query, &modifiers);
}
/* handle multiple queries in query string, continue on error, return
--
2.41.0
[PATCH v5 07/22] dyndbg: drop NUM_TYPE_ARRAY
ARRAY_SIZE works here, since array decl is complete.
no functional change
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 596d0664c29f..719c5b6ad0f9 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -104,11 +104,9 @@ struct ddebug_class_map {
.mod_name = KBUILD_MODNAME, \
.base = _base, \
.map_type = _maptype, \
- .length = NUM_TYPE_ARGS(char*, __VA_ARGS__),\
+ .length = ARRAY_SIZE(_var##_classnames),\
.class_names = _var##_classnames, \
}
-#define NUM_TYPE_ARGS(eltype, ...) \
-(sizeof((eltype[]){__VA_ARGS__}) / sizeof(eltype))
/* encapsulate linker provided built-in (or module) dyndbg data */
struct _ddebug_info {
--
2.41.0
[PATCH v5 06/22] dyndbg: split param_set_dyndbg_classes to module/wrapper fns
rename param_set_dyndbg_classes: add _module_ name & arg, old name is
wrapper to new. New arg allows caller to specify that only one module
is affected by a prdbgs update.
Outer fn preserves kernel_param interface, passing NULL to inner fn.
This selectivity will be used later to narrow the scope of changes
made.
no functional change.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 36 +---
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index d875c4fa5335..6070d37c24ac 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -707,18 +707,9 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
return 0;
}
-/**
- * param_set_dyndbg_classes - class FOO >control
- * @instr: string echo>d to sysfs, input depends on map_type
- * @kp:kp->arg has state: bits/lvl, map, map_type
- *
- * Enable/disable prdbgs by their class, as given in the arguments to
- * DECLARE_DYNDBG_CLASSMAP. For LEVEL map-types, enforce relative
- * levels by bitpos.
- *
- * Returns: 0 or <0 if error.
- */
-int param_set_dyndbg_classes(const char *instr, const struct kernel_param *kp)
+static int param_set_dyndbg_module_classes(const char *instr,
+ const struct kernel_param *kp,
+ const char *modnm)
{
const struct ddebug_class_param *dcp = kp->arg;
const struct ddebug_class_map *map = dcp->map;
@@ -755,8 +746,8 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
KP_NAME(kp), inrep,
CLASSMAP_BITMASK(map->length));
inrep &= CLASSMAP_BITMASK(map->length);
}
- v2pr_info("bits:%lx > %s\n", inrep, KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, &inrep, dcp->bits,
NULL);
+ v2pr_info("bits:0x%lx > %s.%s\n", inrep, modnm ?: "*",
KP_NAME(kp));
+ totct += ddebug_apply_class_bitmap(dcp, &inrep, dcp->bits,
modnm);
*dcp->bits = inrep;
break;
case DD_CLASS_TYPE_LEVEL_NUM:
@@ -769,7 +760,7 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
new_bits = CLASSMAP_BITMASK(inrep);
v2pr_info("lvl:%ld bits:0x%lx > %s\n", inrep, new_bits,
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, &new_bits, &old_bits,
NULL);
+ totct += ddebug_apply_class_bitmap(dcp, &new_bits, &old_bits,
modnm);
*dcp->lvl = inrep;
break;
default:
@@ -778,6 +769,21 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
vpr_info("%s: total matches: %d\n", KP_NAME(kp), totct);
return 0;
}
+/**
+ * param_set_dyndbg_classes - class FOO >control
+ * @instr: string echo>d to sysfs, input depends on map_type
+ * @kp:kp->arg has state: bits/lvl, map, map_type
+ *
+ * Enable/disable prdbgs by their class, as given in the arguments to
+ * DECLARE_DYNDBG_CLASSMAP. For LEVEL map-types, enforce relative
+ * levels by bitpos.
+ *
+ * Returns: 0 or <0 if error.
+ */
+int param_set_dyndbg_classes(const char *instr, const struct kernel_param *kp)
+{
+ return param_set_dyndbg_module_classes(instr, kp, NULL);
+}
EXPORT_SYMBOL(param_set_dyndbg_classes);
/**
--
2.41.0
[PATCH v5 05/22] dyndbg: ddebug_apply_class_bitmap - add module arg, select on it
Add query_module param to ddebug_apply_class_bitmap(). This allows
its caller to update just one module, or all (as currently). We'll
use this later to propagate drm.debug to each USEr as they're
modprobed.
No functional change.
Signed-off-by: Jim Cromie
---
after `modprobe i915`, heres the module dependencies,
though not all on drm.debug.
bash-5.2# lsmod
Module Size Used by
i915 3133440 0
drm_buddy 20480 1 i915
ttm90112 1 i915
i2c_algo_bit 16384 1 i915
video 61440 1 i915
wmi32768 1 video
drm_display_helper200704 1 i915
drm_kms_helper208896 2 drm_display_helper,i915
drm 606208 5
drm_kms_helper,drm_display_helper,drm_buddy,i915,ttm
cec57344 2 drm_display_helper,i915
---
lib/dynamic_debug.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index b4b6c5111315..d875c4fa5335 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -600,7 +600,8 @@ static int ddebug_exec_queries(char *query, const char
*modname)
/* apply a new bitmap to the sys-knob's current bit-state */
static int ddebug_apply_class_bitmap(const struct ddebug_class_param *dcp,
-unsigned long *new_bits, unsigned long
*old_bits)
+unsigned long *new_bits, unsigned long
*old_bits,
+const char *query_modname)
{
#define QUERY_SIZE 128
char query[QUERY_SIZE];
@@ -608,7 +609,8 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
int matches = 0;
int bi, ct;
- v2pr_info("apply: 0x%lx to: 0x%lx\n", *new_bits, *old_bits);
+ v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
+ query_modname ?: "");
for (bi = 0; bi < map->length; bi++) {
if (test_bit(bi, new_bits) == test_bit(bi, old_bits))
@@ -617,12 +619,15 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
snprintf(query, QUERY_SIZE, "class %s %c%s",
map->class_names[bi],
test_bit(bi, new_bits) ? '+' : '-', dcp->flags);
- ct = ddebug_exec_queries(query, NULL);
+ ct = ddebug_exec_queries(query, query_modname);
matches += ct;
v2pr_info("bit_%d: %d matches on class: %s -> 0x%lx\n", bi,
ct, map->class_names[bi], *new_bits);
}
+ v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
+ query_modname ?: "");
+
return matches;
}
@@ -678,7 +683,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
continue;
}
curr_bits ^= BIT(cls_id);
- totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
dcp->bits);
+ totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
dcp->bits, NULL);
*dcp->bits = curr_bits;
v2pr_info("%s: changed bit %d:%s\n", KP_NAME(kp),
cls_id,
map->class_names[cls_id]);
@@ -688,7 +693,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
curr_bits = CLASSMAP_BITMASK(cls_id + (wanted ? 1 : 0
));
- totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
&old_bits);
+ totct += ddebug_apply_class_bitmap(dcp, &curr_bits,
&old_bits, NULL);
*dcp->lvl = (cls_id + (wanted ? 1 : 0));
v2pr_info("%s: changed bit-%d: \"%s\" %lx->%lx\n",
KP_NAME(kp), cls_id,
map->class_names[cls_id], old_bits,
curr_bits);
@@ -751,7 +756,7 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
inrep &= CLASSMAP_BITMASK(map->length);
}
v2pr_info("bits:%lx > %s\n", inrep, KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, &inrep, dcp->bits);
+ totct += ddebug_apply_class_bitmap(dcp, &inrep, dcp->bits,
NULL);
*dcp->bits = inrep;
break;
case DD_CLASS_TYPE_LEVEL_NUM:
@@ -764,7 +769,7 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
new_bits = CLASSMAP_BITMASK(inrep);
v2pr_info("lvl:%ld bits:0x%lx > %s\n", inrep, new_bits,
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, &new_bits, &old_bits);
+ totct += ddebug_apply_class_bi
[PATCH v5 04/22] dyndbg: replace classmap list with a vector
Classmaps are stored/linked in a section/array, but are each added to
the module's ddebug_table.maps list-head.
This is unnecessary; even when ddebug_attach_classmap() is handling
the builtin section (with classmaps for multiple builtin modules), its
contents are ordered, so a module's possibly multiple classmaps will
be consecutive in the section, and could be treated as a vector/block,
since both start-addy and subrange length are in the ddebug_info arg.
So this changes:
struct ddebug_class_map drops list-head link.
struct ddebug_table drops the list-head maps, and gets: classes &
num_classes for the start-addy and num_classes, placed to improve
struct packing.
The loading: in ddebug_attach_module_classes(), replace the
for-the-modname list-add loop, with a forloop that finds the module's
subrange (start,length) of matching classmaps within the possibly
builtin classmaps vector, and saves those to the ddebug_table.
The reading/using: change list-foreach loops in ddebug_class_name() &
ddebug_find_valid_class() to walk the array from start to length.
Also:
Move #define __outvar up, above an added use in a fn-prototype.
Simplify ddebug_attach_module_classes args, ref has both addy,len.
no functional changes
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 1 -
lib/dynamic_debug.c | 61 ++-
2 files changed, 32 insertions(+), 30 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index dc41e70dc2e1..596d0664c29f 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -81,7 +81,6 @@ enum class_map_type {
};
struct ddebug_class_map {
- struct list_head link;
struct module *mod;
const char *mod_name; /* needed for builtins */
const char **class_names;
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 22a3182bf89f..b4b6c5111315 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -45,10 +45,11 @@ extern struct ddebug_class_map __start___dyndbg_classes[];
extern struct ddebug_class_map __stop___dyndbg_classes[];
struct ddebug_table {
- struct list_head link, maps;
+ struct list_head link;
const char *mod_name;
- unsigned int num_ddebugs;
struct _ddebug *ddebugs;
+ struct ddebug_class_map *classes;
+ unsigned int num_ddebugs, num_classes;
};
struct ddebug_query {
@@ -146,13 +147,15 @@ static void vpr_info_dq(const struct ddebug_query *query,
const char *msg)
query->first_lineno, query->last_lineno, query->class_string);
}
+#define __outvar /* filled by callee */
static struct ddebug_class_map *ddebug_find_valid_class(struct ddebug_table
const *dt,
- const char
*class_string, int *class_id)
+ const char
*class_string,
+ __outvar int *class_id)
{
struct ddebug_class_map *map;
- int idx;
+ int i, idx;
- list_for_each_entry(map, &dt->maps, link) {
+ for (map = dt->classes, i = 0; i < dt->num_classes; i++, map++) {
idx = match_string(map->class_names, map->length, class_string);
if (idx >= 0) {
*class_id = idx + map->base;
@@ -163,7 +166,6 @@ static struct ddebug_class_map
*ddebug_find_valid_class(struct ddebug_table cons
return NULL;
}
-#define __outvar /* filled by callee */
/*
* Search the tables for _ddebug's which match the given `query' and
* apply the `flags' and `mask' to them. Returns number of matching
@@ -1107,9 +1109,10 @@ static void *ddebug_proc_next(struct seq_file *m, void
*p, loff_t *pos)
static const char *ddebug_class_name(struct ddebug_iter *iter, struct _ddebug
*dp)
{
- struct ddebug_class_map *map;
+ struct ddebug_class_map *map = iter->table->classes;
+ int i, nc = iter->table->num_classes;
- list_for_each_entry(map, &iter->table->maps, link)
+ for (i = 0; i < nc; i++, map++)
if (class_in_range(dp->class_id, map))
return map->class_names[dp->class_id - map->base];
@@ -1193,30 +1196,31 @@ static const struct proc_ops proc_fops = {
.proc_write = ddebug_proc_write
};
-static void ddebug_attach_module_classes(struct ddebug_table *dt,
-struct ddebug_class_map *classes,
-int num_classes)
+static void ddebug_attach_module_classes(struct ddebug_table *dt, struct
_ddebug_info *di)
{
struct ddebug_class_map *cm;
- int i, j, ct = 0;
+ int i, nc = 0;
- for (cm = classes, i = 0; i < num_classes; i++, cm++) {
+ /*
+* Find this module's classmaps in a subrange/wholerange of
+* the builtin/modular classmap vector/section. Save the start
+* and length of the
[PATCH v5 02/22] test-dyndbg: fixup CLASSMAP usage error
more careful reading of test output reveals:
lib/test_dynamic_debug.c:103 [test_dynamic_debug]do_cats =pmf "doing
categories\n"
lib/test_dynamic_debug.c:105 [test_dynamic_debug]do_cats =p "LOW msg\n"
class:MID
lib/test_dynamic_debug.c:106 [test_dynamic_debug]do_cats =p "MID msg\n" class:HI
lib/test_dynamic_debug.c:107 [test_dynamic_debug]do_cats =_ "HI msg\n" class
unknown, _id:13
That last line is wrong, the HI class is declared.
But the enum's 1st val (explicitly initialized) was wrong; it must be
_base, not _base+1 (a DECLARE_DYNDBG_CLASSMAP[1] param). So the last
enumeration exceeded the range of mapped class-id's, which triggered
the "class unknown" report. I intentionally coded in an error, but
forgot to verify its detection and remove it.
RFC:
This patch fixes a bad usage of DECLARE_DYNDBG_CLASSMAP(), showing
that it is too error-prone. As noted in test-mod comments:
* Using the CLASSMAP api:
* - classmaps must have corresponding enum
* - enum symbols must match/correlate with class-name strings in the map.
* - base must equal enum's 1st value
* - multiple maps must set their base to share the 0-62 class_id space !!
* (build-bug-on tips welcome)
Those shortcomings could largely be fixed with a __stringify_list
(which doesn't exist,) used in DECLARE_DYNDBG_CLASSMAP to stringify
__VA_ARGS__. Then, API would accept DRM_UT_* values literally; all
the categories, in order, and not their stringifications, which
created all the usage complications above.
[1] name changes later to DYNDBG_CLASSMAP_DEFINE
Signed-off-by: Jim Cromie
---
lib/test_dynamic_debug.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/test_dynamic_debug.c b/lib/test_dynamic_debug.c
index 8dd250ad022b..a01f0193a419 100644
--- a/lib/test_dynamic_debug.c
+++ b/lib/test_dynamic_debug.c
@@ -75,7 +75,7 @@ DD_SYS_WRAP(disjoint_bits, p);
DD_SYS_WRAP(disjoint_bits, T);
/* symbolic input, independent bits */
-enum cat_disjoint_names { LOW = 11, MID, HI };
+enum cat_disjoint_names { LOW = 10, MID, HI };
DECLARE_DYNDBG_CLASSMAP(map_disjoint_names, DD_CLASS_TYPE_DISJOINT_NAMES, 10,
"LOW", "MID", "HI");
DD_SYS_WRAP(disjoint_names, p);
--
2.41.0
[PATCH v5 03/22] dyndbg: make ddebug_class_param union members same size
struct ddebug_class_param keeps a ref to the state-storage of the
param, make both flavors use the same unsigned long under-type.
ISTM this is simpler and safer.
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 2 +-
lib/dynamic_debug.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 061dd84d09f3..dc41e70dc2e1 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -122,7 +122,7 @@ struct _ddebug_info {
struct ddebug_class_param {
union {
unsigned long *bits;
- unsigned int *lvl;
+ unsigned long *lvl;
};
char flags[8];
const struct ddebug_class_map *map;
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index fdd6d9800a70..22a3182bf89f 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -795,7 +795,7 @@ int param_get_dyndbg_classes(char *buffer, const struct
kernel_param *kp)
case DD_CLASS_TYPE_LEVEL_NAMES:
case DD_CLASS_TYPE_LEVEL_NUM:
- return scnprintf(buffer, PAGE_SIZE, "%d\n", *dcp->lvl);
+ return scnprintf(buffer, PAGE_SIZE, "%ld\n", *dcp->lvl);
default:
return -1;
}
--
2.41.0
[PATCH v5 00/22] fix DRM_USE_DYNAMIC_DEBUG regression
Hi Jason, Daniel, etal
This is V5, Im hoping to land this one.
patchwork will probably call this set v3
113361 fix DRM_USE_DYNAMIC_DEBUG regression - revs 1,2
111652 DRM_USE_DYNAMIC_DEBUG regression - older, also 2 revs
It (patch 14 mainly):
Fixes: aad0214f3026 ("dyndbg: add DECLARE_DYNDBG_CLASSMAP macro")
Fixes: f158936b60a7 ("drm: POC drm on dyndbg - use in core, 2 helpers, 3
drivers.")
Ref: commit bb2ff6c27bc9 ("drm: Disable dynamic debug as broken")
It replaces DECLARE_DYNDBG_CLASSMAP macro with 2 new ones;
DYNDBG_CLASSMAP_DEFINE/_USE, and invokes them from drm.ko and drivers
respectively. A new __dyndbg_class_users section contains each
driver's _USE; dyndbg scans it at driver-module load, finds drm.debug,
and applies it to the driver's class'd prdbgs.
The code it fixes went in here:
https://lore.kernel.org/lkml/yy7%2f6otbw2lqv...@kroah.com/
then Ref: effectively marked DRM_USE_DYNAMIC_DEBUG=y as broken
and https://lore.kernel.org/lkml/y3xurogav4i7b...@kroah.com/
GregKH opined:
This should go through the drm tree now. The rest probably should also
go that way and not through my tree as well.
While most of this patchset's churn is still in lib/, DRM is the real
user for all this classmap stuff, and the real acceptance test is in
DRM CI. Hopefully it won't fall over in BAT.
However, theres also a dyndbg patch to add -s flag, I havent seen it
lately, but it might have a nominal conflict.
I'll happily take reviews/Acks/tested-bys, grumpily breakage reports.
And some landing instructions, wind-speed, runway assignment, etc from the
Tower.
theres also a few drive-by checkpatch tweaks.
13 fixes a warning that 14 gets about vmlinux.lds.h declared linker-symbols.
Jim Cromie (22):
drm: use correct ccflags-y syntax
test-dyndbg: fixup CLASSMAP usage error
dyndbg: make ddebug_class_param union members same size
dyndbg: replace classmap list with a vector
dyndbg: ddebug_apply_class_bitmap - add module arg, select on it
dyndbg: split param_set_dyndbg_classes to module/wrapper fns
dyndbg: drop NUM_TYPE_ARRAY
dyndbg: reduce verbose/debug clutter
dyndbg: silence debugs with no-change updates
dyndbg: tighten ddebug_class_name() 1st arg type
dyndbg: tighten fn-sig of ddebug_apply_class_bitmap
dyndbg-API: remove DD_CLASS_TYPE_(DISJOINT|LEVEL)_NAMES and code
checkpatch: file-scoped extern special case for linker-symbol
dyndbg-API: fix CONFIG_DRM_USE_DYNAMIC_DEBUG regression
dyndbg: add for_each_boxed_vector
dyndbg: refactor ddebug_classparam_clamp_input
dyndbg-API: promote DYNDBG_CLASSMAP_PARAM to API
dyndbg-test: build it with just CONFIG_DYNAMIC_DEBUG_CORE
drm: restore CONFIG_DRM_USE_DYNAMIC_DEBUG un-BROKEN
drm-drivers: DRM_CLASSMAP_USE in 2nd batch of drivers, helpers
dyndbg-doc: add classmap info to howto
checkpatch: reword long-line warn about commit-msg
.../admin-guide/dynamic-debug-howto.rst | 64 ++-
MAINTAINERS | 2 +-
drivers/gpu/drm/Kconfig | 3 +-
drivers/gpu/drm/Makefile | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 12 +-
drivers/gpu/drm/display/drm_dp_helper.c | 12 +-
drivers/gpu/drm/drm_crtc_helper.c | 12 +-
drivers/gpu/drm/drm_gem_shmem_helper.c| 2 +
drivers/gpu/drm/drm_print.c | 35 +-
drivers/gpu/drm/gud/gud_drv.c | 2 +
drivers/gpu/drm/i915/i915_params.c| 12 +-
drivers/gpu/drm/mgag200/mgag200_drv.c | 2 +
drivers/gpu/drm/nouveau/nouveau_drm.c | 12 +-
drivers/gpu/drm/qxl/qxl_drv.c | 2 +
drivers/gpu/drm/radeon/radeon_drv.c | 2 +
drivers/gpu/drm/udl/udl_main.c| 2 +
drivers/gpu/drm/vkms/vkms_drv.c | 2 +
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +
include/asm-generic/vmlinux.lds.h | 1 +
include/drm/drm_print.h | 12 +-
include/linux/dynamic_debug.h | 113 +++--
kernel/module/main.c | 3 +
lib/Kconfig.debug | 10 +-
lib/Makefile | 4 +-
lib/dynamic_debug.c | 406 +++---
lib/test_dynamic_debug.c | 127 +++---
lib/test_dynamic_debug_submod.c | 10 +
scripts/checkpatch.pl | 22 +-
28 files changed, 550 insertions(+), 341 deletions(-)
create mode 100644 lib/test_dynamic_debug_submod.c
--
2.41.0
[PATCH v5 01/22] drm: use correct ccflags-y syntax
Incorrect CFLAGS- usage failed to add -DDYNAMIC_DEBUG_MODULE,
which broke builds with:
CONFIG_DRM_USE_DYNAMIC_DEBUG=y
CONFIG_DYNAMIC_DEBUG_CORE=y
but without DYNAMIC_DEBUG
Nobody noticed because a larger regression emerged.
Also add subdir-ccflags so that all drivers pick up the addition.
Fixes: 84ec67288c10 ("drm_print: wrap drm_*_dbg in dyndbg descriptor factory
macro")
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/Makefile | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index a33257d2bc7f..670bf046019e 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -3,7 +3,8 @@
# Makefile for the drm device driver. This driver provides support for the
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
-CFLAGS-$(CONFIG_DRM_USE_DYNAMIC_DEBUG) += -DDYNAMIC_DEBUG_MODULE
+ccflags-$(CONFIG_DRM_USE_DYNAMIC_DEBUG)+=
-DDYNAMIC_DEBUG_MODULE
+subdir-ccflags-$(CONFIG_DRM_USE_DYNAMIC_DEBUG) += -DDYNAMIC_DEBUG_MODULE
drm-y := \
drm_aperture.o \
--
2.41.0
Re: [PATCH -next] drm/amdgpu: Remove a lot of unnecessary ternary operators
Am 31.07.23 um 18:14 schrieb Limonciello, Mario:
On 7/31/2023 8:26 AM, Ruan Jinjie wrote:
Ther are many ternary operators, the true or false judgement
of which is unnecessary in C language semantics.
s/Ther/There/
Unnecessary; sure. But don't they improve the readability quite a bit?
No, not at all. Stuff like that is very frowned on upstream.
Christian.
Signed-off-by: Ruan Jinjie
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 2 +-
 .../drm/amd/display/dc/dce/dce_link_encoder.c | 4 +---
 .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c   | 6 +++---
 .../amd/pm/powerplay/hwmgr/smu7_powertune.c   | 2 +-
 .../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 18 +++---
 .../amd/pm/powerplay/smumgr/polaris10_smumgr.c | 2 +-
 .../drm/amd/pm/powerplay/smumgr/vegam_smumgr.c | 7 +++
 13 files changed, 23 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
index b582b83c4984..38ccec913f00 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
@@ -460,7 +460,7 @@ bool amdgpu_get_bios(struct amdgpu_device *adev)
 return false;
  success:
-Â Â Â adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false;
+Â Â Â adev->is_atom_fw = adev->asic_type >= CHIP_VEGA10;
 return true;
 }
 diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
index 79791379fc2b..df4440c21bbf 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
@@ -479,7 +479,7 @@ static int jpeg_v3_0_set_clockgating_state(void
*handle,
   enum amd_clockgating_state state)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+Â Â Â bool enable = state == AMD_CG_STATE_GATE;
  if (enable) {
 if (!jpeg_v3_0_is_idle(handle))
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
index a707d407fbd0..3eb3dcd56b57 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
@@ -626,7 +626,7 @@ static int jpeg_v4_0_set_clockgating_state(void
*handle,
   enum amd_clockgating_state state)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+Â Â Â bool enable = state == AMD_CG_STATE_GATE;
  if (enable) {
 if (!jpeg_v4_0_is_idle(handle))
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
index ce2b22f7e4e4..153731d6ce8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
@@ -785,7 +785,7 @@ static int jpeg_v4_0_3_set_clockgating_state(void
*handle,
   enum amd_clockgating_state state)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+Â Â Â bool enable = state == AMD_CG_STATE_GATE;
 int i;
  for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index b76ba21b5a89..9b662b105cc1 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -2095,7 +2095,7 @@ static int vcn_v3_0_set_clockgating_state(void
*handle,
   enum amd_clockgating_state state)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+Â Â Â bool enable = state == AMD_CG_STATE_GATE;
 int i;
  for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 6089c7deba8a..7c486745bece 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -1918,7 +1918,7 @@ static int vcn_v4_0_wait_for_idle(void *handle)
 static int vcn_v4_0_set_clockgating_state(void *handle, enum
amd_clockgating_state state)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+Â Â Â bool enable = state == AMD_CG_STATE_GATE;
 int i;
  for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 550ac040b4be..e62472e6e7b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/g
RE: [PATCH] drm/amd/pm: fix variable dereferenced issue in amdgpu_device_attr_create()
[AMD Official Use Only - General]
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx On Behalf Of Yang Wang
Sent: Tuesday, August 1, 2023 5:16 PM
To: amd-gfx@lists.freedesktop.org
Cc: Dan Carpenter ; Wang, Yang(Kevin)
Subject: [PATCH] drm/amd/pm: fix variable dereferenced issue in
amdgpu_device_attr_create()
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
- fix variable ('attr') dereferenced issue.
- using condition check instead of BUG_ON().
Fixes: 4e01847c38f7 ("drm/amdgpu: optimize amdgpu device attribute code")
Cc: Dan Carpenter
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 3922dd274f30..383b2b778456 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -2171,15 +2171,19 @@ static int amdgpu_device_attr_create(struct
amdgpu_device *adev,
uint32_t mask, struct list_head
*attr_list) {
int ret = 0;
- struct device_attribute *dev_attr = &attr->dev_attr;
- const char *name = dev_attr->attr.name;
enum amdgpu_device_attr_states attr_states = ATTR_STATE_SUPPORTED;
struct amdgpu_device_attr_entry *attr_entry;
+ struct device_attribute *dev_attr;
+ const char *name;
int (*attr_update)(struct amdgpu_device *adev, struct
amdgpu_device_attr *attr,
uint32_t mask, enum amdgpu_device_attr_states
*states) = default_attr_update;
- BUG_ON(!attr);
+ if (!attr)
+ return -EINVAL;
+
+ dev_attr = &attr->dev_attr;
+ name = dev_attr->attr.name;
attr_update = attr->attr_update ? attr->attr_update :
default_attr_update;
--
2.34.1
Re: [PATCH] drm/amd/pm: Clean up errors in smu73_discrete.h
On Tue, 01 Aug 2023, Bagas Sanjaya wrote: > And it is unfortunate that you and @208suo.com people doesn't reply to > review comments (try searching lore.kernel.org) Essentially a one-way firehose of patches pointed at our general direction is not benefitial to the community. It's not participation, it's not co-operation. If the review gets ignored, why should we invest our time on *any* of the patches? BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center
Re: [PATCH] drm/amd: Clean up errors in processpptables.c
On Tue, 01 Aug 2023, Ran Sun wrote:
> Fix the following errors reported by checkpatch:
>
> ERROR: open brace '{' following function definitions go on the next line
> ERROR: code indent should use tabs where possible
> ERROR: space required before the open parenthesis '('
The commit message does not match the patch.
>
> Signed-off-by: Ran Sun
> ---
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> index 1866fe20f9e2..f05f011c78be 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
> @@ -676,7 +676,7 @@ static PP_StateClassificationFlags
> make_classification_flags(
> static int init_non_clock_fields(struct pp_hwmgr *hwmgr,
> struct pp_power_state *ps,
> uint8_t version,
> - const ATOM_PPLIB_NONCLOCK_INFO *pnon_clock_info)
> + const ATOM_PPLIB_NONCLOCK_INFO *pnon_clock_info)
How about fixing *all* the style problems in the above in one go?
How about sending these fixes in a threaded series instead of filling
everyone's inboxes with individual patches? It's 30+ patches just today
already.
BR,
Jani.
> {
> unsigned long rrr_index;
> unsigned long tmp;
--
Jani Nikula, Intel Open Source Graphics Center
RE: [PATCH] drm/amdgpu: Clean up errors in vega20_baco.c
[AMD Official Use Only - General]
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of Ran
> Sun
> Sent: Tuesday, August 1, 2023 4:03 PM
> To: Deucher, Alexander ; airl...@gmail.com;
> dan...@ffwll.ch
> Cc: Ran Sun ; dri-de...@lists.freedesktop.org;
> amd-gfx@lists.freedesktop.org; linux-ker...@vger.kernel.org
> Subject: [PATCH] drm/amdgpu: Clean up errors in vega20_baco.c
>
> Fix the following errors reported by checkpatch:
>
> ERROR: that open brace { should be on the previous line
> ERROR: space required before the open parenthesis '('
>
> Signed-off-by: Ran Sun
> ---
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
> index 8d99c7a5abf8..994c0d374bfa 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
> @@ -31,8 +31,7 @@
>
> #include "amdgpu_ras.h"
>
> -static const struct soc15_baco_cmd_entry clean_baco_tbl[] = -{
> +static const struct soc15_baco_cmd_entry clean_baco_tbl[] = {
> {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_6), 0,
> 0, 0, 0},
> {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0,
> 0, 0, 0}, }; @@ -90,11 +89,11 @@ int vega20_baco_set_state(struct
> pp_hwmgr *hwmgr, enum BACO_STATE state)
> data |= 0x8000;
> WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL,
> data);
>
> - if(smum_send_msg_to_smc_with_parameter(hwmgr,
> + if
> (smum_send_msg_to_smc_with_parameter(hwmgr,
> PPSMC_MSG_EnterBaco, 0, NULL))
> return -EINVAL;
> } else {
> - if(smum_send_msg_to_smc_with_parameter(hwmgr,
> + if
> (smum_send_msg_to_smc_with_parameter(hwmgr,
> PPSMC_MSG_EnterBaco, 1, NULL))
> return -EINVAL;
> }
> --
> 2.17.1
RE: [PATCH] drm/amd/pm: Clean up errors in vega20_hwmgr.h
[AMD Official Use Only - General]
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of Ran
> Sun
> Sent: Tuesday, August 1, 2023 10:39 AM
> To: Deucher, Alexander ; airl...@gmail.com;
> dan...@ffwll.ch
> Cc: Ran Sun ; dri-de...@lists.freedesktop.org;
> amd-gfx@lists.freedesktop.org; linux-ker...@vger.kernel.org
> Subject: [PATCH] drm/amd/pm: Clean up errors in vega20_hwmgr.h
>
> Fix the following errors reported by checkpatch:
>
> ERROR: open brace '{' following enum go on the same line
>
> Signed-off-by: Ran Sun
> ---
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> index 075c0094da9c..1ba9b5fe2a5d 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
> @@ -385,8 +385,7 @@ struct vega20_odn_data {
> struct vega20_odn_temp_tableodn_temp_table;
> };
>
> -enum OD8_FEATURE_ID
> -{
> +enum OD8_FEATURE_ID {
> OD8_GFXCLK_LIMITS = 1 << 0,
> OD8_GFXCLK_CURVE= 1 << 1,
> OD8_UCLK_MAX= 1 << 2,
> @@ -399,8 +398,7 @@ enum OD8_FEATURE_ID
> OD8_FAN_ZERO_RPM_CONTROL= 1 << 9
> };
>
> -enum OD8_SETTING_ID
> -{
> +enum OD8_SETTING_ID {
> OD8_SETTING_GFXCLK_FMIN = 0,
> OD8_SETTING_GFXCLK_FMAX,
> OD8_SETTING_GFXCLK_FREQ1,
> --
> 2.17.1
[PATCH] drm/amd/pm: fix variable dereferenced issue in amdgpu_device_attr_create()
- fix variable ('attr') dereferenced issue.
- using condition check instead of BUG_ON().
Fixes: 4e01847c38f7 ("drm/amdgpu: optimize amdgpu device attribute code")
Cc: Dan Carpenter
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 3922dd274f30..383b2b778456 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -2171,15 +2171,19 @@ static int amdgpu_device_attr_create(struct
amdgpu_device *adev,
uint32_t mask, struct list_head *attr_list)
{
int ret = 0;
- struct device_attribute *dev_attr = &attr->dev_attr;
- const char *name = dev_attr->attr.name;
enum amdgpu_device_attr_states attr_states = ATTR_STATE_SUPPORTED;
struct amdgpu_device_attr_entry *attr_entry;
+ struct device_attribute *dev_attr;
+ const char *name;
int (*attr_update)(struct amdgpu_device *adev, struct
amdgpu_device_attr *attr,
uint32_t mask, enum amdgpu_device_attr_states
*states) = default_attr_update;
- BUG_ON(!attr);
+ if (!attr)
+ return -EINVAL;
+
+ dev_attr = &attr->dev_attr;
+ name = dev_attr->attr.name;
attr_update = attr->attr_update ? attr->attr_update :
default_attr_update;
--
2.34.1
Re: [PATCH -next] drm/amdgpu: Remove a lot of unnecessary ternary operators
On 2023/8/1 0:14, Limonciello, Mario wrote:
>
>
> On 7/31/2023 8:26 AM, Ruan Jinjie wrote:
>> Ther are many ternary operators, the true or false judgement
>> of which is unnecessary in C language semantics.
> s/Ther/There/
>
> Unnecessary; sure. But don't they improve the readability quite a bit?
The benevolent people have different opinions, it's redundant in my
opinion. And there are many same operation such as “state ==
AMD_CG_STATE_GATE", which can be encapsulated into a helper.
>
>>
>> Signed-off-by: Ruan Jinjie
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c  | 2 +-
>> Â drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c |Â 2 +-
>> Â drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c |Â 2 +-
>>  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 2 +-
>>  drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
>>  drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 2 +-
>>  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 2 +-
>>  .../drm/amd/display/dc/dce/dce_link_encoder.c | 4 +---
>>  .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c   | 6 +++---
>>  .../amd/pm/powerplay/hwmgr/smu7_powertune.c   | 2 +-
>>  .../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 18 +++---
>> Â .../amd/pm/powerplay/smumgr/polaris10_smumgr.c |Â 2 +-
>> Â .../drm/amd/pm/powerplay/smumgr/vegam_smumgr.c |Â 7 +++
>> Â 13 files changed, 23 insertions(+), 30 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
>> index b582b83c4984..38ccec913f00 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
>> @@ -460,7 +460,7 @@ bool amdgpu_get_bios(struct amdgpu_device *adev)
>> Â return false;
>> Â Â success:
>> -Â Â Â adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false;
>> +Â Â Â adev->is_atom_fw = adev->asic_type >= CHIP_VEGA10;
>> Â return true;
>> Â }
>> Â diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
>> b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
>> index 79791379fc2b..df4440c21bbf 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
>> @@ -479,7 +479,7 @@ static int jpeg_v3_0_set_clockgating_state(void
>> *handle,
>> Â Â Â enum amd_clockgating_state state)
>> Â {
>> Â struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>> -Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
>> +Â Â Â bool enable = state == AMD_CG_STATE_GATE;
>> Â Â if (enable) {
>> Â if (!jpeg_v3_0_is_idle(handle))
>> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
>> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
>> index a707d407fbd0..3eb3dcd56b57 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
>> @@ -626,7 +626,7 @@ static int jpeg_v4_0_set_clockgating_state(void
>> *handle,
>> Â Â Â enum amd_clockgating_state state)
>> Â {
>> Â struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>> -Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
>> +Â Â Â bool enable = state == AMD_CG_STATE_GATE;
>> Â Â if (enable) {
>> Â if (!jpeg_v4_0_is_idle(handle))
>> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
>> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
>> index ce2b22f7e4e4..153731d6ce8b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
>> @@ -785,7 +785,7 @@ static int jpeg_v4_0_3_set_clockgating_state(void
>> *handle,
>> Â Â Â enum amd_clockgating_state state)
>> Â {
>> Â struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>> -Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
>> +Â Â Â bool enable = state == AMD_CG_STATE_GATE;
>> Â int i;
>> Â Â for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>> b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>> index b76ba21b5a89..9b662b105cc1 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>> @@ -2095,7 +2095,7 @@ static int vcn_v3_0_set_clockgating_state(void
>> *handle,
>> Â Â Â enum amd_clockgating_state state)
>> Â {
>> Â struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>> -Â Â Â bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
>> +Â Â Â bool enable = state == AMD_CG_STATE_GATE;
>> Â int i;
>> Â Â for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>> b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>> index 6089c7deba8a..7c486745bece 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>> @@ -1918,7 +1918,7 @@ static int vcn_v4_0_wait_for_idle(void *handle)
>> Â static int vcn_v4_0_set_clockgating_state(void *handle, enum
>> amd_clockgating_state state)
>> Â {
>> Â struct amdgpu_device *adev = (struct amdgpu_de
Re: [PATCH -next] drm/amdgpu: Remove a lot of unnecessary ternary operators
On 2023/8/1 0:22, Tom Rix wrote: > > On 7/31/23 6:26 AM, Ruan Jinjie wrote: >> Ther are many ternary operators, the true or false judgement >> of which is unnecessary in C language semantics. >> >> Signed-off-by: Ruan Jinjie >> --- > > snip >> data->registry_data.avfs_support = >> -hwmgr->feature_mask & PP_AVFS_MASK ? true : false; >> +hwmgr->feature_mask & PP_AVFS_MASK; >> data->registry_data.led_dpm_enabled = 1; > > These are not equivalent, consider 0x & 0x1000 != 1 Sorry! these are actually not equivalent，I'll fix it in v2. But the many others could be more simplified. > > Tom > >
[PATCH] drm/amd/pm/powerplay/hwmgr/ppevvmath: Clean up errors in ppevvmath.h
Fix the following errors reported by checkpatch:
ERROR: return is not a function, parentheses are not required
ERROR: space required after that ',' (ctx:VxV)
ERROR: space required before the open parenthesis '('
ERROR: need consistent spacing around '-' (ctx:WxV)
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppevvmath.h | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppevvmath.h
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppevvmath.h
index dac29fe6cfc6..6f54c410c2f9 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppevvmath.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppevvmath.h
@@ -166,7 +166,7 @@ static fInt fNaturalLog(fInt value)
error_term = fAdd(fNegativeOne, value);
- return (fAdd(solution, error_term));
+ return fAdd(solution, error_term);
}
static fInt fDecodeLinearFuse(uint32_t fuse_value, fInt f_min, fInt f_range,
uint32_t bitlength)
@@ -230,7 +230,7 @@ static fInt ConvertToFraction(int X) /*Add all range
checking here. Is it possib
static fInt fNegate(fInt X)
{
fInt CONSTANT_NEGONE = ConvertToFraction(-1);
- return (fMultiply(X, CONSTANT_NEGONE));
+ return fMultiply(X, CONSTANT_NEGONE);
}
static fInt Convert_ULONG_ToFraction(uint32_t X)
@@ -382,14 +382,14 @@ static int ConvertBackToInteger (fInt A) /*THIS is the
function that will be use
scaledDecimal.full = uGetScaledDecimal(A);
- fullNumber = fAdd(scaledDecimal,scaledReal);
+ fullNumber = fAdd(scaledDecimal, scaledReal);
return fullNumber.full;
}
static fInt fGetSquare(fInt A)
{
- return fMultiply(A,A);
+ return fMultiply(A, A);
}
/* x_new = x_old - (x_old^2 - C) / (2 * x_old) */
@@ -447,7 +447,7 @@ static fInt fSqrt(fInt num)
} while (uAbs(error) > 0);
- return (x_new);
+ return x_new;
}
static void SolveQuadracticEqn(fInt A, fInt B, fInt C, fInt Roots[])
@@ -459,7 +459,7 @@ static void SolveQuadracticEqn(fInt A, fInt B, fInt C, fInt
Roots[])
f_CONSTANT100 = ConvertToFraction(100);
f_CONSTANT10 = ConvertToFraction(10);
- while(GreaterThan(A, f_CONSTANT100) || GreaterThan(B, f_CONSTANT100) ||
GreaterThan(C, f_CONSTANT100)) {
+ while (GreaterThan(A, f_CONSTANT100) || GreaterThan(B, f_CONSTANT100)
|| GreaterThan(C, f_CONSTANT100)) {
A = fDivide(A, f_CONSTANT10);
B = fDivide(B, f_CONSTANT10);
C = fDivide(C, f_CONSTANT10);
@@ -515,7 +515,7 @@ static int uGetScaledDecimal (fInt A) /*Converts the
fractional portion to whole
dec[i] = tmp / (1 << SHIFT_AMOUNT);
tmp = tmp - ((1 << SHIFT_AMOUNT)*dec[i]);
tmp *= 10;
- scaledDecimal = scaledDecimal + dec[i]*uPow(10, PRECISION - 1
-i);
+ scaledDecimal = scaledDecimal + dec[i]*uPow(10, PRECISION - 1 -
i);
}
return scaledDecimal;
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in amd_powerplay.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: spaces required around that '||' (ctx:WxO)
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
index ff360c699171..9e4f8a4104a3 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
@@ -612,7 +612,7 @@ static int pp_dpm_get_pp_num_states(void *handle,
memset(data, 0, sizeof(*data));
- if (!hwmgr || !hwmgr->pm_en ||!hwmgr->ps)
+ if (!hwmgr || !hwmgr->pm_en || !hwmgr->ps)
return -EINVAL;
data->nums = hwmgr->num_ps;
@@ -644,7 +644,7 @@ static int pp_dpm_get_pp_table(void *handle, char **table)
{
struct pp_hwmgr *hwmgr = handle;
- if (!hwmgr || !hwmgr->pm_en ||!hwmgr->soft_pp_table)
+ if (!hwmgr || !hwmgr->pm_en || !hwmgr->soft_pp_table)
return -EINVAL;
*table = (char *)hwmgr->soft_pp_table;
@@ -1002,7 +1002,7 @@ static int pp_get_power_limit(void *handle, uint32_t
*limit,
struct pp_hwmgr *hwmgr = handle;
int ret = 0;
- if (!hwmgr || !hwmgr->pm_en ||!limit)
+ if (!hwmgr || !hwmgr->pm_en || !limit)
return -EINVAL;
if (power_type != PP_PWR_TYPE_SUSTAINED)
@@ -1047,7 +1047,7 @@ static int pp_get_display_power_level(void *handle,
{
struct pp_hwmgr *hwmgr = handle;
- if (!hwmgr || !hwmgr->pm_en ||!output)
+ if (!hwmgr || !hwmgr->pm_en || !output)
return -EINVAL;
return phm_get_dal_power_level(hwmgr, output);
@@ -1120,7 +1120,7 @@ static int pp_get_clock_by_type_with_latency(void *handle,
{
struct pp_hwmgr *hwmgr = handle;
- if (!hwmgr || !hwmgr->pm_en ||!clocks)
+ if (!hwmgr || !hwmgr->pm_en || !clocks)
return -EINVAL;
return phm_get_clock_by_type_with_latency(hwmgr, type, clocks);
@@ -1132,7 +1132,7 @@ static int pp_get_clock_by_type_with_voltage(void *handle,
{
struct pp_hwmgr *hwmgr = handle;
- if (!hwmgr || !hwmgr->pm_en ||!clocks)
+ if (!hwmgr || !hwmgr->pm_en || !clocks)
return -EINVAL;
return phm_get_clock_by_type_with_voltage(hwmgr, type, clocks);
@@ -1155,7 +1155,7 @@ static int pp_display_clock_voltage_request(void *handle,
{
struct pp_hwmgr *hwmgr = handle;
- if (!hwmgr || !hwmgr->pm_en ||!clock)
+ if (!hwmgr || !hwmgr->pm_en || !clock)
return -EINVAL;
return phm_display_clock_voltage_request(hwmgr, clock);
@@ -1167,7 +1167,7 @@ static int pp_get_display_mode_validation_clocks(void
*handle,
struct pp_hwmgr *hwmgr = handle;
int ret = 0;
- if (!hwmgr || !hwmgr->pm_en ||!clocks)
+ if (!hwmgr || !hwmgr->pm_en || !clocks)
return -EINVAL;
clocks->level = PP_DAL_POWERLEVEL_7;
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in vega10_powertune.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space prohibited after that open parenthesis '('
Signed-off-by: Ran Sun
---
.../amd/pm/powerplay/hwmgr/vega10_powertune.c | 89 +++
1 file changed, 31 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c
index 309a9d3bc1b7..3007b054c873 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c
@@ -30,8 +30,7 @@
#include "pp_debug.h"
#include "soc15_common.h"
-static const struct vega10_didt_config_reg SEDiDtTuningCtrlConfig_Vega10[] =
-{
+static const struct vega10_didt_config_reg SEDiDtTuningCtrlConfig_Vega10[] = {
/*
-
* Offset Mask
Shift Value
*
-
@@ -55,8 +54,7 @@ static const struct vega10_didt_config_reg
SEDiDtTuningCtrlConfig_Vega10[] =
{ 0x } /* End of list */
};
-static const struct vega10_didt_config_reg SEDiDtCtrl3Config_vega10[] =
-{
+static const struct vega10_didt_config_reg SEDiDtCtrl3Config_vega10[] = {
/*
-
* Offset Mask
ShiftValue
*
-
@@ -120,8 +118,7 @@ static const struct vega10_didt_config_reg
SEDiDtCtrl3Config_vega10[] =
{ 0x } /* End of list */
};
-static const struct vega10_didt_config_reg SEDiDtCtrl2Config_Vega10[] =
-{
+static const struct vega10_didt_config_reg SEDiDtCtrl2Config_Vega10[] = {
/*
-
* OffsetMask
Shift Value
*
-
@@ -149,8 +146,7 @@ static const struct vega10_didt_config_reg
SEDiDtCtrl2Config_Vega10[] =
{ 0x } /* End of list */
};
-static const struct vega10_didt_config_reg SEDiDtCtrl1Config_Vega10[] =
-{
+static const struct vega10_didt_config_reg SEDiDtCtrl1Config_Vega10[] = {
/*
-
* Offset Mask
Shift Value
*
-
@@ -172,8 +168,7 @@ static const struct vega10_didt_config_reg
SEDiDtCtrl1Config_Vega10[] =
};
-static const struct vega10_didt_config_reg SEDiDtWeightConfig_Vega10[] =
-{
+static const struct vega10_didt_config_reg SEDiDtWeightConfig_Vega10[] = {
/*
-
* Offset Mask
Shift Value
*
-
@@ -201,8 +196,7 @@ static const struct vega10_didt_config_reg
SEDiDtWeightConfig_Vega10[] =
{ 0x } /* End of list */
};
-static const struct vega10_didt_config_reg SEDiDtCtrl0Config_Vega10[] =
-{
+static const struct vega10_didt_config_reg SEDiDtCtrl0Config_Vega10[] = {
/*
--
[PATCH] drm/amdgpu: Clean up errors in vega20_baco.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space required before the open parenthesis '('
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
index 8d99c7a5abf8..994c0d374bfa 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
@@ -31,8 +31,7 @@
#include "amdgpu_ras.h"
-static const struct soc15_baco_cmd_entry clean_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry clean_baco_tbl[] = {
{CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_6), 0, 0, 0, 0},
{CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0, 0, 0, 0},
};
@@ -90,11 +89,11 @@ int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum
BACO_STATE state)
data |= 0x8000;
WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
- if(smum_send_msg_to_smc_with_parameter(hwmgr,
+ if (smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_EnterBaco, 0, NULL))
return -EINVAL;
} else {
- if(smum_send_msg_to_smc_with_parameter(hwmgr,
+ if (smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_EnterBaco, 1, NULL))
return -EINVAL;
}
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in amdgpu_smu.c
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '=' (ctx:WxV)
ERROR: spaces required around that '&&' (ctx:VxW)
ERROR: that open brace { should be on the previous line
ERROR: space required before the open parenthesis '('
ERROR: space required before the open brace '{'
ERROR: spaces required around that ':' (ctx:VxW)
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index ce41a8309582..a7199275ffb8 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -618,7 +618,7 @@ static int smu_set_funcs(struct amdgpu_device *adev)
adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
arcturus_set_ppt_funcs(smu);
/* OD is not supported on Arcturus */
- smu->od_enabled =false;
+ smu->od_enabled = false;
break;
case IP_VERSION(13, 0, 2):
aldebaran_set_ppt_funcs(smu);
@@ -1648,7 +1648,7 @@ static int smu_hw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct smu_context *smu = adev->powerplay.pp_handle;
- if (amdgpu_sriov_vf(adev)&& !amdgpu_sriov_is_pp_one_vf(adev))
+ if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
return 0;
smu_dpm_set_vcn_enable(smu, false);
@@ -1700,7 +1700,7 @@ static int smu_suspend(void *handle)
int ret;
uint64_t count;
- if (amdgpu_sriov_vf(adev)&& !amdgpu_sriov_is_pp_one_vf(adev))
+ if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
return 0;
if (!smu->pm_enabled)
@@ -2217,8 +2217,7 @@ const struct amd_ip_funcs smu_ip_funcs = {
.set_powergating_state = smu_set_powergating_state,
};
-const struct amdgpu_ip_block_version smu_v11_0_ip_block =
-{
+const struct amdgpu_ip_block_version smu_v11_0_ip_block = {
.type = AMD_IP_BLOCK_TYPE_SMC,
.major = 11,
.minor = 0,
@@ -2226,8 +2225,7 @@ const struct amdgpu_ip_block_version smu_v11_0_ip_block =
.funcs = &smu_ip_funcs,
};
-const struct amdgpu_ip_block_version smu_v12_0_ip_block =
-{
+const struct amdgpu_ip_block_version smu_v12_0_ip_block = {
.type = AMD_IP_BLOCK_TYPE_SMC,
.major = 12,
.minor = 0,
@@ -2235,8 +2233,7 @@ const struct amdgpu_ip_block_version smu_v12_0_ip_block =
.funcs = &smu_ip_funcs,
};
-const struct amdgpu_ip_block_version smu_v13_0_ip_block =
-{
+const struct amdgpu_ip_block_version smu_v13_0_ip_block = {
.type = AMD_IP_BLOCK_TYPE_SMC,
.major = 13,
.minor = 0,
@@ -2337,7 +2334,7 @@ int smu_get_power_limit(void *handle,
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EOPNOTSUPP;
- switch(pp_power_type) {
+ switch (pp_power_type) {
case PP_PWR_TYPE_SUSTAINED:
limit_type = SMU_DEFAULT_PPT_LIMIT;
break;
@@ -2349,7 +2346,7 @@ int smu_get_power_limit(void *handle,
break;
}
- switch(pp_limit_level){
+ switch (pp_limit_level) {
case PP_PWR_LIMIT_CURRENT:
limit_level = SMU_PPT_LIMIT_CURRENT;
break;
@@ -2595,7 +2592,7 @@ static int smu_read_sensor(void *handle,
*size = 4;
break;
case AMDGPU_PP_SENSOR_VCN_POWER_STATE:
- *(uint32_t *)data =
atomic_read(&smu->smu_power.power_gate.vcn_gated) ? 0: 1;
+ *(uint32_t *)data =
atomic_read(&smu->smu_power.power_gate.vcn_gated) ? 0 : 1;
*size = 4;
break;
case AMDGPU_PP_SENSOR_MIN_FAN_RPM:
@@ -2868,7 +2865,7 @@ static int smu_set_xgmi_pstate(void *handle,
if (smu->ppt_funcs->set_xgmi_pstate)
ret = smu->ppt_funcs->set_xgmi_pstate(smu, pstate);
- if(ret)
+ if (ret)
dev_err(smu->adev->dev, "Failed to set XGMI pstate!\n");
return ret;
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in common_baco.c
Fix the following errors reported by checkpatch:
ERROR: code indent should use tabs where possible
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c
index 1c73776bd606..fd79337a3536 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c
@@ -42,7 +42,7 @@ static bool baco_wait_register(struct pp_hwmgr *hwmgr, u32
reg, u32 mask, u32 va
}
static bool baco_cmd_handler(struct pp_hwmgr *hwmgr, u32 command, u32 reg, u32
mask,
- u32 shift, u32 value, u32 timeout)
+ u32 shift, u32 value, u32 timeout)
{
struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
u32 data;
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in smu_v13_0_5_ppt.c
Fix the following errors reported by checkpatch: ERROR: space prohibited before that ',' (ctx:WxW) Signed-off-by: Ran Sun --- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c index 42f110602eb1..87a79e6f983b 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c @@ -75,7 +75,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_5_message_map[SMU_MSG_MAX_COUNT] = MSG_MAP(SetDriverDramAddrHigh, PPSMC_MSG_SetDriverDramAddrHigh, 1), MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1), MSG_MAP(TransferTableSmu2Dram, PPSMC_MSG_TransferTableSmu2Dram, 1), - MSG_MAP(TransferTableDram2Smu, PPSMC_MSG_TransferTableDram2Smu , 1), + MSG_MAP(TransferTableDram2Smu, PPSMC_MSG_TransferTableDram2Smu,1), MSG_MAP(GetGfxclkFrequency, PPSMC_MSG_GetGfxclkFrequency, 1), MSG_MAP(GetEnabledSmuFeatures, PPSMC_MSG_GetEnabledSmuFeatures, 1), MSG_MAP(SetSoftMaxVcn, PPSMC_MSG_SetSoftMaxVcn,1), -- 2.17.1
[PATCH] drm/amd/pm: Clean up errors in smu_v13_0_7_ppt.c
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: spaces required around that '=' (ctx:VxW)
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index b1f0937ccade..26ba51ec0567 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -386,8 +386,7 @@ static int smu_v13_0_7_check_fw_status(struct smu_context
*smu)
}
#ifndef atom_smc_dpm_info_table_13_0_7
-struct atom_smc_dpm_info_table_13_0_7
-{
+struct atom_smc_dpm_info_table_13_0_7 {
struct atom_common_table_header table_header;
BoardTable_t BoardTable;
};
@@ -494,7 +493,7 @@ static int smu_v13_0_7_tables_init(struct smu_context *smu)
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_ACTIVITY_MONITOR_COEFF,
sizeof(DpmActivityMonitorCoeffIntExternal_t), PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM);
+ AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_COMBO_PPTABLE,
MP0_MP1_DATA_REGION_SIZE_COMBOPPTABLE,
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -728,7 +727,7 @@ static int smu_v13_0_7_get_smu_metrics_data(struct
smu_context *smu,
MetricsMember_t member,
uint32_t *value)
{
- struct smu_table_context *smu_table= &smu->smu_table;
+ struct smu_table_context *smu_table = &smu->smu_table;
SmuMetrics_t *metrics =
&(((SmuMetricsExternal_t
*)(smu_table->metrics_table))->SmuMetrics);
int ret = 0;
@@ -1635,8 +1634,7 @@ static int smu_v13_0_7_force_clk_levels(struct
smu_context *smu,
return ret;
}
-static const struct smu_temperature_range smu13_thermal_policy[] =
-{
+static const struct smu_temperature_range smu13_thermal_policy[] = {
{-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},
{ 12, 12, 12, 12, 12, 12, 12, 12,
12},
};
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in smu_v11_0.h
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: code indent should use tabs where possible
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h | 7 +++---
scripts/checkpatch.pl| 23
2 files changed, 3 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
index d466db6f0ad4..1b4e0e4716ea 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
@@ -67,8 +67,7 @@ static const __maybe_unused uint16_t link_width[] = {0, 1, 2,
4, 8, 12, 16};
static const __maybe_unused uint16_t link_speed[] = {25, 50, 80, 160};
static const
-struct smu_temperature_range __maybe_unused smu11_thermal_policy[] =
-{
+struct smu_temperature_range __maybe_unused smu11_thermal_policy[] = {
{-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},
{ 12, 12, 12, 12, 12, 12, 12, 12,
12},
};
@@ -96,8 +95,8 @@ struct smu_11_0_dpm_table {
};
struct smu_11_0_pcie_table {
-uint8_t pcie_gen[MAX_PCIE_CONF];
-uint8_t pcie_lane[MAX_PCIE_CONF];
+ uint8_t pcie_gen[MAX_PCIE_CONF];
+ uint8_t pcie_lane[MAX_PCIE_CONF];
};
struct smu_11_0_dpm_tables {
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 85a0598bf723..528f619520eb 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -7449,23 +7449,6 @@ sub process {
}
# Complain about RCU Tasks Trace used outside of BPF (and of course, RCU).
-<<< HEAD
-<<< HEAD
- if ($line =~ /\brcu_read_lock_trace\s*\(/ ||
- $line =~ /\brcu_read_lock_trace_held\s*\(/ ||
- $line =~ /\brcu_read_unlock_trace\s*\(/ ||
- $line =~ /\bcall_rcu_tasks_trace\s*\(/ ||
- $line =~ /\bsynchronize_rcu_tasks_trace\s*\(/ ||
- $line =~ /\brcu_barrier_tasks_trace\s*\(/ ||
- $line =~ /\brcu_request_urgent_qs_task\s*\(/) {
- if ($realfile !~ m@^kernel/bpf@ &&
- $realfile !~ m@^include/linux/bpf@ &&
- $realfile !~ m@^net/bpf@ &&
- $realfile !~ m@^kernel/rcu@ &&
- $realfile !~ m@^include/linux/rcu@) {
-===
-===
->>> d7b3af5a77e8d8da28f435f313e069aea5bcf172
our $rcu_trace_funcs = qr{(?x:
rcu_read_lock_trace |
rcu_read_lock_trace_held |
@@ -7482,14 +7465,8 @@ sub process {
kernel/rcu/ |
include/linux/rcu
)};
-<<< HEAD
- if ($line =~ /\b$rcu_trace_funcs\s*\(/) {
- if ($realfile !~ m@^$rcu_trace_paths@) {
->>> 4d2c646ac07cf4a35ef1c4a935a1a4fd6c6b1a36
-===
if ($line =~ /\b($rcu_trace_funcs)\s*\(/) {
if ($realfile !~ m{^$rcu_trace_paths}) {
->>> d7b3af5a77e8d8da28f435f313e069aea5bcf172
WARN("RCU_TASKS_TRACE",
"use of RCU tasks trace is incorrect
outside BPF or core RCU code\n" . $herecurr);
}
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in smu10_hwmgr.c
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '=' (ctx:VxW)
ERROR: space required after that ',' (ctx:VxV)
Signed-off-by: Ran Sun
---
.../gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
index 86d6e88c7386..02ba68d7c654 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
@@ -430,37 +430,37 @@ static int smu10_apply_state_adjust_rules(struct pp_hwmgr
*hwmgr,
}
/* temporary hardcoded clock voltage breakdown tables */
-static const DpmClock_t VddDcfClk[]= {
+static const DpmClock_t VddDcfClk[] = {
{ 300, 2600},
{ 600, 3200},
{ 600, 3600},
};
-static const DpmClock_t VddSocClk[]= {
+static const DpmClock_t VddSocClk[] = {
{ 478, 2600},
{ 722, 3200},
{ 722, 3600},
};
-static const DpmClock_t VddFClk[]= {
+static const DpmClock_t VddFClk[] = {
{ 400, 2600},
{1200, 3200},
{1200, 3600},
};
-static const DpmClock_t VddDispClk[]= {
+static const DpmClock_t VddDispClk[] = {
{ 435, 2600},
{ 661, 3200},
{1086, 3600},
};
-static const DpmClock_t VddDppClk[]= {
+static const DpmClock_t VddDppClk[] = {
{ 435, 2600},
{ 661, 3200},
{ 661, 3600},
};
-static const DpmClock_t VddPhyClk[]= {
+static const DpmClock_t VddPhyClk[] = {
{ 540, 2600},
{ 810, 3200},
{ 810, 3600},
@@ -1358,7 +1358,7 @@ static int smu10_set_watermarks_for_clocks_ranges(struct
pp_hwmgr *hwmgr,
struct amdgpu_device *adev = hwmgr->adev;
int i;
- smu_set_watermarks_for_clocks_ranges(table,wm_with_clock_ranges);
+ smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
if (adev->apu_flags & AMD_APU_IS_RAVEN2) {
for (i = 0; i < NUM_WM_RANGES; i++)
@@ -1461,7 +1461,7 @@ static int smu10_get_power_profile_mode(struct pp_hwmgr
*hwmgr, char *buf)
phm_get_sysfs_buf(&buf, &size);
- size += sysfs_emit_at(buf, size, "%s %16s %s %s %s %s\n",title[0],
+ size += sysfs_emit_at(buf, size, "%s %16s %s %s %s %s\n", title[0],
title[1], title[2], title[3], title[4], title[5]);
for (i = 0; i <= PP_SMC_POWER_PROFILE_COMPUTE; i++)
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in amdgpu_smu.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following enum go on the same line
ERROR: open brace '{' following struct go on the same line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 36 +++
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 6e2069dcb6b9..190a90b24d74 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -200,29 +200,25 @@ struct smu_power_state {
struct smu_hw_power_state hardware;
};
-enum smu_power_src_type
-{
+enum smu_power_src_type {
SMU_POWER_SOURCE_AC,
SMU_POWER_SOURCE_DC,
SMU_POWER_SOURCE_COUNT,
};
-enum smu_ppt_limit_type
-{
+enum smu_ppt_limit_type {
SMU_DEFAULT_PPT_LIMIT = 0,
SMU_FAST_PPT_LIMIT,
};
-enum smu_ppt_limit_level
-{
+enum smu_ppt_limit_level {
SMU_PPT_LIMIT_MIN = -1,
SMU_PPT_LIMIT_CURRENT,
SMU_PPT_LIMIT_DEFAULT,
SMU_PPT_LIMIT_MAX,
};
-enum smu_memory_pool_size
-{
+enum smu_memory_pool_size {
SMU_MEMORY_POOL_SIZE_ZERO = 0,
SMU_MEMORY_POOL_SIZE_256_MB = 0x1000,
SMU_MEMORY_POOL_SIZE_512_MB = 0x2000,
@@ -282,8 +278,7 @@ struct smu_clock_info {
uint32_t max_bus_bandwidth;
};
-struct smu_bios_boot_up_values
-{
+struct smu_bios_boot_up_values {
uint32_trevision;
uint32_tgfxclk;
uint32_tuclk;
@@ -305,8 +300,7 @@ struct smu_bios_boot_up_values
uint32_tfirmware_caps;
};
-enum smu_table_id
-{
+enum smu_table_id {
SMU_TABLE_PPTABLE = 0,
SMU_TABLE_WATERMARKS,
SMU_TABLE_CUSTOM_DPM,
@@ -326,8 +320,7 @@ enum smu_table_id
SMU_TABLE_COUNT,
};
-struct smu_table_context
-{
+struct smu_table_context {
void*power_play_table;
uint32_tpower_play_table_size;
void*hardcode_pptable;
@@ -390,8 +383,7 @@ struct smu_power_context {
};
#define SMU_FEATURE_MAX(64)
-struct smu_feature
-{
+struct smu_feature {
uint32_t feature_num;
DECLARE_BITMAP(supported, SMU_FEATURE_MAX);
DECLARE_BITMAP(allowed, SMU_FEATURE_MAX);
@@ -416,21 +408,18 @@ struct mclock_latency_table {
struct mclk_latency_entries entries[MAX_REGULAR_DPM_NUM];
};
-enum smu_reset_mode
-{
+enum smu_reset_mode {
SMU_RESET_MODE_0,
SMU_RESET_MODE_1,
SMU_RESET_MODE_2,
};
-enum smu_baco_state
-{
+enum smu_baco_state {
SMU_BACO_STATE_ENTER = 0,
SMU_BACO_STATE_EXIT,
};
-struct smu_baco_context
-{
+struct smu_baco_context {
uint32_t state;
bool platform_support;
bool maco_support;
@@ -478,8 +467,7 @@ struct stb_context {
#define WORKLOAD_POLICY_MAX 7
-struct smu_context
-{
+struct smu_context {
struct amdgpu_device*adev;
struct amdgpu_irq_src irq_source;
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in vega10_hwmgr.c
Fix the following errors reported by checkpatch:
ERROR: trailing statements should be on next line
ERROR: space required before the open brace '{'
ERROR: space required before the open parenthesis '('
ERROR: space required after that ',' (ctx:VxV)
Signed-off-by: Ran Sun
---
.../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
index 08518bc1cbbe..ba7294daddfe 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
@@ -670,17 +670,23 @@ static int
vega10_patch_voltage_dependency_tables_with_lookup_table(
for (i = 0; i < 6; i++) {
struct phm_ppt_v1_clock_voltage_dependency_table *vdt;
switch (i) {
- case 0: vdt = table_info->vdd_dep_on_socclk;
+ case 0:
+ vdt = table_info->vdd_dep_on_socclk;
break;
- case 1: vdt = table_info->vdd_dep_on_sclk;
+ case 1:
+ vdt = table_info->vdd_dep_on_sclk;
break;
- case 2: vdt = table_info->vdd_dep_on_dcefclk;
+ case 2:
+ vdt = table_info->vdd_dep_on_dcefclk;
break;
- case 3: vdt = table_info->vdd_dep_on_pixclk;
+ case 3:
+ vdt = table_info->vdd_dep_on_pixclk;
break;
- case 4: vdt = table_info->vdd_dep_on_dispclk;
+ case 4:
+ vdt = table_info->vdd_dep_on_dispclk;
break;
- case 5: vdt = table_info->vdd_dep_on_phyclk;
+ case 5:
+ vdt = table_info->vdd_dep_on_phyclk;
break;
}
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in smu_v13_0.c
Fix the following errors reported by checkpatch:
ERROR: space required before the open parenthesis '('
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 9b62b45ebb7f..895cda8e6934 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -1121,7 +1121,7 @@ smu_v13_0_display_clock_voltage_request(struct
smu_context *smu,
ret = smu_v13_0_set_hard_freq_limited_range(smu, clk_select,
clk_freq, 0);
- if(clk_select == SMU_UCLK)
+ if (clk_select == SMU_UCLK)
smu->hard_min_uclk_req_from_dal = clk_freq;
}
@@ -1437,8 +1437,7 @@ static int smu_v13_0_irq_process(struct amdgpu_device
*adev,
return 0;
}
-static const struct amdgpu_irq_src_funcs smu_v13_0_irq_funcs =
-{
+static const struct amdgpu_irq_src_funcs smu_v13_0_irq_funcs = {
.set = smu_v13_0_set_irq_state,
.process = smu_v13_0_irq_process,
};
@@ -1933,7 +1932,7 @@ static int smu_v13_0_get_dpm_level_count(struct
smu_context *smu,
ret = smu_v13_0_get_dpm_freq_by_index(smu, clk_type, 0xff, value);
/* SMU v13.0.2 FW returns 0 based max level, increment by one for it */
- if((smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2)) &&
(!ret && value))
+ if ((smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2)) &&
(!ret && value))
++(*value);
return ret;
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in vega12_hwmgr.c
Fix the following errors reported by checkpatch:
ERROR: need consistent spacing around '/' (ctx:WxV)
ERROR: code indent should use tabs where possible
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
index 1937be1cf5b4..4bd573d815ff 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
@@ -1623,13 +1623,13 @@ static int
vega12_notify_smc_display_config_after_ps_adjustment(
if (data->smu_features[GNLD_DPM_DCEFCLK].supported) {
clock_req.clock_type = amd_pp_dcef_clock;
- clock_req.clock_freq_in_khz = min_clocks.dcefClock/10;
+ clock_req.clock_freq_in_khz = min_clocks.dcefClock / 10;
if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) {
if (data->smu_features[GNLD_DS_DCEFCLK].supported)
PP_ASSERT_WITH_CODE(
!smum_send_msg_to_smc_with_parameter(
hwmgr, PPSMC_MSG_SetMinDeepSleepDcefclk,
- min_clocks.dcefClockInSR /100,
+ min_clocks.dcefClockInSR / 100,
NULL),
"Attempt to set divider for DCEFCLK
Failed!",
return -1);
@@ -2354,8 +2354,8 @@ static int vega12_apply_clocks_adjust_rules(struct
pp_hwmgr *hwmgr)
uint32_t i, latency;
disable_mclk_switching = ((1 < hwmgr->display_config->num_display) &&
-
!hwmgr->display_config->multi_monitor_in_sync) ||
- vblank_too_short;
+ !hwmgr->display_config->multi_monitor_in_sync)
||
+ vblank_too_short;
latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency;
/* gfxclk */
@@ -2522,7 +2522,7 @@ static int vega12_set_uclk_to_highest_dpm_level(struct
pp_hwmgr *hwmgr,
dpm_table->dpm_state.hard_min_level =
dpm_table->dpm_levels[dpm_table->count - 1].value;
PP_ASSERT_WITH_CODE(!(ret =
smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetHardMinByFreq,
- (PPCLK_UCLK << 16 ) |
dpm_table->dpm_state.hard_min_level,
+ (PPCLK_UCLK << 16) |
dpm_table->dpm_state.hard_min_level,
NULL)),
"[SetUclkToHightestDpmLevel] Set hard min uclk
failed!",
return ret);
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in vega10_baco.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space required after that ',' (ctx:VxV)
ERROR: space prohibited before that ',' (ctx:WxV)
Signed-off-by: Ran Sun
---
.../drm/amd/pm/powerplay/hwmgr/vega10_baco.c | 26 ---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_baco.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_baco.c
index 46bb16c29cf6..6836e98d37be 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_baco.c
@@ -31,24 +31,22 @@
-static const struct soc15_baco_cmd_entry pre_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry pre_baco_tbl[] = {
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIF_DOORBELL_CNTL),
BIF_DOORBELL_CNTL__DOORBELL_MONITOR_EN_MASK,
BIF_DOORBELL_CNTL__DOORBELL_MONITOR_EN__SHIFT, 0, 1},
{CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIF_FB_EN), 0, 0, 0, 0},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_DSTATE_BYPASS_MASK, BACO_CNTL__BACO_DSTATE_BYPASS__SHIFT, 0, 1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_RST_INTR_MASK_MASK, BACO_CNTL__BACO_RST_INTR_MASK__SHIFT, 0, 1}
};
-static const struct soc15_baco_cmd_entry enter_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry enter_baco_tbl[] = {
{CMD_WAITFOR, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__SOC_DOMAIN_IDLE_MASK, THM_BACO_CNTL__SOC_DOMAIN_IDLE__SHIFT,
0x, 0x8000},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_EN_MASK, BACO_CNTL__BACO_EN__SHIFT, 0, 1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_BIF_LCLK_SWITCH_MASK, BACO_CNTL__BACO_BIF_LCLK_SWITCH__SHIFT,
0, 1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_DUMMY_EN_MASK, BACO_CNTL__BACO_DUMMY_EN__SHIFT, 0, 1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_SOC_VDCI_RESET_MASK,
THM_BACO_CNTL__BACO_SOC_VDCI_RESET__SHIFT, 0, 1},
- {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_SMNCLK_MUX_MASK, THM_BACO_CNTL__BACO_SMNCLK_MUX__SHIFT,0,
1},
+ {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_SMNCLK_MUX_MASK, THM_BACO_CNTL__BACO_SMNCLK_MUX__SHIFT, 0,
1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_ISO_EN_MASK, THM_BACO_CNTL__BACO_ISO_EN__SHIFT, 0, 1},
- {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_AEB_ISO_EN_MASK, THM_BACO_CNTL__BACO_AEB_ISO_EN__SHIFT,0,
1},
+ {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_AEB_ISO_EN_MASK, THM_BACO_CNTL__BACO_AEB_ISO_EN__SHIFT, 0,
1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_ANA_ISO_EN_MASK, THM_BACO_CNTL__BACO_ANA_ISO_EN__SHIFT, 0,
1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_SOC_REFCLK_OFF_MASK,
THM_BACO_CNTL__BACO_SOC_REFCLK_OFF__SHIFT, 0, 1},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 1},
@@ -58,13 +56,12 @@ static const struct soc15_baco_cmd_entry enter_baco_tbl[] =
{CMD_WAITFOR, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_MODE_MASK, BACO_CNTL__BACO_MODE__SHIFT, 0x, 0x100}
};
-static const struct soc15_baco_cmd_entry exit_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry exit_baco_tbl[] = {
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL),
BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0},
- {CMD_DELAY_MS, 0, 0, 0, 0, 0, 0, 10,0},
- {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_SOC_REFCLK_OFF_MASK,
THM_BACO_CNTL__BACO_SOC_REFCLK_OFF__SHIFT, 0,0},
+ {CMD_DELAY_MS, 0, 0, 0, 0, 0, 0, 10, 0},
+ {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_SOC_REFCLK_OFF_MASK,
THM_BACO_CNTL__BACO_SOC_REFCLK_OFF__SHIFT, 0, 0},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_ANA_ISO_EN_MASK, THM_BACO_CNTL__BACO_ANA_ISO_EN__SHIFT, 0,
0},
- {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_AEB_ISO_EN_MASK, THM_BACO_CNTL__BACO_AEB_ISO_EN__SHIFT,0,
0},
+ {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_AEB_ISO_EN_MASK, THM_BACO_CNTL__BACO_AEB_ISO_EN__SHIFT, 0,
0},
{CMD_READMODIFYWRITE, SOC15_REG_ENTRY(THM, 0, mmTHM_BACO_CNTL),
THM_BACO_CNTL__BACO_ISO_EN_MASK, THM_BACO_CNTL__BACO_ISO_EN__SHIFT,
[PATCH] drm/amd/pm: Clean up errors in vega12_baco.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_baco.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_baco.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_baco.c
index bc53cce4f32d..32cc8de296e4 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_baco.c
@@ -29,16 +29,14 @@
#include "vega12_ppsmc.h"
#include "vega12_baco.h"
-static const struct soc15_baco_cmd_entry pre_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry pre_baco_tbl[] = {
{ CMD_READMODIFYWRITE, NBIF_HWID, 0, mmBIF_DOORBELL_CNTL_BASE_IDX,
mmBIF_DOORBELL_CNTL, BIF_DOORBELL_CNTL__DOORBELL_MONITOR_EN_MASK,
BIF_DOORBELL_CNTL__DOORBELL_MONITOR_EN__SHIFT, 0, 0 },
{ CMD_WRITE, NBIF_HWID, 0, mmBIF_FB_EN_BASE_IDX, mmBIF_FB_EN, 0, 0, 0,
0 },
{ CMD_READMODIFYWRITE, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX,
mmBACO_CNTL, BACO_CNTL__BACO_DSTATE_BYPASS_MASK,
BACO_CNTL__BACO_DSTATE_BYPASS__SHIFT, 0, 1 },
{ CMD_READMODIFYWRITE, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX,
mmBACO_CNTL, BACO_CNTL__BACO_RST_INTR_MASK_MASK,
BACO_CNTL__BACO_RST_INTR_MASK__SHIFT, 0, 1 }
};
-static const struct soc15_baco_cmd_entry enter_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry enter_baco_tbl[] = {
{ CMD_WAITFOR, THM_HWID, 0, mmTHM_BACO_CNTL_BASE_IDX, mmTHM_BACO_CNTL,
THM_BACO_CNTL__SOC_DOMAIN_IDLE_MASK, THM_BACO_CNTL__SOC_DOMAIN_IDLE__SHIFT,
0x, 0x8000 },
{ CMD_READMODIFYWRITE, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX,
mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, BACO_CNTL__BACO_EN__SHIFT, 0, 1 },
{ CMD_READMODIFYWRITE, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX,
mmBACO_CNTL, BACO_CNTL__BACO_BIF_LCLK_SWITCH_MASK,
BACO_CNTL__BACO_BIF_LCLK_SWITCH__SHIFT, 0, 1 },
@@ -56,8 +54,7 @@ static const struct soc15_baco_cmd_entry enter_baco_tbl[] =
{ CMD_WAITFOR, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX,
mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, BACO_CNTL__BACO_MODE__SHIFT,
0x, 0x100 }
};
-static const struct soc15_baco_cmd_entry exit_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry exit_baco_tbl[] = {
{ CMD_READMODIFYWRITE, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX,
mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT,
0, 0 },
{ CMD_DELAY_MS, 0, 0, 0, 0, 0, 0, 10, 0 },
{ CMD_READMODIFYWRITE, THM_HWID, 0, mmTHM_BACO_CNTL_BASE_IDX,
mmTHM_BACO_CNTL, THM_BACO_CNTL__BACO_SOC_REFCLK_OFF_MASK,
THM_BACO_CNTL__BACO_SOC_REFCLK_OFF__SHIFT, 0, 0 },
@@ -77,8 +74,7 @@ static const struct soc15_baco_cmd_entry exit_baco_tbl[] =
{ CMD_WAITFOR, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX,
mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0x, 0 }
};
-static const struct soc15_baco_cmd_entry clean_baco_tbl[] =
-{
+static const struct soc15_baco_cmd_entry clean_baco_tbl[] = {
{ CMD_WRITE, NBIF_HWID, 0, mmBIOS_SCRATCH_6_BASE_IDX, mmBIOS_SCRATCH_6,
0, 0, 0, 0 },
{ CMD_WRITE, NBIF_HWID, 0, mmBIOS_SCRATCH_7_BASE_IDX, mmBIOS_SCRATCH_7,
0, 0, 0, 0 }
};
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in smu_helper.c
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '=' (ctx:VxV)
ERROR: spaces required around that '<' (ctx:VxV)
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c
index d0b1ab6c4523..79a566f3564a 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c
@@ -696,7 +696,7 @@ int smu_get_voltage_dependency_table_ppt_v1(
return -EINVAL);
dep_table->count = allowed_dep_table->count;
- for (i=0; icount; i++) {
+ for (i = 0; i < dep_table->count; i++) {
dep_table->entries[i].clk = allowed_dep_table->entries[i].clk;
dep_table->entries[i].vddInd =
allowed_dep_table->entries[i].vddInd;
dep_table->entries[i].vdd_offset =
allowed_dep_table->entries[i].vdd_offset;
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in vega20_hwmgr.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following enum go on the same line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
index 075c0094da9c..1ba9b5fe2a5d 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.h
@@ -385,8 +385,7 @@ struct vega20_odn_data {
struct vega20_odn_temp_tableodn_temp_table;
};
-enum OD8_FEATURE_ID
-{
+enum OD8_FEATURE_ID {
OD8_GFXCLK_LIMITS = 1 << 0,
OD8_GFXCLK_CURVE= 1 << 1,
OD8_UCLK_MAX= 1 << 2,
@@ -399,8 +398,7 @@ enum OD8_FEATURE_ID
OD8_FAN_ZERO_RPM_CONTROL= 1 << 9
};
-enum OD8_SETTING_ID
-{
+enum OD8_SETTING_ID {
OD8_SETTING_GFXCLK_FMIN = 0,
OD8_SETTING_GFXCLK_FMAX,
OD8_SETTING_GFXCLK_FREQ1,
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in fiji_baco.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
.../drm/amd/pm/powerplay/hwmgr/fiji_baco.c| 24 +++
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/fiji_baco.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/fiji_baco.c
index c0368f2dfb21..b3e768fa79f2 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/fiji_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/fiji_baco.c
@@ -36,8 +36,7 @@
#include "smu/smu_7_1_3_sh_mask.h"
-static const struct baco_cmd_entry gpio_tbl[] =
-{
+static const struct baco_cmd_entry gpio_tbl[] = {
{ CMD_WRITE, mmGPIOPAD_EN, 0, 0, 0, 0x0 },
{ CMD_WRITE, mmGPIOPAD_PD_EN, 0, 0, 0, 0x0 },
{ CMD_WRITE, mmGPIOPAD_PU_EN, 0, 0, 0, 0x0 },
@@ -50,15 +49,13 @@ static const struct baco_cmd_entry gpio_tbl[] =
{ CMD_READMODIFYWRITE, mmDC_GPIO_SYNCA_MASK, 0, 0, 0, 0x }
};
-static const struct baco_cmd_entry enable_fb_req_rej_tbl[] =
-{
+static const struct baco_cmd_entry enable_fb_req_rej_tbl[] = {
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, 0xC0300024 },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, 0x1, 0x0, 0, 0x1 },
{ CMD_WRITE, mmBIF_FB_EN, 0, 0, 0, 0x0 }
};
-static const struct baco_cmd_entry use_bclk_tbl[] =
-{
+static const struct baco_cmd_entry use_bclk_tbl[] = {
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN_MASK,
CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN__SHIFT, 0, 0x1 },
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL_2 },
@@ -78,8 +75,7 @@ static const struct baco_cmd_entry use_bclk_tbl[] =
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
MPLL_BYPASSCLK_SEL__MPLL_CLKOUT_SEL_MASK,
MPLL_BYPASSCLK_SEL__MPLL_CLKOUT_SEL__SHIFT, 0, 0x2 }
};
-static const struct baco_cmd_entry turn_off_plls_tbl[] =
-{
+static const struct baco_cmd_entry turn_off_plls_tbl[] = {
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
CG_SPLL_FUNC_CNTL__SPLL_RESET_MASK, CG_SPLL_FUNC_CNTL__SPLL_RESET__SHIFT, 0,
0x1 },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
CG_SPLL_FUNC_CNTL__SPLL_PWRON_MASK, CG_SPLL_FUNC_CNTL__SPLL_PWRON__SHIFT, 0,
0x0 },
@@ -88,8 +84,7 @@ static const struct baco_cmd_entry turn_off_plls_tbl[] =
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, 0x800, 0x1b, 0, 0x0 }
};
-static const struct baco_cmd_entry clk_req_b_tbl[] =
-{
+static const struct baco_cmd_entry clk_req_b_tbl[] = {
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL_2 },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK,
CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT, 0, 0x0 },
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
@@ -104,8 +99,7 @@ static const struct baco_cmd_entry clk_req_b_tbl[] =
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK_SEL__SHIFT, 0, 0x1 }
};
-static const struct baco_cmd_entry enter_baco_tbl[] =
-{
+static const struct baco_cmd_entry enter_baco_tbl[] = {
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK,
BACO_CNTL__BACO_EN__SHIFT, 0, 0x01 },
{ CMD_READMODIFYWRITE, mmBACO_CNTL,
BACO_CNTL__BACO_BIF_SCLK_SWITCH_MASK, BACO_CNTL__BACO_BIF_SCLK_SWITCH__SHIFT,
0, 0x01 },
{ CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_BIF_SCLK_SWITCH_MASK, 0, 5,
0x4 },
@@ -122,8 +116,7 @@ static const struct baco_cmd_entry enter_baco_tbl[] =
#define BACO_CNTL__PWRGOOD_MASK
BACO_CNTL__PWRGOOD_GPIO_MASK+BACO_CNTL__PWRGOOD_MEM_MASK+BACO_CNTL__PWRGOOD_DVO_MASK
-static const struct baco_cmd_entry exit_baco_tbl[] =
-{
+static const struct baco_cmd_entry exit_baco_tbl[] = {
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK,
BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x01 },
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK,
BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 },
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK,
BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 },
@@ -138,8 +131,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
{ CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0x,
0x00 }
};
-static const struct baco_cmd_entry clean_baco_tbl[] =
-{
+static const struct baco_cmd_entry clean_baco_tbl[] = {
{ CMD_WRITE, mmBIOS_SCRATCH_0, 0, 0, 0, 0 },
{ CMD_WRITE, mmBIOS_SCRATCH_1, 0, 0, 0, 0 },
{ CMD_WRITE, mmBIOS_SCRATCH_2, 0, 0, 0, 0 },
--
2.17.1
[bug report] drm/amdgpu: optimize amdgpu device attribute code
Hello Kevin Wang, This is a semi-automatic email about new static checker warnings. The patch 4e01847c38f7: "drm/amdgpu: optimize amdgpu device attribute code" from Apr 27, 2020, leads to the following Smatch complaint: ./drivers/gpu/drm/amd/pm/amdgpu_pm.c:2182 amdgpu_device_attr_create() warn: variable dereferenced before check 'attr' (see line 2175) ./drivers/gpu/drm/amd/pm/amdgpu_pm.c 2174 struct device_attribute *dev_attr = &attr->dev_attr; 2175 const char *name = dev_attr->attr.name; ^^ Dereferenced. 2176 enum amdgpu_device_attr_states attr_states = ATTR_STATE_SUPPORTED; 2177 struct amdgpu_device_attr_entry *attr_entry; 2178 2179 int (*attr_update)(struct amdgpu_device *adev, struct amdgpu_device_attr *attr, 2180 uint32_t mask, enum amdgpu_device_attr_states *states) = default_attr_update; 2181 2182 BUG_ON(!attr); Checked to late. Also doesn't checkpatch warn about this? Calling BUG_ON() here is not correct. 2183 2184 attr_update = attr->attr_update ? attr->attr_update : default_attr_update; regards, dan carpenter
[PATCH -next] drm/amdgpu: Remove a lot of unnecessary ternary operators
Ther are many ternary operators, the true or false judgement
of which is unnecessary in C language semantics.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 2 +-
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c| 2 +-
.../drm/amd/display/dc/dce/dce_link_encoder.c | 4 +---
.../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c| 6 +++---
.../amd/pm/powerplay/hwmgr/smu7_powertune.c| 2 +-
.../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 18 +++---
.../amd/pm/powerplay/smumgr/polaris10_smumgr.c | 2 +-
.../drm/amd/pm/powerplay/smumgr/vegam_smumgr.c | 7 +++
13 files changed, 23 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
index b582b83c4984..38ccec913f00 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
@@ -460,7 +460,7 @@ bool amdgpu_get_bios(struct amdgpu_device *adev)
return false;
success:
- adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false;
+ adev->is_atom_fw = adev->asic_type >= CHIP_VEGA10;
return true;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
index 79791379fc2b..df4440c21bbf 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
@@ -479,7 +479,7 @@ static int jpeg_v3_0_set_clockgating_state(void *handle,
enum amd_clockgating_state state)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+ bool enable = state == AMD_CG_STATE_GATE;
if (enable) {
if (!jpeg_v3_0_is_idle(handle))
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
index a707d407fbd0..3eb3dcd56b57 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
@@ -626,7 +626,7 @@ static int jpeg_v4_0_set_clockgating_state(void *handle,
enum amd_clockgating_state state)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+ bool enable = state == AMD_CG_STATE_GATE;
if (enable) {
if (!jpeg_v4_0_is_idle(handle))
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
index ce2b22f7e4e4..153731d6ce8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
@@ -785,7 +785,7 @@ static int jpeg_v4_0_3_set_clockgating_state(void *handle,
enum amd_clockgating_state state)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+ bool enable = state == AMD_CG_STATE_GATE;
int i;
for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index b76ba21b5a89..9b662b105cc1 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -2095,7 +2095,7 @@ static int vcn_v3_0_set_clockgating_state(void *handle,
enum amd_clockgating_state state)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+ bool enable = state == AMD_CG_STATE_GATE;
int i;
for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 6089c7deba8a..7c486745bece 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -1918,7 +1918,7 @@ static int vcn_v4_0_wait_for_idle(void *handle)
static int vcn_v4_0_set_clockgating_state(void *handle, enum
amd_clockgating_state state)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+ bool enable = state == AMD_CG_STATE_GATE;
int i;
for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 550ac040b4be..e62472e6e7b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
@@ -1287,7 +1287,7 @@ static int vcn_v4_0_3_set_clockgating_state(void *handle,
[PATCH] drm/amd/pm: Clean up errors in smu_v13_0_6_ppt.c
Fix the following errors reported by checkpatch:
ERROR: code indent should use tabs where possible
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 1ac552142763..43afa1ee1b4a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -1248,9 +1248,9 @@ static int smu_v13_0_6_get_power_limit(struct smu_context
*smu,
uint32_t *default_power_limit,
uint32_t *max_power_limit)
{
-struct smu_table_context *smu_table = &smu->smu_table;
-struct PPTable_t *pptable =
-(struct PPTable_t *)smu_table->driver_pptable;
+ struct smu_table_context *smu_table = &smu->smu_table;
+ struct PPTable_t *pptable =
+ (struct PPTable_t *)smu_table->driver_pptable;
uint32_t power_limit = 0;
int ret;
@@ -1366,8 +1366,7 @@ static int smu_v13_0_6_set_irq_state(struct amdgpu_device
*adev,
return 0;
}
-static const struct amdgpu_irq_src_funcs smu_v13_0_6_irq_funcs =
-{
+static const struct amdgpu_irq_src_funcs smu_v13_0_6_irq_funcs = {
.set = smu_v13_0_6_set_irq_state,
.process = smu_v13_0_6_irq_process,
};
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in ci_baco.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
.../gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 21 +++
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
index 45f608838f6e..65b95d6be5c5 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
@@ -38,8 +38,7 @@
#include "gca/gfx_7_2_d.h"
#include "gca/gfx_7_2_sh_mask.h"
-static const struct baco_cmd_entry gpio_tbl[] =
-{
+static const struct baco_cmd_entry gpio_tbl[] = {
{ CMD_WRITE, mmGPIOPAD_EN, 0, 0, 0, 0x0 },
{ CMD_WRITE, mmGPIOPAD_PD_EN, 0, 0, 0, 0x0 },
{ CMD_WRITE, mmGPIOPAD_PU_EN, 0, 0, 0, 0x0 },
@@ -52,15 +51,13 @@ static const struct baco_cmd_entry gpio_tbl[] =
{ CMD_READMODIFYWRITE, mmDC_GPIO_SYNCA_MASK, 0, 0, 0, 0x }
};
-static const struct baco_cmd_entry enable_fb_req_rej_tbl[] =
-{
+static const struct baco_cmd_entry enable_fb_req_rej_tbl[] = {
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, 0xC0300024 },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, 0x1, 0x0, 0, 0x1 },
{ CMD_WRITE, mmBIF_FB_EN, 0, 0, 0, 0x0 }
};
-static const struct baco_cmd_entry use_bclk_tbl[] =
-{
+static const struct baco_cmd_entry use_bclk_tbl[] = {
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN_MASK,
CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN__SHIFT, 0, 0x1 },
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL_2 },
@@ -82,8 +79,7 @@ static const struct baco_cmd_entry use_bclk_tbl[] =
{ CMD_READMODIFYWRITE, mmMPLL_CNTL_MODE,
MPLL_CNTL_MODE__MPLL_MCLK_SEL_MASK, MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT, 0,
0x0 }
};
-static const struct baco_cmd_entry turn_off_plls_tbl[] =
-{
+static const struct baco_cmd_entry turn_off_plls_tbl[] = {
{ CMD_READMODIFYWRITE, mmDISPPLL_BG_CNTL,
DISPPLL_BG_CNTL__DISPPLL_BG_PDN_MASK, DISPPLL_BG_CNTL__DISPPLL_BG_PDN__SHIFT,
0, 0x1 },
{ CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL_DC },
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
CG_CLKPIN_CNTL_DC__OSC_EN_MASK, CG_CLKPIN_CNTL_DC__OSC_EN__SHIFT, 0, 0x0 },
@@ -120,8 +116,7 @@ static const struct baco_cmd_entry turn_off_plls_tbl[] =
{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA,
THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK_SEL__SHIFT, 0, 0x2 }
};
-static const struct baco_cmd_entry enter_baco_tbl[] =
-{
+static const struct baco_cmd_entry enter_baco_tbl[] = {
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK,
BACO_CNTL__BACO_EN__SHIFT, 0, 0x01 },
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK,
BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x01 },
{ CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK, 0,
5, 0x02 },
@@ -136,8 +131,7 @@ static const struct baco_cmd_entry enter_baco_tbl[] =
#define BACO_CNTL__PWRGOOD_MASK
BACO_CNTL__PWRGOOD_GPIO_MASK+BACO_CNTL__PWRGOOD_MEM_MASK+BACO_CNTL__PWRGOOD_DVO_MASK
-static const struct baco_cmd_entry exit_baco_tbl[] =
-{
+static const struct baco_cmd_entry exit_baco_tbl[] = {
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK,
BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x01 },
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK,
BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 },
{ CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK,
BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 },
@@ -152,8 +146,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
{ CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0x,
0x00 }
};
-static const struct baco_cmd_entry clean_baco_tbl[] =
-{
+static const struct baco_cmd_entry clean_baco_tbl[] = {
{ CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
{ CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 },
{ CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 }
--
2.17.1
Re: [PATCH v3 0/4] mm: convert to vma_is_initial_heap/stack()
On Fri, Jul 28, 2023 at 01:00:39PM +0800, Kefeng Wang wrote: > Kefeng Wang (4): > mm: factor out VMA stack and heap checks > drm/amdkfd: use vma_is_initial_stack() and vma_is_initial_heap() > selinux: use vma_is_initial_stack() and vma_is_initial_heap() > perf/core: use vma_is_initial_stack() and vma_is_initial_heap() > > drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 5 + > fs/proc/task_mmu.c | 24 > fs/proc/task_nommu.c | 15 + > include/linux/mm.h | 25 + > kernel/events/core.c | 33 ++-- > security/selinux/hooks.c | 7 ++ > 6 files changed, 44 insertions(+), 65 deletions(-) Acked-by: Peter Zijlstra (Intel)
Re: [PATCH -next] drm/amdgpu: Remove a lot of unnecessary ternary operators
On 7/31/23 6:26 AM, Ruan Jinjie wrote: Ther are many ternary operators, the true or false judgement of which is unnecessary in C language semantics. Signed-off-by: Ruan Jinjie --- snip data->registry_data.avfs_support = - hwmgr->feature_mask & PP_AVFS_MASK ? true : false; + hwmgr->feature_mask & PP_AVFS_MASK; data->registry_data.led_dpm_enabled = 1; These are not equivalent, consider 0x & 0x1000 != 1 Tom
[PATCH] drm/amd: Clean up errors in smu_v13_0_5_ppt.c
Fix the following errors reported by checkpatch: ERROR: space prohibited before that ',' (ctx:WxW) Signed-off-by: Ran Sun --- drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h index ceb13c838067..bcc42abfc768 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h +++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h @@ -61,14 +61,14 @@ #define smu_feature_get_enabled_mask(smu, mask) smu_ppt_funcs(get_enabled_mask, -EOPNOTSUPP, smu, mask) #define smu_feature_is_enabled(smu, mask) smu_ppt_funcs(feature_is_enabled, 0, smu, mask) #define smu_disable_all_features_with_exception(smu, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, mask) -#define smu_is_dpm_running(smu) smu_ppt_funcs(is_dpm_running, 0 , smu) +#define smu_is_dpm_running(smu) smu_ppt_funcs(is_dpm_running, 0, smu) #define smu_notify_display_change(smu) smu_ppt_funcs(notify_display_change, 0, smu) #define smu_populate_umd_state_clk(smu) smu_ppt_funcs(populate_umd_state_clk, 0, smu) #define smu_enable_thermal_alert(smu) smu_ppt_funcs(enable_thermal_alert, 0, smu) #define smu_disable_thermal_alert(smu) smu_ppt_funcs(disable_thermal_alert, 0, smu) #define smu_smc_read_sensor(smu, sensor, data, size) smu_ppt_funcs(read_sensor, -EINVAL, smu, sensor, data, size) #define smu_pre_display_config_changed(smu) smu_ppt_funcs(pre_display_config_changed, 0, smu) -#define smu_display_config_changed(smu) smu_ppt_funcs(display_config_changed, 0 , smu) +#define smu_display_config_changed(smu) smu_ppt_funcs(display_config_changed, 0, smu) #define smu_apply_clocks_adjust_rules(smu) smu_ppt_funcs(apply_clocks_adjust_rules, 0, smu) #define smu_notify_smc_display_config(smu) smu_ppt_funcs(notify_smc_display_config, 0, smu) #define smu_run_btc(smu) smu_ppt_funcs(run_btc, 0, smu) -- 2.17.1
[PATCH] drm/amd/pm: Clean up errors in smu_v11_0_pptable.h
Fix the following errors reported by checkpatch:
ERROR: trailing whitespace
ERROR: open brace '{' following struct go on the same line
ERROR: code indent should use tabs where possible
Signed-off-by: Ran Sun
---
.../gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h
index 0116e3d04fad..df7430876e0c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0_pptable.h
@@ -101,8 +101,7 @@ enum SMU_11_0_ODSETTING_ID {
};
#define SMU_11_0_MAX_ODSETTING32 //Maximum Number of ODSettings
-struct smu_11_0_overdrive_table
-{
+struct smu_11_0_overdrive_table {
uint8_t revision;//Revision =
SMU_11_0_PP_OVERDRIVE_VERSION
uint8_t reserve[3]; //Zero filled
field reserved for future use
uint32_t feature_count; //Total number
of supported features
@@ -127,8 +126,7 @@ enum SMU_11_0_PPCLOCK_ID {
};
#define SMU_11_0_MAX_PPCLOCK 16 //Maximum Number of PP Clocks
-struct smu_11_0_power_saving_clock_table
-{
+struct smu_11_0_power_saving_clock_table {
uint8_t revision;//Revision =
SMU_11_0_PP_POWERSAVINGCLOCK_VERSION
uint8_t reserve[3]; //Zero filled
field reserved for future use
uint32_t count;
//power_saving_clock_count = SMU_11_0_PPCLOCK_COUNT
@@ -136,8 +134,7 @@ struct smu_11_0_power_saving_clock_table
uint32_t min[SMU_11_0_MAX_PPCLOCK];
//PowerSavingClock Mode Clock Minimum array In MHz
};
-struct smu_11_0_powerplay_table
-{
+struct smu_11_0_powerplay_table {
struct atom_common_table_header header;
uint8_t table_revision;
uint16_t table_size; //Driver portion table
size. The offset to smc_pptable including header size
@@ -145,14 +142,14 @@ struct smu_11_0_powerplay_table
uint32_t golden_revision;
uint16_t format_id;
uint32_t platform_caps;
//POWERPLAYABLE::ulPlatformCaps
-
+
uint8_t thermal_controller_type; //one of
SMU_11_0_PP_THERMALCONTROLLER
uint16_t small_power_limit1;
uint16_t small_power_limit2;
uint16_t boost_power_limit;
- uint16_t od_turbo_power_limit;//Power limit setting for
Turbo mode in Performance UI Tuning.
- uint16_t od_power_save_power_limit; //Power limit setting for
PowerSave/Optimal mode in Performance UI Tuning.
+ uint16_t od_turbo_power_limit;//Power limit setting for
Turbo mode in Performance UI Tuning.
+ uint16_t od_power_save_power_limit; //Power limit setting for
PowerSave/Optimal mode in Performance UI Tuning.
uint16_t software_shutdown_temp;
uint16_t reserve[6]; //Zero filled field
reserved for future use
--
2.17.1
[PATCH] drm/amd/pm: Clean up errors in vega12_pptable.h
Fix the following errors reported by checkpatch:
ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before open square bracket '['
Signed-off-by: Ran Sun
---
.../gpu/drm/amd/pm/powerplay/hwmgr/vega12_pptable.h | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_pptable.h
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_pptable.h
index bf4f5095b80d..9b8435a4d306 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_pptable.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_pptable.h
@@ -72,8 +72,7 @@ enum ATOM_VEGA12_PPCLOCK_ID {
typedef enum ATOM_VEGA12_PPCLOCK_ID ATOM_VEGA12_PPCLOCK_ID;
-typedef struct _ATOM_VEGA12_POWERPLAYTABLE
-{
+typedef struct _ATOM_VEGA12_POWERPLAYTABLE {
struct atom_common_table_header sHeader;
UCHAR ucTableRevision;
USHORT usTableSize;
@@ -92,11 +91,11 @@ typedef struct _ATOM_VEGA12_POWERPLAYTABLE
USHORT usODPowerSavePowerLimit;
USHORT usSoftwareShutdownTemp;
- ULONG PowerSavingClockMax [ATOM_VEGA12_PPCLOCK_COUNT];
- ULONG PowerSavingClockMin [ATOM_VEGA12_PPCLOCK_COUNT];
+ ULONG PowerSavingClockMax[ATOM_VEGA12_PPCLOCK_COUNT];
+ ULONG PowerSavingClockMin[ATOM_VEGA12_PPCLOCK_COUNT];
- ULONG ODSettingsMax [ATOM_VEGA12_ODSETTING_COUNT];
- ULONG ODSettingsMin [ATOM_VEGA12_ODSETTING_COUNT];
+ ULONG ODSettingsMax[ATOM_VEGA12_ODSETTING_COUNT];
+ ULONG ODSettingsMin[ATOM_VEGA12_ODSETTING_COUNT];
USHORT usReserve[5];
--
2.17.1
[PATCH] drm/amdgpu: Clean up errors in smu7_powertune.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space required after that ',' (ctx:VxV)
Signed-off-by: Ran Sun
---
.../gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c
index 21be23ec3c79..edab3ef09d33 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c
@@ -520,8 +520,7 @@ static const struct gpu_pt_config_reg
DIDTConfig_Polaris12[] = {
{ 0x }
};
-static const struct gpu_pt_config_reg DIDTConfig_Polaris11_Kicker[] =
-{
+static const struct gpu_pt_config_reg DIDTConfig_Polaris11_Kicker[] = {
/*
-
* Offset Mask
Shift Value
Type
*
-
@@ -646,7 +645,7 @@ static const struct gpu_pt_config_reg
DIDTConfig_Polaris11_Kicker[] =
{ ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_STALL_CTRL_ENABLE_MASK,
DIDT_TCP_STALL_CTRL__DIDT_STALL_CTRL_ENABLE__SHIFT, 0x0001,
GPU_CONFIGREG_DIDT_IND },
{ ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_STALL_DELAY_HI_MASK,
DIDT_TCP_STALL_CTRL__DIDT_STALL_DELAY_HI__SHIFT,0x0001,
GPU_CONFIGREG_DIDT_IND },
{ ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_STALL_DELAY_LO_MASK,
DIDT_TCP_STALL_CTRL__DIDT_STALL_DELAY_LO__SHIFT,0x0001,
GPU_CONFIGREG_DIDT_IND },
- { ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_HI_POWER_THRESHOLD_MASK,
DIDT_TCP_STALL_CTRL__DIDT_HI_POWER_THRESHOLD__SHIFT,0x01aa,
GPU_CONFIGREG_DIDT_IND },
+ { ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_HI_POWER_THRESHOLD_MASK,
DIDT_TCP_STALL_CTRL__DIDT_HI_POWER_THRESHOLD__SHIFT, 0x01aa,
GPU_CONFIGREG_DIDT_IND },
{ ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__UNUSED_0_MASK,
DIDT_TCP_STALL_CTRL__UNUSED_0__SHIFT, 0x,
GPU_CONFIGREG_DIDT_IND },
{ ixDIDT_TCP_TUNING_CTRL,
DIDT_TCP_TUNING_CTRL__DIDT_TUNING_ENABLE_MASK,
DIDT_TCP_TUNING_CTRL__DIDT_TUNING_ENABLE__SHIFT,0x0001,
GPU_CONFIGREG_DIDT_IND },
@@ -666,8 +665,7 @@ static const struct gpu_pt_config_reg
DIDTConfig_Polaris11_Kicker[] =
{ 0x } /* End of list */
};
-static const struct gpu_pt_config_reg GCCACConfig_VegaM[] =
-{
+static const struct gpu_pt_config_reg GCCACConfig_VegaM[] = {
//
-
// Offset Mask
Shift Value
Type
//
-
@@ -703,8 +701,7 @@ static const struct gpu_pt_config_reg GCCACConfig_VegaM[] =
{ 0x } // End of list
};
-static const struct gpu_pt_config_reg DIDTConfig_VegaM[] =
-{
+static const struct gpu_pt_config_reg DIDTConfig_VegaM[] = {
//
-
// Offset Mask
Shift Value
Type
//
-
@@ -831,7 +828,7 @@ static const struct gpu_pt_config_reg DIDTConfig_VegaM[] =
{ ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_STALL_CTRL_ENABLE_MASK,
DIDT_TCP_STALL_CTRL__DIDT_STALL_CTRL_ENABLE__SHIFT, 0x0001,
GPU_CONFIGREG_DIDT_IND },
{ ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_STALL_DELAY_HI_MASK,
DIDT_TCP_STALL_CTRL__DIDT_STALL_DELAY_HI__SHIFT,0x0001,
GPU_CONFIGREG_DIDT_IND },
{ ixDIDT_TCP_STALL_CTRL,
DIDT_TCP_STALL_CTRL__DIDT_STALL_DELAY_LO_MASK,
DIDT_TCP_STALL_CTRL__DIDT_S
[PATCH] gpu: drm: amd: amdgpu: Fix calls to dev_{info,err}
Commit b0bd0a92b8158ea9c809d885e0f0c21518bdbd14 introduced
dev_{info,err} calls which failed (leading to a hang on boot) because of an
incorrect usage of the container_of macro. This fixes the error by introducing
a pointer to the device as an additional element in struct amdgpu_atpx and
struct radeon_atpx.
Fixes: https://gitlab.freedesktop.org/drm/amd/-/issues/2744
Signed-off-by: Bert Karwatzki
---
.../gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 40 +--
drivers/gpu/drm/radeon/radeon_atpx_handler.c | 30 +++---
2 files changed, 32 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
index 6f241c574665..29242ecec7b0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
@@ -37,6 +37,7 @@ struct amdgpu_atpx_functions {
struct amdgpu_atpx {
acpi_handle handle;
+ struct device *dev;
struct amdgpu_atpx_functions functions;
bool is_hybrid;
bool dgpu_req_power_for_displays;
@@ -104,22 +105,20 @@ void *amdgpu_atpx_get_dhandle(void)
/**
* amdgpu_atpx_call - call an ATPX method
*
- * @handle: acpi handle
+ * @atpx: amdgpu atpx struct
* @function: the ATPX function to execute
* @params: ATPX function params
*
* Executes the requested ATPX function (all asics).
* Returns a pointer to the acpi output buffer.
*/
-static union acpi_object *amdgpu_atpx_call(acpi_handle handle, int function,
+static union acpi_object *amdgpu_atpx_call(struct amdgpu_atpx *atpx, int
function,
struct acpi_buffer *params)
{
acpi_status status;
union acpi_object atpx_arg_elements[2];
struct acpi_object_list atpx_arg;
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
- struct acpi_device *adev = container_of(handle, struct acpi_device,
handle);
- struct device *dev = &adev->dev;
atpx_arg.count = 2;
atpx_arg.pointer = &atpx_arg_elements[0];
@@ -137,11 +136,11 @@ static union acpi_object *amdgpu_atpx_call(acpi_handle
handle, int function,
atpx_arg_elements[1].integer.value = 0;
}
- status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer);
+ status = acpi_evaluate_object(atpx->handle, NULL, &atpx_arg, &buffer);
/* Fail only if calling the method fails and ATPX is supported */
if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
- dev_err(dev, "failed to evaluate ATPX got %s\n",
+ dev_err(atpx->dev, "failed to evaluate ATPX got %s\n",
acpi_format_exception(status));
kfree(buffer.pointer);
return NULL;
@@ -183,15 +182,13 @@ static void amdgpu_atpx_parse_functions(struct
amdgpu_atpx_functions *f, u32 mas
static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
{
u32 valid_bits = 0;
- struct acpi_device *adev = container_of(atpx->handle, struct
acpi_device, handle);
- struct device *dev = &adev->dev;
if (atpx->functions.px_params) {
union acpi_object *info;
struct atpx_px_params output;
size_t size;
- info = amdgpu_atpx_call(atpx->handle,
ATPX_FUNCTION_GET_PX_PARAMETERS, NULL);
+ info = amdgpu_atpx_call(atpx, ATPX_FUNCTION_GET_PX_PARAMETERS,
NULL);
if (!info)
return -EIO;
@@ -199,7 +196,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
size = *(u16 *) info->buffer.pointer;
if (size < 10) {
- dev_err(dev, "ATPX buffer is too small: %zu\n", size);
+ dev_err(atpx->dev, "ATPX buffer is too small: %zu\n",
size);
kfree(info);
return -EINVAL;
}
@@ -232,11 +229,11 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
atpx->is_hybrid = false;
if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
if (amdgpu_atpx_priv.quirks & AMDGPU_PX_QUIRK_FORCE_ATPX) {
- dev_info(dev, "ATPX Hybrid Graphics, forcing to
ATPX\n");
+ dev_info(atpx->dev, "ATPX Hybrid Graphics, forcing to
ATPX\n");
atpx->functions.power_cntl = true;
atpx->is_hybrid = false;
} else {
- dev_info(dev, "ATPX Hybrid Graphics\n");
+ dev_info(atpx->dev, "ATPX Hybrid Graphics\n");
/*
* Disable legacy PM methods only when pcie port PM is
usable,
* otherwise the device might fail to power off or
power on.
@@ -269,10 +266,8 @@ static int amdgpu_atpx_verify_interface(struct amdgpu_atpx
*atpx)
struct atpx_verify_interface output;
size_t size;
i
[PATCH] drm/amd/pm: Clean up errors in aldebaran_ppt.c
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: space required after that ',' (ctx:VxV)
ERROR: spaces required around that '=' (ctx:VxW)
ERROR: else should follow close brace '}'
Signed-off-by: Ran Sun
---
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index ce50ef46e73f..8f26123ac703 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -94,8 +94,7 @@
*/
#define SUPPORT_BAD_CHANNEL_INFO_MSG_VERSION 0x00443300
-static const struct smu_temperature_range smu13_thermal_policy[] =
-{
+static const struct smu_temperature_range smu13_thermal_policy[] = {
{-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},
{ 12, 12, 12, 12, 12, 12, 12, 12,
12},
};
@@ -196,7 +195,7 @@ static const struct cmn2asic_mapping
aldebaran_feature_mask_map[SMU_FEATURE_COUN
ALDEBARAN_FEA_MAP(SMU_FEATURE_FW_CTF_BIT,
FEATURE_FW_CTF_BIT),
ALDEBARAN_FEA_MAP(SMU_FEATURE_THERMAL_BIT,
FEATURE_THERMAL_BIT),
ALDEBARAN_FEA_MAP(SMU_FEATURE_OUT_OF_BAND_MONITOR_BIT,
FEATURE_OUT_OF_BAND_MONITOR_BIT),
-
ALDEBARAN_FEA_MAP(SMU_FEATURE_XGMI_PER_LINK_PWR_DWN_BIT,FEATURE_XGMI_PER_LINK_PWR_DWN),
+ ALDEBARAN_FEA_MAP(SMU_FEATURE_XGMI_PER_LINK_PWR_DWN_BIT,
FEATURE_XGMI_PER_LINK_PWR_DWN),
ALDEBARAN_FEA_MAP(SMU_FEATURE_DF_CSTATE_BIT,
FEATURE_DF_CSTATE),
};
@@ -580,7 +579,7 @@ static int aldebaran_get_smu_metrics_data(struct
smu_context *smu,
MetricsMember_t member,
uint32_t *value)
{
- struct smu_table_context *smu_table= &smu->smu_table;
+ struct smu_table_context *smu_table = &smu->smu_table;
SmuMetrics_t *metrics = (SmuMetrics_t *)smu_table->metrics_table;
int ret = 0;
@@ -1906,8 +1905,7 @@ static int aldebaran_mode1_reset(struct smu_context *smu)
smu_cmn_get_smc_version(smu, NULL, &smu_version);
if (smu_version < 0x00440700) {
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_Mode1Reset, NULL);
- }
- else {
+ } else {
/* fatal error triggered by ras, PMFW supports the flag
from 68.44.0 */
if ((smu_version >= 0x00442c00) && ras &&
@@ -2116,7 +2114,7 @@ static const struct pptable_funcs aldebaran_ppt_funcs = {
.register_irq_handler = smu_v13_0_register_irq_handler,
.set_azalia_d3_pme = smu_v13_0_set_azalia_d3_pme,
.get_max_sustainable_clocks_by_dc =
smu_v13_0_get_max_sustainable_clocks_by_dc,
- .baco_is_support= aldebaran_is_baco_supported,
+ .baco_is_support = aldebaran_is_baco_supported,
.get_dpm_ultimate_freq = smu_v13_0_get_dpm_ultimate_freq,
.set_soft_freq_limited_range = aldebaran_set_soft_freq_limited_range,
.od_edit_dpm_table = aldebaran_usr_edit_dpm_table,
--
2.17.1
[PATCH] drm/amdgpu: add support to create large TMR BO for APU
TMR requires physical contiguous memory, amdgpu_bo_create_kernel()
can't satisfy large(>128MB) physical contiguous memory allocation
request with default 512MB VRAM on APU.
When requested TMR size > 128MB, use amdgpu_bo_create_kernel_at()
to create the BO at offset 32MB with a step 1MB in the VRAM range.
Signed-off-by: Lang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 38 +++--
1 file changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 15217e33b51d..3fadfaa63b2e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -783,6 +783,34 @@ static bool psp_boottime_tmr(struct psp_context *psp)
}
}
+static int psp_create_large_tmr_bo_for_apu(struct psp_context *psp,
+ int tmr_size,
+ void **cpu_addr)
+{
+ struct amdgpu_vram_mgr *mgr = &psp->adev->mman.vram_mgr;
+ uint32_t rounded_size = round_up(tmr_size, 0x10);
+ uint32_t start = 0x200;
+ uint32_t step = 0x10;
+ int ret = -ENOMEM;
+
+ for (; start + rounded_size <= mgr->manager.size &&
+start + step <= mgr->manager.size; start += step) {
+
+ ret = amdgpu_bo_create_kernel_at(psp->adev, start, tmr_size,
+&psp->tmr_bo, cpu_addr);
+ if (ret == -ENOMEM)
+ continue;
+ if (ret)
+ return ret;
+
+ psp->tmr_mc_addr = amdgpu_bo_gpu_offset(psp->tmr_bo);
+
+ break;
+ }
+
+ return ret;
+}
+
/* Set up Trusted Memory Region */
static int psp_tmr_init(struct psp_context *psp)
{
@@ -813,8 +841,13 @@ static int psp_tmr_init(struct psp_context *psp)
}
}
- if (!psp->tmr_bo) {
- pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
+ if (psp->tmr_bo)
+ return 0;
+
+ pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
+ if (psp->adev->flags & AMD_IS_APU && tmr_size > 0x800)
+ ret = psp_create_large_tmr_bo_for_apu(psp, tmr_size, pptr);
+ else
ret = amdgpu_bo_create_kernel(psp->adev, tmr_size,
PSP_TMR_ALIGNMENT,
AMDGPU_HAS_VRAM(psp->adev) ?
@@ -822,7 +855,6 @@ static int psp_tmr_init(struct psp_context *psp)
AMDGPU_GEM_DOMAIN_GTT,
&psp->tmr_bo, &psp->tmr_mc_addr,
pptr);
- }
return ret;
}
--
2.25.1
[PATCH v3] drm/amdgpu: refine amdgpu_bo_create_kernel_at()
Use amdgpu_bo_create_reserved() to create a BO in VRAM
domain would fail if requested VRAM size is large(>128MB)
on APU which usually has a default 512MB VRAM.
That's because VRAM is framgented after several allocations.
The approach is using amdgpu_bo_create_reserved() to
create a BO in CPU domain first, it will always succeed.
v2: Don't overwrite the contents at specific offset.
v3: Don't return GPU addr.
Signed-off-by: Lang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index ff73cc11d47e..df5ba9509a41 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -377,27 +377,36 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
size = ALIGN(size, PAGE_SIZE);
r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM, bo_ptr, NULL,
- cpu_addr);
+ AMDGPU_GEM_DOMAIN_CPU,
+ bo_ptr, NULL, NULL);
if (r)
return r;
if ((*bo_ptr) == NULL)
return 0;
+ (*bo_ptr)->preferred_domains = AMDGPU_GEM_DOMAIN_VRAM;
+ (*bo_ptr)->allowed_domains = (*bo_ptr)->preferred_domains;
+ (*bo_ptr)->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
+ (*bo_ptr)->flags |= cpu_addr ? AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
+ : AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
+
/*
* Remove the original mem node and create a new one at the request
* position.
*/
- if (cpu_addr)
- amdgpu_bo_kunmap(*bo_ptr);
-
ttm_resource_free(&(*bo_ptr)->tbo, &(*bo_ptr)->tbo.resource);
for (i = 0; i < (*bo_ptr)->placement.num_placement; ++i) {
(*bo_ptr)->placements[i].fpfn = offset >> PAGE_SHIFT;
(*bo_ptr)->placements[i].lpfn = (offset + size) >> PAGE_SHIFT;
+ (*bo_ptr)->placements[i].mem_type = TTM_PL_VRAM;
+ (*bo_ptr)->placements[i].flags = TTM_PL_FLAG_CONTIGUOUS;
+
+ if (!((*bo_ptr)->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED))
+ (*bo_ptr)->placements[i].flags |= TTM_PL_FLAG_TOPDOWN;
}
+
r = ttm_bo_mem_space(&(*bo_ptr)->tbo, &(*bo_ptr)->placement,
&(*bo_ptr)->tbo.resource, &ctx);
if (r)
--
2.25.1
