Re: [PATCH v3 9/9] drm/ci: uprev IGT and update testlist
On 2/10/24 15:17, Maíra Canal wrote: On 1/30/24 12:03, Vignesh Raman wrote: Uprev IGT and add amd, v3d, vc4 and vgem specific tests to testlist. Have testlist.txt per driver and include a base testlist so that the driver specific tests will run only on those hardware. Signed-off-by: Vignesh Raman --- v3: - New patch in series to uprev IGT and update testlist. --- drivers/gpu/drm/ci/gitlab-ci.yml | 2 +- drivers/gpu/drm/ci/igt_runner.sh | 12 +- drivers/gpu/drm/ci/testlist-amdgpu.txt | 151 ++ drivers/gpu/drm/ci/testlist-msm.txt | 50 ++ drivers/gpu/drm/ci/testlist-panfrost.txt | 17 ++ drivers/gpu/drm/ci/testlist-v3d.txt | 73 + drivers/gpu/drm/ci/testlist-vc4.txt | 49 ++ drivers/gpu/drm/ci/testlist.txt | 100 .../gpu/drm/ci/xfails/amdgpu-stoney-fails.txt | 24 ++- .../drm/ci/xfails/amdgpu-stoney-flakes.txt | 9 +- .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 10 +- 11 files changed, 427 insertions(+), 70 deletions(-) create mode 100644 drivers/gpu/drm/ci/testlist-amdgpu.txt create mode 100644 drivers/gpu/drm/ci/testlist-msm.txt create mode 100644 drivers/gpu/drm/ci/testlist-panfrost.txt create mode 100644 drivers/gpu/drm/ci/testlist-v3d.txt create mode 100644 drivers/gpu/drm/ci/testlist-vc4.txt diff --git a/drivers/gpu/drm/ci/gitlab-ci.yml b/drivers/gpu/drm/ci/gitlab-ci.yml index bc8cb3420476..e2b021616a8e 100644 --- a/drivers/gpu/drm/ci/gitlab-ci.yml +++ b/drivers/gpu/drm/ci/gitlab-ci.yml @@ -5,7 +5,7 @@ variables: UPSTREAM_REPO: git://anongit.freedesktop.org/drm/drm TARGET_BRANCH: drm-next - IGT_VERSION: d2af13d9f5be5ce23d996e4afd3e45990f5ab977 + IGT_VERSION: b0cc8160ebdc87ce08b7fd83bb3c99ff7a4d8610 DEQP_RUNNER_GIT_URL: https://gitlab.freedesktop.org/anholt/deqp-runner.git DEQP_RUNNER_GIT_TAG: v0.15.0 diff --git a/drivers/gpu/drm/ci/igt_runner.sh b/drivers/gpu/drm/ci/igt_runner.sh index f001e015d135..2fd09b9b7cf6 100755 --- a/drivers/gpu/drm/ci/igt_runner.sh +++ b/drivers/gpu/drm/ci/igt_runner.sh @@ -64,10 +64,20 @@ if ! grep -q "core_getversion" /install/testlist.txt; then fi set +e +if [ "$DRIVER_NAME" = "amdgpu" ]; then + TEST_LIST="/install/testlist-amdgpu.txt" +elif [ "$DRIVER_NAME" = "msm" ]; then + TEST_LIST="/install/testlist-msm.txt" +elif [ "$DRIVER_NAME" = "panfrost" ]; then + TEST_LIST="/install/testlist-panfrost.txt" +else + TEST_LIST="/install/testlist.txt" +fi + Isn't V3D and VC4 testlists missing? It would be nice if you could provide us a link to a working pipeline. Also, if possible, I would like to be CCed on the next version of this patch, as I have interest in the V3D/VC4 tests. Ah, one thing: it would be nice to add the testlists to the MAINTAINERS file. This way, maintainers can keep track of any changes. Best Regards, - Maíra igt-runner \ run \ --igt-folder /igt/libexec/igt-gpu-tools \ - --caselist /install/testlist.txt \ + --caselist $TEST_LIST \ --output /results \ $IGT_SKIPS \ $IGT_FLAKES \ diff --git a/drivers/gpu/drm/ci/testlist-amdgpu.txt b/drivers/gpu/drm/ci/testlist-amdgpu.txt new file mode 100644 index ..4486f86d340b --- /dev/null +++ b/drivers/gpu/drm/ci/testlist-amdgpu.txt @@ -0,0 +1,151 @@ +testlist.txt +amdgpu/amd_abm@dpms_cycle +amdgpu/amd_abm@backlight_monotonic_basic +amdgpu/amd_abm@backlight_monotonic_abm +amdgpu/amd_abm@abm_enabled +amdgpu/amd_abm@abm_gradual +amdgpu/amd_bo@amdgpu_bo_export_import +amdgpu/amd_bo@amdgpu_bo_metadata +amdgpu/amd_bo@amdgpu_bo_map_unmap +amdgpu/amd_bo@amdgpu_memory_alloc +amdgpu/amd_bo@amdgpu_mem_fail_alloc +amdgpu/amd_bo@amdgpu_bo_find_by_cpu_mapping +amdgpu/amd_cp_dma_misc@GTT_to_VRAM-AMDGPU_HW_IP_GFX0 +amdgpu/amd_cp_dma_misc@GTT_to_VRAM-AMDGPU_HW_IP_COMPUTE0 +amdgpu/amd_cp_dma_misc@VRAM_to_GTT-AMDGPU_HW_IP_GFX0 +amdgpu/amd_cp_dma_misc@VRAM_to_GTT-AMDGPU_HW_IP_COMPUTE0 +amdgpu/amd_cp_dma_misc@VRAM_to_VRAM-AMDGPU_HW_IP_GFX0 +amdgpu/amd_cp_dma_misc@VRAM_to_VRAM-AMDGPU_HW_IP_COMPUTE0 +amdgpu/amd_dispatch@amdgpu-dispatch-test-compute-with-IP-COMPUTE +amdgpu/amd_dispatch@amdgpu-dispatch-test-gfx-with-IP-GFX +amdgpu/amd_dispatch@amdgpu-dispatch-hang-test-gfx-with-IP-GFX +amdgpu/amd_dispatch@amdgpu-dispatch-hang-test-compute-with-IP-COMPUTE +amdgpu/amd_dispatch@amdgpu-reset-test-gfx-with-IP-GFX-and-COMPUTE +amdgpu/amd_hotplug@basic +amdgpu/amd_hotplug@basic-suspend +amdgpu/amd_jpeg_dec@amdgpu_cs_jpeg_decode +amdgpu/amd_max_bpc@4k-mode-max-bpc +amdgpu/amd_module_load@reload +amdgpu/amd_plane@test-mpo-4k +amdgpu/amd_plane@mpo-swizzle-toggle +amdgpu/amd_plane@mpo-swizzle-toggle-multihead +amdgpu/amd_plane@mpo-pan-rgb +amdgpu/amd_plane@mpo-pan-rgb-multihead +amdgpu/amd_plane@mpo-pan-nv12 +amdgpu/amd_plane@mpo-pan-nv12-multihead +amdgpu/amd_plane@mpo-p
Re: [PATCH v3 9/9] drm/ci: uprev IGT and update testlist
On 1/30/24 12:03, Vignesh Raman wrote: Uprev IGT and add amd, v3d, vc4 and vgem specific tests to testlist. Have testlist.txt per driver and include a base testlist so that the driver specific tests will run only on those hardware. Signed-off-by: Vignesh Raman --- v3: - New patch in series to uprev IGT and update testlist. --- drivers/gpu/drm/ci/gitlab-ci.yml | 2 +- drivers/gpu/drm/ci/igt_runner.sh | 12 +- drivers/gpu/drm/ci/testlist-amdgpu.txt| 151 ++ drivers/gpu/drm/ci/testlist-msm.txt | 50 ++ drivers/gpu/drm/ci/testlist-panfrost.txt | 17 ++ drivers/gpu/drm/ci/testlist-v3d.txt | 73 + drivers/gpu/drm/ci/testlist-vc4.txt | 49 ++ drivers/gpu/drm/ci/testlist.txt | 100 .../gpu/drm/ci/xfails/amdgpu-stoney-fails.txt | 24 ++- .../drm/ci/xfails/amdgpu-stoney-flakes.txt| 9 +- .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 10 +- 11 files changed, 427 insertions(+), 70 deletions(-) create mode 100644 drivers/gpu/drm/ci/testlist-amdgpu.txt create mode 100644 drivers/gpu/drm/ci/testlist-msm.txt create mode 100644 drivers/gpu/drm/ci/testlist-panfrost.txt create mode 100644 drivers/gpu/drm/ci/testlist-v3d.txt create mode 100644 drivers/gpu/drm/ci/testlist-vc4.txt diff --git a/drivers/gpu/drm/ci/gitlab-ci.yml b/drivers/gpu/drm/ci/gitlab-ci.yml index bc8cb3420476..e2b021616a8e 100644 --- a/drivers/gpu/drm/ci/gitlab-ci.yml +++ b/drivers/gpu/drm/ci/gitlab-ci.yml @@ -5,7 +5,7 @@ variables: UPSTREAM_REPO: git://anongit.freedesktop.org/drm/drm TARGET_BRANCH: drm-next - IGT_VERSION: d2af13d9f5be5ce23d996e4afd3e45990f5ab977 + IGT_VERSION: b0cc8160ebdc87ce08b7fd83bb3c99ff7a4d8610 DEQP_RUNNER_GIT_URL: https://gitlab.freedesktop.org/anholt/deqp-runner.git DEQP_RUNNER_GIT_TAG: v0.15.0 diff --git a/drivers/gpu/drm/ci/igt_runner.sh b/drivers/gpu/drm/ci/igt_runner.sh index f001e015d135..2fd09b9b7cf6 100755 --- a/drivers/gpu/drm/ci/igt_runner.sh +++ b/drivers/gpu/drm/ci/igt_runner.sh @@ -64,10 +64,20 @@ if ! grep -q "core_getversion" /install/testlist.txt; then fi set +e +if [ "$DRIVER_NAME" = "amdgpu" ]; then +TEST_LIST="/install/testlist-amdgpu.txt" +elif [ "$DRIVER_NAME" = "msm" ]; then +TEST_LIST="/install/testlist-msm.txt" +elif [ "$DRIVER_NAME" = "panfrost" ]; then +TEST_LIST="/install/testlist-panfrost.txt" +else +TEST_LIST="/install/testlist.txt" +fi + Isn't V3D and VC4 testlists missing? It would be nice if you could provide us a link to a working pipeline. Also, if possible, I would like to be CCed on the next version of this patch, as I have interest in the V3D/VC4 tests. Best Regards, - Maíra igt-runner \ run \ --igt-folder /igt/libexec/igt-gpu-tools \ ---caselist /install/testlist.txt \ +--caselist $TEST_LIST \ --output /results \ $IGT_SKIPS \ $IGT_FLAKES \ diff --git a/drivers/gpu/drm/ci/testlist-amdgpu.txt b/drivers/gpu/drm/ci/testlist-amdgpu.txt new file mode 100644 index ..4486f86d340b --- /dev/null +++ b/drivers/gpu/drm/ci/testlist-amdgpu.txt @@ -0,0 +1,151 @@ +testlist.txt +amdgpu/amd_abm@dpms_cycle +amdgpu/amd_abm@backlight_monotonic_basic +amdgpu/amd_abm@backlight_monotonic_abm +amdgpu/amd_abm@abm_enabled +amdgpu/amd_abm@abm_gradual +amdgpu/amd_bo@amdgpu_bo_export_import +amdgpu/amd_bo@amdgpu_bo_metadata +amdgpu/amd_bo@amdgpu_bo_map_unmap +amdgpu/amd_bo@amdgpu_memory_alloc +amdgpu/amd_bo@amdgpu_mem_fail_alloc +amdgpu/amd_bo@amdgpu_bo_find_by_cpu_mapping +amdgpu/amd_cp_dma_misc@GTT_to_VRAM-AMDGPU_HW_IP_GFX0 +amdgpu/amd_cp_dma_misc@GTT_to_VRAM-AMDGPU_HW_IP_COMPUTE0 +amdgpu/amd_cp_dma_misc@VRAM_to_GTT-AMDGPU_HW_IP_GFX0 +amdgpu/amd_cp_dma_misc@VRAM_to_GTT-AMDGPU_HW_IP_COMPUTE0 +amdgpu/amd_cp_dma_misc@VRAM_to_VRAM-AMDGPU_HW_IP_GFX0 +amdgpu/amd_cp_dma_misc@VRAM_to_VRAM-AMDGPU_HW_IP_COMPUTE0 +amdgpu/amd_dispatch@amdgpu-dispatch-test-compute-with-IP-COMPUTE +amdgpu/amd_dispatch@amdgpu-dispatch-test-gfx-with-IP-GFX +amdgpu/amd_dispatch@amdgpu-dispatch-hang-test-gfx-with-IP-GFX +amdgpu/amd_dispatch@amdgpu-dispatch-hang-test-compute-with-IP-COMPUTE +amdgpu/amd_dispatch@amdgpu-reset-test-gfx-with-IP-GFX-and-COMPUTE +amdgpu/amd_hotplug@basic +amdgpu/amd_hotplug@basic-suspend +amdgpu/amd_jpeg_dec@amdgpu_cs_jpeg_decode +amdgpu/amd_max_bpc@4k-mode-max-bpc +amdgpu/amd_module_load@reload +amdgpu/amd_plane@test-mpo-4k +amdgpu/amd_plane@mpo-swizzle-toggle +amdgpu/amd_plane@mpo-swizzle-toggle-multihead +amdgpu/amd_plane@mpo-pan-rgb +amdgpu/amd_plane@mpo-pan-rgb-multihead +amdgpu/amd_plane@mpo-pan-nv12 +amdgpu/amd_plane@mpo-pan-nv12-multihead +amdgpu/amd_plane@mpo-pan-p010 +amdgpu/amd_plane@mpo-pan-p010-multihead +amdgpu/amd_plane@mpo-pan-multi-rgb +amdgpu/amd_plane@mpo-pan-multi-nv12 +amdgpu/amd_plane@mpo-pan-multi-p010 +amdgpu/amd_plane@multi-overlay +amdgpu/amd_plane@multi-overlay-invalid +amdgpu/amd_plane@mpo-scale-rgb
Re: [PATCH 02/13] drm: add drm_exec selftests v2
Hi Christian,
It would be nice if you use the KUnit macros, instead of pr_info.
On 5/4/23 08:51, Christian König wrote:
Largely just the initial skeleton.
v2: add array test as well
Signed-off-by: Christian König
---
drivers/gpu/drm/Kconfig | 1 +
drivers/gpu/drm/tests/Makefile| 3 +-
drivers/gpu/drm/tests/drm_exec_test.c | 96 +++
3 files changed, 99 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/tests/drm_exec_test.c
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 2dc81eb062eb..068e574e234e 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -80,6 +80,7 @@ config DRM_KUNIT_TEST
select DRM_BUDDY
select DRM_EXPORT_FOR_TESTS if m
select DRM_KUNIT_TEST_HELPERS
+ select DRM_EXEC
default KUNIT_ALL_TESTS
help
This builds unit tests for DRM. This option is not useful for
diff --git a/drivers/gpu/drm/tests/Makefile b/drivers/gpu/drm/tests/Makefile
index bca726a8f483..ba7baa622675 100644
--- a/drivers/gpu/drm/tests/Makefile
+++ b/drivers/gpu/drm/tests/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_DRM_KUNIT_TEST) += \
drm_modes_test.o \
drm_plane_helper_test.o \
drm_probe_helper_test.o \
- drm_rect_test.o
+ drm_rect_test.o \
+ drm_exec_test.o
CFLAGS_drm_mm_test.o := $(DISABLE_STRUCTLEAK_PLUGIN)
diff --git a/drivers/gpu/drm/tests/drm_exec_test.c
b/drivers/gpu/drm/tests/drm_exec_test.c
new file mode 100644
index ..26aa13e62d22
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_exec_test.c
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#define pr_fmt(fmt) "drm_exec: " fmt
+
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include "../lib/drm_random.h"
+
+static struct drm_device dev;
+
+static void drm_exec_sanitycheck(struct kunit *test)
+{
+ struct drm_exec exec;
+
+ drm_exec_init(, true);
+ drm_exec_fini();
+ pr_info("%s - ok!\n", __func__);
Here you could use KUNIT_SUCCEED(test).
+}
+
+static void drm_exec_lock1(struct kunit *test)
Is there a reason to call the function drm_exec_lock1 instead of
just drm_exec_lock?
+{
+ struct drm_gem_object gobj = { };
+ struct drm_exec exec;
+ int ret;
+
+ drm_gem_private_object_init(, , PAGE_SIZE);
+
+ drm_exec_init(, true);
+ drm_exec_while_not_all_locked() {
+ ret = drm_exec_prepare_obj(, , 1);
+ drm_exec_continue_on_contention();
+ if (ret) {
+ drm_exec_fini();
+ pr_err("%s - err %d!\n", __func__, ret);
Here you could use KUNIT_FAIL. Same for the other function.
Actually, it would be better if you created a function `exit`
associated with the test suite, where you would call drm_exec_fini,
and checked the ret variable with KUNIT_EXPECT_EQ(test, ret, 0) in
the test.
+ return;
+ }
+ }
+ drm_exec_fini();
+ pr_info("%s - ok!\n", __func__);
+}
+
+static void drm_exec_lock_array(struct kunit *test)
+{
+ struct drm_gem_object gobj1 = { };
+ struct drm_gem_object gobj2 = { };
+ struct drm_gem_object *array[] = { , };
+ struct drm_exec exec;
+ int ret;
+
+ drm_gem_private_object_init(, , PAGE_SIZE);
+ drm_gem_private_object_init(, , PAGE_SIZE);
+
+ drm_exec_init(, true);
+ ret = drm_exec_prepare_array(, array, ARRAY_SIZE(array), 0);
+ if (ret) {
+ drm_exec_fini();
+ pr_err("%s - err %d!\n", __func__, ret);
+ return;
+ }
+ drm_exec_fini()> + pr_info("%s - ok!\n", __func__);
+}
+
+static int drm_exec_suite_init(struct kunit_suite *suite)
+{
+ kunit_info(suite, "Testing DRM exec manager\n");
Isn't this already clear by the name of the test?
Best Regards,
- Maíra Canal
+ return 0;
+}
+
+static struct kunit_case drm_exec_tests[] = {
+ KUNIT_CASE(drm_exec_sanitycheck),
+ KUNIT_CASE(drm_exec_lock1),
+ KUNIT_CASE(drm_exec_lock_array),
+ {}
+};
+
+static struct kunit_suite drm_exec_test_suite = {
+ .name = "drm_exec",
+ .suite_init = drm_exec_suite_init,
+ .test_cases = drm_exec_tests,
+};
+
+kunit_test_suite(drm_exec_test_suite);
+
+MODULE_AUTHOR("AMD");
+MODULE_LICENSE("GPL and additional rights");
Re: [PATCH v3 2/3] drm/amdgpu: Remove redundant framebuffer format check
Hi Simon, On 1/13/23 14:06, Simon Ser wrote: Hm, unfortunately I think we need to keep the check in amdgpu for the same reason as i915: amdgpu will pick a modifier if user-space didn't supply one on GFX9+. I wonder if that also applies to vmwgfx? Maybe that would be a reason to have the check in framebuffer_init()? (Not sure!) I tried to move the check to framebuffer_init(), but it ended up causing problems in the i915 driver (the kernel was emitting warnings when running the IGT tests). I was thinking of going back to the drm_gem_fb_create() approach [1], as it would make the other drivers return EINVAL in the case of a bad modifier and it wouldn't change the current behavior of i915 and amdgpu. [1] https://lore.kernel.org/dri-devel/20230103125322.855089-1-mca...@igalia.com/T/ Best Regards, - Maíra Canal
Re: [PATCH v3 2/3] drm/amdgpu: Remove redundant framebuffer format check
On 1/13/23 14:06, Simon Ser wrote: Hm, unfortunately I think we need to keep the check in amdgpu for the same reason as i915: amdgpu will pick a modifier if user-space didn't supply one on GFX9+. I wonder if that also applies to vmwgfx? Maybe that would be a reason to have the check in framebuffer_init()? (Not sure!) Considering that we could then remove the check from i915 and amdgpu if we move the check to framebuffer_init(), I believe that this would be a good reason to perform the check there. I'll send a v4 including the check on framebuffer_init() and removing the check from i915. Thanks for the feedback! Best Regards, - Maíra Canal
[PATCH v3 3/3] drm/vmwgfx: Remove redundant framebuffer format check
Now that framebuffer_check() verifies that the format is properly
supported, there is no need to check it again on vmwgfx's inside
helpers.
Therefore, remove the redundant framebuffer format check from the
vmw_kms_new_framebuffer_surface() and vmw_kms_new_framebuffer_bo()
functions, letting framebuffer_check() perform the framebuffer
validation.
Reviewed-by: Zack Rusin
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 257f090071f1..05b8d8f912bf 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -1317,15 +1317,6 @@ static int vmw_kms_new_framebuffer_surface(struct
vmw_private *dev_priv,
* Sanity checks.
*/
- if (!drm_any_plane_has_format(_priv->drm,
- mode_cmd->pixel_format,
- mode_cmd->modifier[0])) {
- drm_dbg(_priv->drm,
- "unsupported pixel format %p4cc / modifier 0x%llx\n",
- _cmd->pixel_format, mode_cmd->modifier[0]);
- return -EINVAL;
- }
-
/* Surface must be marked as a scanout. */
if (unlikely(!surface->metadata.scanout))
return -EINVAL;
@@ -1648,15 +1639,6 @@ static int vmw_kms_new_framebuffer_bo(struct vmw_private
*dev_priv,
return -EINVAL;
}
- if (!drm_any_plane_has_format(_priv->drm,
- mode_cmd->pixel_format,
- mode_cmd->modifier[0])) {
- drm_dbg(_priv->drm,
- "unsupported pixel format %p4cc / modifier 0x%llx\n",
- _cmd->pixel_format, mode_cmd->modifier[0]);
- return -EINVAL;
- }
-
vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
if (!vfbd) {
ret = -ENOMEM;
--
2.39.0
[PATCH v3 0/3] Check for valid framebuffer's format
This series is a follow-up of the [1] in which I introduced a check for valid formats on drm_gem_fb_create(). During the discussion, I realized that would be a better idea to put the check inside framebuffer_check() so that it wouldn't be needed to hit any driver-specific code path when the check fails. Therefore, add the valid format check inside framebuffer_check() and remove the same check from the drivers, except from i915, because this doesn't work for the legacy tiling->modifier path. Adding the check to framebuffer_check() will guarantee that the igt@kms_addfb_basic@addfb25-bad-modifier IGT test passes, showing the correct behavior of the check. This patchset was tested on amdgpu and vc4 with the IGT tests. [1] https://lore.kernel.org/dri-devel/20230103125322.855089-1-mca...@igalia.com/T/ --- v1 -> v2: https://lore.kernel.org/dri-devel/20230109105807.18172-1-mca...@igalia.com/T/ - Don't remove check from i915 driver (Ville Syrjälä). - Don't unexport drm_any_plane_has_format(). v2 -> v3: https://lore.kernel.org/dri-devel/20230113112743.188486-1-mca...@igalia.com/T/ - Check if r->modifier[0] != 0 (Ville Syrjälä). --- Best Regards, - Maíra Canal Maíra Canal (3): drm/framebuffer: Check for valid formats drm/amdgpu: Remove redundant framebuffer format check drm/vmwgfx: Remove redundant framebuffer format check Documentation/gpu/todo.rst | 9 - drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 10 -- drivers/gpu/drm/drm_framebuffer.c | 8 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 18 -- 4 files changed, 12 insertions(+), 33 deletions(-) -- 2.39.0
[PATCH v3 2/3] drm/amdgpu: Remove redundant framebuffer format check
Now that framebuffer_check() verifies that the format is properly
supported, there is no need to check it again on amdgpu's inside
helpers.
Therefore, remove the redundant framebuffer format check from the
amdgpu_display_gem_fb_verify_and_init() function, letting
framebuffer_check() perform the framebuffer validation.
Reviewed-by: Simon Ser
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index b22471b3bd63..611b7a4b086c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -1120,16 +1120,6 @@ static int amdgpu_display_gem_fb_verify_and_init(struct
drm_device *dev,
rfb->base.obj[0] = obj;
drm_helper_mode_fill_fb_struct(dev, >base, mode_cmd);
- /* Verify that the modifier is supported. */
- if (!drm_any_plane_has_format(dev, mode_cmd->pixel_format,
- mode_cmd->modifier[0])) {
- drm_dbg_kms(dev,
- "unsupported pixel format %p4cc / modifier
0x%llx\n",
- _cmd->pixel_format, mode_cmd->modifier[0]);
-
- ret = -EINVAL;
- goto err;
- }
ret = amdgpu_display_framebuffer_init(dev, rfb, mode_cmd, obj);
if (ret)
--
2.39.0
[PATCH v3 1/3] drm/framebuffer: Check for valid formats
Currently, framebuffer_check() doesn't check if the pixel format is
supported, which can lead to the acceptance of invalid pixel formats
e.g. the acceptance of invalid modifiers. Therefore, add a check for
valid formats on framebuffer_check(), so that the ADDFB2 IOCTL rejects
calls with invalid formats.
Moreover, note that this check is only valid for atomic drivers,
because, for non-atomic drivers, checking drm_any_plane_has_format() is
not possible since the format list for the primary plane is fake, and
we'd therefore reject valid formats.
Reviewed-by: Daniel Vetter
Signed-off-by: Maíra Canal
---
Documentation/gpu/todo.rst| 9 -
drivers/gpu/drm/drm_framebuffer.c | 8
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 1f8a5ebe188e..3a79c26c5cc7 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -276,11 +276,10 @@ Various hold-ups:
- Need to switch to drm_fbdev_generic_setup(), otherwise a lot of the custom fb
setup code can't be deleted.
-- Many drivers wrap drm_gem_fb_create() only to check for valid formats. For
- atomic drivers we could check for valid formats by calling
- drm_plane_check_pixel_format() against all planes, and pass if any plane
- supports the format. For non-atomic that's not possible since like the format
- list for the primary plane is fake and we'd therefor reject valid formats.
+- Need to switch to drm_gem_fb_create(), as now framebuffer_check() checks for
+ valid formats for atomic drivers.
+
+- Add an addfb format validation for non-atomic drivers.
- Many drivers subclass drm_framebuffer, we'd need a embedding compatible
version of the varios drm_gem_fb_create functions. Maybe called
diff --git a/drivers/gpu/drm/drm_framebuffer.c
b/drivers/gpu/drm/drm_framebuffer.c
index aff3746dedfb..0afc9e39188a 100644
--- a/drivers/gpu/drm/drm_framebuffer.c
+++ b/drivers/gpu/drm/drm_framebuffer.c
@@ -280,6 +280,14 @@ static int framebuffer_check(struct drm_device *dev,
}
}
+ /* Verify that the modifier is supported. */
+ if (r->modifier[0] && drm_drv_uses_atomic_modeset(dev) &&
+ !drm_any_plane_has_format(dev, r->pixel_format, r->modifier[0])) {
+ drm_dbg_kms(dev, "Unsupported pixel format %p4cc / modifier
0x%llx\n",
+ >pixel_format, r->modifier[0]);
+ return -EINVAL;
+ }
+
return 0;
}
--
2.39.0
[PATCH v2 3/3] drm/vmwgfx: Remove redundant framebuffer format check
Now that framebuffer_check() verifies that the format is properly
supported, there is no need to check it again on vmwgfx's inside
helpers.
Therefore, remove the redundant framebuffer format check from the
vmw_kms_new_framebuffer_surface() and vmw_kms_new_framebuffer_bo()
functions, letting framebuffer_check() perform the framebuffer
validation.
Reviewed-by: Zack Rusin
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 257f090071f1..05b8d8f912bf 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -1317,15 +1317,6 @@ static int vmw_kms_new_framebuffer_surface(struct
vmw_private *dev_priv,
* Sanity checks.
*/
- if (!drm_any_plane_has_format(_priv->drm,
- mode_cmd->pixel_format,
- mode_cmd->modifier[0])) {
- drm_dbg(_priv->drm,
- "unsupported pixel format %p4cc / modifier 0x%llx\n",
- _cmd->pixel_format, mode_cmd->modifier[0]);
- return -EINVAL;
- }
-
/* Surface must be marked as a scanout. */
if (unlikely(!surface->metadata.scanout))
return -EINVAL;
@@ -1648,15 +1639,6 @@ static int vmw_kms_new_framebuffer_bo(struct vmw_private
*dev_priv,
return -EINVAL;
}
- if (!drm_any_plane_has_format(_priv->drm,
- mode_cmd->pixel_format,
- mode_cmd->modifier[0])) {
- drm_dbg(_priv->drm,
- "unsupported pixel format %p4cc / modifier 0x%llx\n",
- _cmd->pixel_format, mode_cmd->modifier[0]);
- return -EINVAL;
- }
-
vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
if (!vfbd) {
ret = -ENOMEM;
--
2.39.0
[PATCH v2 2/3] drm/amdgpu: Remove redundant framebuffer format check
Now that framebuffer_check() verifies that the format is properly
supported, there is no need to check it again on amdgpu's inside
helpers.
Therefore, remove the redundant framebuffer format check from the
amdgpu_display_gem_fb_verify_and_init() function, letting
framebuffer_check() perform the framebuffer validation.
Reviewed-by: Simon Ser
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index b22471b3bd63..611b7a4b086c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -1120,16 +1120,6 @@ static int amdgpu_display_gem_fb_verify_and_init(struct
drm_device *dev,
rfb->base.obj[0] = obj;
drm_helper_mode_fill_fb_struct(dev, >base, mode_cmd);
- /* Verify that the modifier is supported. */
- if (!drm_any_plane_has_format(dev, mode_cmd->pixel_format,
- mode_cmd->modifier[0])) {
- drm_dbg_kms(dev,
- "unsupported pixel format %p4cc / modifier
0x%llx\n",
- _cmd->pixel_format, mode_cmd->modifier[0]);
-
- ret = -EINVAL;
- goto err;
- }
ret = amdgpu_display_framebuffer_init(dev, rfb, mode_cmd, obj);
if (ret)
--
2.39.0
[PATCH v2 1/3] drm/framebuffer: Check for valid formats
Currently, framebuffer_check() doesn't check if the pixel format is
supported, which can lead to the acceptance of invalid pixel formats
e.g. the acceptance of invalid modifiers. Therefore, add a check for
valid formats on framebuffer_check(), so that the ADDFB2 IOCTL rejects
calls with invalid formats.
Moreover, note that this check is only valid for atomic drivers,
because, for non-atomic drivers, checking drm_any_plane_has_format() is
not possible since the format list for the primary plane is fake, and
we'd therefore reject valid formats.
Reviewed-by: Daniel Vetter
Signed-off-by: Maíra Canal
---
Documentation/gpu/todo.rst| 9 -
drivers/gpu/drm/drm_framebuffer.c | 8
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 1f8a5ebe188e..3a79c26c5cc7 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -276,11 +276,10 @@ Various hold-ups:
- Need to switch to drm_fbdev_generic_setup(), otherwise a lot of the custom fb
setup code can't be deleted.
-- Many drivers wrap drm_gem_fb_create() only to check for valid formats. For
- atomic drivers we could check for valid formats by calling
- drm_plane_check_pixel_format() against all planes, and pass if any plane
- supports the format. For non-atomic that's not possible since like the format
- list for the primary plane is fake and we'd therefor reject valid formats.
+- Need to switch to drm_gem_fb_create(), as now framebuffer_check() checks for
+ valid formats for atomic drivers.
+
+- Add an addfb format validation for non-atomic drivers.
- Many drivers subclass drm_framebuffer, we'd need a embedding compatible
version of the varios drm_gem_fb_create functions. Maybe called
diff --git a/drivers/gpu/drm/drm_framebuffer.c
b/drivers/gpu/drm/drm_framebuffer.c
index aff3746dedfb..605642bf3650 100644
--- a/drivers/gpu/drm/drm_framebuffer.c
+++ b/drivers/gpu/drm/drm_framebuffer.c
@@ -280,6 +280,14 @@ static int framebuffer_check(struct drm_device *dev,
}
}
+ /* Verify that the modifier is supported. */
+ if (drm_drv_uses_atomic_modeset(dev) &&
+ !drm_any_plane_has_format(dev, r->pixel_format, r->modifier[0])) {
+ drm_dbg_kms(dev, "Unsupported pixel format %p4cc / modifier
0x%llx\n",
+ >pixel_format, r->modifier[0]);
+ return -EINVAL;
+ }
+
return 0;
}
--
2.39.0
[PATCH v2 0/3] Check for valid framebuffer's format
This series is a follow-up of the [1] in which I introduced a check for valid formats on drm_gem_fb_create(). During the discussion, I realized that would be a better idea to put the check inside framebuffer_check() so that it wouldn't be needed to hit any driver-specific code path when the check fails. Therefore, add the valid format check inside framebuffer_check() and remove the same check from the drivers, except from i915, because this doesn't work for the legacy tiling->modifier path. Adding the check to framebuffer_check() will guarantee that the igt@kms_addfb_basic@addfb25-bad-modifier IGT test passes, showing the correct behavior of the check. This patchset was tested on amdgpu and vc4 with the IGT tests. [1] https://lore.kernel.org/dri-devel/20230103125322.855089-1-mca...@igalia.com/T/ --- v1 -> v2: https://lore.kernel.org/dri-devel/20230109105807.18172-1-mca...@igalia.com/T/ - Don't remove check from i915 driver (Ville Syrjälä) - Don't unexport drm_any_plane_has_format(). --- Best Regards, - Maíra Canal Maíra Canal (3): drm/framebuffer: Check for valid formats drm/amdgpu: Remove redundant framebuffer format check drm/vmwgfx: Remove redundant framebuffer format check Documentation/gpu/todo.rst | 9 - drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 10 -- drivers/gpu/drm/drm_framebuffer.c | 8 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 18 -- 4 files changed, 12 insertions(+), 33 deletions(-) -- 2.39.0
Re: [PATCH] drm/amd/display: remove redundant CalculateRemoteSurfaceFlipDelay's
Hi Tom
On 9/19/22 14:27, Tom Rix wrote:
> There are several copies of CalculateRemoteSurfaceFlipDelay.
> Reduce to one instance.
>
> Signed-off-by: Tom Rix
Reviewed-by: Maíra Canal
Just a minor comment below.
> ---
> .../dc/dml/dcn20/display_mode_vba_20.c| 4 +-
> .../dc/dml/dcn20/display_mode_vba_20v2.c | 40 +--
> .../dc/dml/dcn21/display_mode_vba_21.c| 40 +--
> 3 files changed, 4 insertions(+), 80 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> index 4ca080950924..8e5d58336bc5 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> @@ -158,7 +158,7 @@ double CalculateTWait(
> double DRAMClockChangeLatency,
> double UrgentLatency,
> double SREnterPlusExitTime);
> -static double CalculateRemoteSurfaceFlipDelay(
> +double CalculateRemoteSurfaceFlipDelay(
> struct display_mode_lib *mode_lib,
> double VRatio,
> double SwathWidth,
> @@ -2909,7 +2909,7 @@ double CalculateTWait(
> }
> }
>
> -static double CalculateRemoteSurfaceFlipDelay(
> +double CalculateRemoteSurfaceFlipDelay(
I guess it would be more clear if this function was placed on the
display_mode_vba20.h and named dml20_CalculateRemoteSurfaceFlipDelay.
Then, it would be clearer that this function is shared over the DCN20s.
Best Regards,
- Maíra Canal
> struct display_mode_lib *mode_lib,
> double VRatio,
> double SwathWidth,
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> index 2b4dcae4e432..e9ebc81adc71 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> @@ -182,7 +182,7 @@ double CalculateTWait(
> double DRAMClockChangeLatency,
> double UrgentLatency,
> double SREnterPlusExitTime);
> -static double CalculateRemoteSurfaceFlipDelay(
> +double CalculateRemoteSurfaceFlipDelay(
> struct display_mode_lib *mode_lib,
> double VRatio,
> double SwathWidth,
> @@ -2967,44 +2967,6 @@ static void dml20v2_DisplayPipeConfiguration(struct
> display_mode_lib *mode_lib)
> }
> }
>
> -static double CalculateRemoteSurfaceFlipDelay(
> - struct display_mode_lib *mode_lib,
> - double VRatio,
> - double SwathWidth,
> - double Bpp,
> - double LineTime,
> - double XFCTSlvVupdateOffset,
> - double XFCTSlvVupdateWidth,
> - double XFCTSlvVreadyOffset,
> - double XFCXBUFLatencyTolerance,
> - double XFCFillBWOverhead,
> - double XFCSlvChunkSize,
> - double XFCBusTransportTime,
> - double TCalc,
> - double TWait,
> - double *SrcActiveDrainRate,
> - double *TInitXFill,
> - double *TslvChk)
> -{
> - double TSlvSetup, AvgfillRate, result;
> -
> - *SrcActiveDrainRate = VRatio * SwathWidth * Bpp / LineTime;
> - TSlvSetup = XFCTSlvVupdateOffset + XFCTSlvVupdateWidth +
> XFCTSlvVreadyOffset;
> - *TInitXFill = XFCXBUFLatencyTolerance / (1 + XFCFillBWOverhead / 100);
> - AvgfillRate = *SrcActiveDrainRate * (1 + XFCFillBWOverhead / 100);
> - *TslvChk = XFCSlvChunkSize / AvgfillRate;
> - dml_print(
> - "DML::CalculateRemoteSurfaceFlipDelay:
> SrcActiveDrainRate: %f\n",
> - *SrcActiveDrainRate);
> - dml_print("DML::CalculateRemoteSurfaceFlipDelay: TSlvSetup: %f\n",
> TSlvSetup);
> - dml_print("DML::CalculateRemoteSurfaceFlipDelay: TInitXFill: %f\n",
> *TInitXFill);
> - dml_print("DML::CalculateRemoteSurfaceFlipDelay: AvgfillRate: %f\n",
> AvgfillRate);
> - dml_print("DML::CalculateRemoteSurfaceFlipDelay: TslvChk: %f\n",
> *TslvChk);
> - result = 2 * XFCBusTransportTime + TSlvSetup + TCalc + TWait + *TslvChk
> + *TInitXFill; // TODO: This doesn't seem to match programming guide
> - dml_print("DML::CalculateRemoteSurfaceFlipDelay:
> RemoteSurfaceFlipDelay: %f\n", result);
> - return result;
> -}
> -
> static void CalculateActiveRowBandwidth(
> bool GPUVMEnable,
> enum source_format_class SourcePixelFor
Re: [PATCH] drm/amd/display: remove redundant CalculateTWait's
Hi Tom,
On 9/18/22 23:37, Tom Rix wrote:
> There are several copies of CalculateTwait.
> Reduce to one instance and change local variable name to match common usage.
>
> Signed-off-by: Tom Rix
Reviewed-by: Maíra Canal
Although, it would be nice to put this function on the
display_mode_vba.h file, as all DCNs use this function.
Best Regards,
- Maíra Canal
> ---
> .../dc/dml/dcn20/display_mode_vba_20.c| 16 +++---
> .../dc/dml/dcn20/display_mode_vba_20v2.c | 21 ++-
> .../dc/dml/dcn21/display_mode_vba_21.c| 19 +
> .../dc/dml/dcn30/display_mode_vba_30.c| 18 +---
> .../dc/dml/dcn31/display_mode_vba_31.c| 13 +---
> .../dc/dml/dcn314/display_mode_vba_314.c | 13 +---
> 6 files changed, 14 insertions(+), 86 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> index 6e9d7e2b5243..4ca080950924 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
> @@ -153,10 +153,10 @@ static unsigned int CalculateVMAndRowBytes(
> bool *PTEBufferSizeNotExceeded,
> unsigned int *dpte_row_height,
> unsigned int *meta_row_height);
> -static double CalculateTWait(
> +double CalculateTWait(
> unsigned int PrefetchMode,
> double DRAMClockChangeLatency,
> - double UrgentLatencyPixelDataOnly,
> + double UrgentLatency,
> double SREnterPlusExitTime);
> static double CalculateRemoteSurfaceFlipDelay(
> struct display_mode_lib *mode_lib,
> @@ -2892,20 +2892,20 @@ static void dml20_DisplayPipeConfiguration(struct
> display_mode_lib *mode_lib)
> }
> }
>
> -static double CalculateTWait(
> +double CalculateTWait(
> unsigned int PrefetchMode,
> double DRAMClockChangeLatency,
> - double UrgentLatencyPixelDataOnly,
> + double UrgentLatency,
> double SREnterPlusExitTime)
> {
> if (PrefetchMode == 0) {
> return dml_max(
> - DRAMClockChangeLatency +
> UrgentLatencyPixelDataOnly,
> - dml_max(SREnterPlusExitTime,
> UrgentLatencyPixelDataOnly));
> + DRAMClockChangeLatency + UrgentLatency,
> + dml_max(SREnterPlusExitTime, UrgentLatency));
> } else if (PrefetchMode == 1) {
> - return dml_max(SREnterPlusExitTime, UrgentLatencyPixelDataOnly);
> + return dml_max(SREnterPlusExitTime, UrgentLatency);
> } else {
> - return UrgentLatencyPixelDataOnly;
> + return UrgentLatency;
> }
> }
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> index b02dda8ce70f..2b4dcae4e432 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
> @@ -177,10 +177,10 @@ static unsigned int CalculateVMAndRowBytes(
> bool *PTEBufferSizeNotExceeded,
> unsigned int *dpte_row_height,
> unsigned int *meta_row_height);
> -static double CalculateTWait(
> +double CalculateTWait(
> unsigned int PrefetchMode,
> double DRAMClockChangeLatency,
> - double UrgentLatencyPixelDataOnly,
> + double UrgentLatency,
> double SREnterPlusExitTime);
> static double CalculateRemoteSurfaceFlipDelay(
> struct display_mode_lib *mode_lib,
> @@ -2967,23 +2967,6 @@ static void dml20v2_DisplayPipeConfiguration(struct
> display_mode_lib *mode_lib)
> }
> }
>
> -static double CalculateTWait(
> - unsigned int PrefetchMode,
> - double DRAMClockChangeLatency,
> - double UrgentLatencyPixelDataOnly,
> - double SREnterPlusExitTime)
> -{
> - if (PrefetchMode == 0) {
> - return dml_max(
> - DRAMClockChangeLatency +
> UrgentLatencyPixelDataOnly,
> - dml_max(SREnterPlusExitTime,
> UrgentLatencyPixelDataOnly));
> - } else if (PrefetchMode == 1) {
> - return dml_max(SREnterPlusExitTime, UrgentLatencyPixelDataOnly);
> - } else {
> - return UrgentLatencyPixelDataOnly;
> - }
> -}
> -
> static double CalculateRemoteSurfaceFlipDelay(
Re: [PATCH] drm/amd/display: refactor CalculateWriteBackDelay to use vba_vars_st ptr
m]) /
> mode_lib->vba.RequiredDISPCLK[i][j]);
> }
> }
> }
> diff --git
> a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
> index 5b5b94f1024d..a08de0dc080f 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
> @@ -2856,36 +2856,6 @@ void dml32_CalculateDCFCLKDeepSleep(
> #endif
> } // CalculateDCFCLKDeepSleep
>
> -double dml32_CalculateWriteBackDelay(
> - enum source_format_class WritebackPixelFormat,
> - double WritebackHRatio,
> - double WritebackVRatio,
> - unsigned int WritebackVTaps,
> - unsigned int WritebackDestinationWidth,
> - unsigned int WritebackDestinationHeight,
> - unsigned int WritebackSourceHeight,
> - unsigned int HTotal)
> -{
> - double CalculateWriteBackDelay;
> - double Line_length;
> - double Output_lines_last_notclamped;
> - double WritebackVInit;
> -
> - WritebackVInit = (WritebackVRatio + WritebackVTaps + 1) / 2;
> - Line_length = dml_max((double) WritebackDestinationWidth,
> - dml_ceil((double)WritebackDestinationWidth / 6.0, 1.0)
> * WritebackVTaps);
> - Output_lines_last_notclamped = WritebackDestinationHeight - 1 -
> - dml_ceil(((double)WritebackSourceHeight -
> - (double) WritebackVInit) /
> (double)WritebackVRatio, 1.0);
The CalculateWriteBackDelay from the DCN30 states:
Output_lines_last_notclamped = WritebackDestinationHeight - 1 -
dml_ceil((WritebackSourceHeight -
WritebackVInit) / WritebackVRatio, 1);
I'm not sure if the behavior on the DCN32 will stay the same without the
casting to double. Maybe AMD engineers will know better, but I would
check if the behavior of the function stays the same. Moreover, on
DCN30, WritebackDestinationWidth, WritebackDestinationHeight, and
WritebackSourceHeight are long, and here they are unsigned int. Again,
I'm not sure how much this can affect the boundary cases, just something
to check.
Best Regards,
- Maíra Canal
> - if (Output_lines_last_notclamped < 0) {
> - CalculateWriteBackDelay = 0;
> - } else {
> - CalculateWriteBackDelay = Output_lines_last_notclamped *
> Line_length +
> - (HTotal - WritebackDestinationWidth) + 80;
> - }
> - return CalculateWriteBackDelay;
> -}
> -
> void dml32_UseMinimumDCFCLK(
> enum dm_use_mall_for_pstate_change_mode
> UseMALLForPStateChange[],
> bool DRRDisplay[],
> diff --git
> a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
> b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
> index 3dbc9cf46aad..017acfe5af2f 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
> @@ -571,15 +571,7 @@ void dml32_CalculateDCFCLKDeepSleep(
> /* Output */
> double *DCFClkDeepSleep);
>
> -double dml32_CalculateWriteBackDelay(
> - enum source_format_class WritebackPixelFormat,
> - double WritebackHRatio,
> - double WritebackVRatio,
> - unsigned int WritebackVTaps,
> - unsigned int WritebackDestinationWidth,
> - unsigned int WritebackDestinationHeight,
> - unsigned int WritebackSourceHeight,
> - unsigned int HTotal);
> +double dml30_CalculateWriteBackDelay(struct vba_vars_st *vba, unsigned int
> i, unsigned int HTotal);
>
> void dml32_UseMinimumDCFCLK(
> enum dm_use_mall_for_pstate_change_mode
> UseMALLForPStateChange[],
Re: [PATCH 1/2] drm/amd/display: Reduce number of arguments of dml314's CalculateWatermarksAndDRAMSpeedChangeSupport()
Hi Nathan,
On 9/16/22 18:06, Nathan Chancellor wrote:
> Most of the arguments are identical between the two call sites and they
> can be accessed through the 'struct vba_vars_st' pointer. This reduces
> the total amount of stack space that
> dml314_ModeSupportAndSystemConfigurationFull() uses by 240 bytes with
> LLVM 16 (2216 -> 1976), helping clear up the following clang warning:
>
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.c:4020:6:
> error: stack frame size (2216) exceeds limit (2048) in
> 'dml314_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
> void dml314_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
> *mode_lib)
>^
> 1 error generated.
>
> Link: https://github.com/ClangBuiltLinux/linux/issues/1710
> Reported-by: "kernelci.org bot"
> Signed-off-by: Nathan Chancellor
I have built-tested the whole series with clang 14.0.5 (Fedora
14.0.5-1.fc36), using:
$ make -kj"$(nproc)" ARCH=x86_64 LLVM=1 mrproper allmodconfig
drivers/gpu/drm/amd/amdgpu/
Another great patch to the DML! As Tom, I also would like to see this
expand to all display_mode_vba files, but so far this is great to
unbreak the build.
To the whole series:
Tested-by: Maíra Canal
Best Regards,
- Maíra Canal
> ---
>
> This is just commit ab2ac59c32db ("drm/amd/display: Reduce number of
> arguments of dml31's CalculateWatermarksAndDRAMSpeedChangeSupport()")
> applied to dml314.
>
> .../dc/dml/dcn314/display_mode_vba_314.c | 248 --
> 1 file changed, 52 insertions(+), 196 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
> index 2829f179f982..32ceb72f7a14 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
> @@ -325,64 +325,28 @@ static void
> CalculateVupdateAndDynamicMetadataParameters(
> static void CalculateWatermarksAndDRAMSpeedChangeSupport(
> struct display_mode_lib *mode_lib,
> unsigned int PrefetchMode,
> - unsigned int NumberOfActivePlanes,
> - unsigned int MaxLineBufferLines,
> - unsigned int LineBufferSize,
> - unsigned int WritebackInterfaceBufferSize,
> double DCFCLK,
> double ReturnBW,
> - bool SynchronizedVBlank,
> - unsigned int dpte_group_bytes[],
> - unsigned int MetaChunkSize,
> double UrgentLatency,
> double ExtraLatency,
> - double WritebackLatency,
> - double WritebackChunkSize,
> double SOCCLK,
> - double DRAMClockChangeLatency,
> - double SRExitTime,
> - double SREnterPlusExitTime,
> - double SRExitZ8Time,
> - double SREnterPlusExitZ8Time,
> double DCFCLKDeepSleep,
> unsigned int DETBufferSizeY[],
> unsigned int DETBufferSizeC[],
> unsigned int SwathHeightY[],
> unsigned int SwathHeightC[],
> - unsigned int LBBitPerPixel[],
> double SwathWidthY[],
> double SwathWidthC[],
> - double HRatio[],
> - double HRatioChroma[],
> - unsigned int vtaps[],
> - unsigned int VTAPsChroma[],
> - double VRatio[],
> - double VRatioChroma[],
> - unsigned int HTotal[],
> - double PixelClock[],
> - unsigned int BlendingAndTiming[],
> unsigned int DPPPerPlane[],
> double BytePerPixelDETY[],
> double BytePerPixelDETC[],
> - double DSTXAfterScaler[],
> - double DSTYAfterScaler[],
> - bool WritebackEnable[],
> - enum source_format_class WritebackPixelFormat[],
> - double WritebackDestinationWidth[],
> - double WritebackDestinationHeight[],
> - double WritebackSourceHeight[],
> bool UnboundedRequestEnabled,
> unsigned int CompressedBufferSizeInkByte,
> enum clock_change_support *DRAMClockChangeSupport,
> - double *UrgentWatermark,
> - double *WritebackUrgentWatermark,
> - double *DRAMClockChangeWatermark,
> - double *WritebackDRAMClockChangeWatermark,
> double *StutterExitWatermark,
> double *StutterEnterPlusExitWatermark,
> double *Z8StutterExitWatermark,
>
[PATCH v3 8/8] Documentation/gpu: Add Display Core Unit Test documentation
Explain how to run the KUnit tests present in the AMDGPU's Display Core and clarify which architectures and tools can be used to run the tests. Moreover, explains how to add new tests to the existing tests. Signed-off-by: Maíra Canal --- .../gpu/amdgpu/display/display-test.rst | 88 +++ Documentation/gpu/amdgpu/display/index.rst| 1 + 2 files changed, 89 insertions(+) create mode 100644 Documentation/gpu/amdgpu/display/display-test.rst diff --git a/Documentation/gpu/amdgpu/display/display-test.rst b/Documentation/gpu/amdgpu/display/display-test.rst new file mode 100644 index ..a8c136ce87b7 --- /dev/null +++ b/Documentation/gpu/amdgpu/display/display-test.rst @@ -0,0 +1,88 @@ +.. SPDX-License-Identifier: GPL-2.0+ + + +Display Core Unit Tests + + +Display core provides a set of unit tests, currently focused on the Display Mode +Library. The unit tests use KUnit (Kernel Unit Testing Framework), a common +framework for unit tests within the Linux Kernel. + +This section covers the specifics of the tests for the AMDGPU driver. For general +information about KUnit, please refer to Documentation/dev-tools/kunit/start.rst. + +How to run the tests? += + +In order to facilitate running the test suite, a configuration file is present +in ``drivers/gpu/drm/amd/display/tests/dc/.kunitconfig``. This configuration file +can be used to run the kunit_tool, a Python script (``tools/testing/kunit/kunit.py``) +used to configure, build, exec, parse and run tests. + +.. code-block:: bash + + $ ./tools/testing/kunit/kunit.py run --arch=x86_64 \ + --kunitconfig=drivers/gpu/drm/amd/display/tests + +Currently, the Display Core Unit Tests are only supported on x86_64. + +Moreover, the tests can also be run on real hardware or in other emulation +environments. To include the Display Core Unit Tests on a deployable kernel, +you might add the following config options to your ``.config``: + +.. code-block:: none + + CONFIG_KUNIT=y + CONFIG_AMDGPU=m + CONFIG_AMD_DC_BASICS_KUNIT_TEST=y + CONFIG_AMD_DC_KUNIT_TEST=y + CONFIG_DCE_KUNIT_TEST=y + CONFIG_DML_KUNIT_TEST=y + +Once the kernel is built and installed, you can load the ``amdgpu`` module +to run all tests available. + +Also, the tests can be added to the kernel as built-in modules, by adding the +following config options to your ``.config``: + +.. code-block:: none + + CONFIG_KUNIT=y + CONFIG_AMDGPU=y + CONFIG_AMD_DC_BASICS_KUNIT_TEST=y + CONFIG_AMD_DC_KUNIT_TEST=y + CONFIG_DCE_KUNIT_TEST=y + CONFIG_DML_KUNIT_TEST=y + +In order to run specific tests, you can check the filter options from KUnit on +Documentation/dev-tools/kunit/kunit-tool.rst. + +How to add new tests? += + +Tests covering different parts of the Display Core are always welcomed. Adding +a new test is a simple procedure, that consists in creating a unit test file +and adding the following guard to the end of the tested file when you are +testing static functions: + +.. code-block:: c + + #ifdef CONFIG_MY_KUNIT_TEST + #include "my_kunit_test.c" + #endif + +If you are not testing static functions, you should use the Makefile placed on +``display/tests``. In order to add a test to the Makefile, you can just add +the following entry to the Makefile: + +.. code-block:: make + + ifdef CONFIG_MY_KUNIT_TEST + DC_TESTS += my_kunit_test.o + endif + +The ``display/tests`` folder replicates the folder hierarchy of the ``display`` +folder, so this must be considered while adding new tests. + +More information on how to write unit tests with the KUnit API can be provided +on Documentation/dev-tools/kunit/api/test.rst. diff --git a/Documentation/gpu/amdgpu/display/index.rst b/Documentation/gpu/amdgpu/display/index.rst index f8a4f53d70d8..9b13f0f3524f 100644 --- a/Documentation/gpu/amdgpu/display/index.rst +++ b/Documentation/gpu/amdgpu/display/index.rst @@ -29,4 +29,5 @@ table of content: dc-debug.rst dcn-overview.rst mpo-overview.rst + display-test.rst dc-glossary.rst -- 2.37.3
[PATCH v3 7/8] drm/amd/display: Introduce KUnit tests to dc_dmub_srv library
Add unit test to the SubVP feature in order to avoid possible
regressions and assure the code robustness.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 13 +
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 4 +
.../gpu/drm/amd/display/tests/.kunitconfig| 1 +
.../amd/display/tests/dc/dc_dmub_srv_test.c | 285 ++
4 files changed, 303 insertions(+)
create mode 100644 drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 039227baedfa..f667b954f89f 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -93,4 +93,17 @@ config AMD_DC_BASICS_KUNIT_TEST
If unsure, say N.
+config AMD_DC_KUNIT_TEST
+ bool "Enable KUnit tests for the 'utils' sub-component of DAL" if
!KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the basics folder of Display Core. Only
useful for
+ kernel devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
+
endmenu
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 7b765efe0825..2e8d5549a087 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -858,3 +858,7 @@ void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv
*dc_dmub_srv)
diag_data.is_cw0_enabled,
diag_data.is_cw6_enabled);
}
+
+#if IS_ENABLED(CONFIG_AMD_DC_KUNIT_TEST)
+#include "../tests/dc/dc_dmub_srv_test.c"
+#endif
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
index eb6f81601757..4c5861ad58bd 100644
--- a/drivers/gpu/drm/amd/display/tests/.kunitconfig
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -4,5 +4,6 @@ CONFIG_DRM=y
CONFIG_DRM_AMDGPU=y
CONFIG_DRM_AMD_DC=y
CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
+CONFIG_AMD_DC_KUNIT_TEST=y
CONFIG_DCE_KUNIT_TEST=y
CONFIG_DML_KUNIT_TEST=y
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
new file mode 100644
index ..3f1f15397090
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
@@ -0,0 +1,285 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dc_dmub_srv.c
+ *
+ * Copyright (C) 2022, Maíra Canal
+ */
+
+#include
+#include "dc_dmub_srv.h"
+
+struct populate_subvp_cmd_drr_info_test_case {
+ const char *desc;
+ struct dc *dc;
+ struct pipe_ctx *subvp_pipe;
+ struct pipe_ctx *vblank_pipe;
+ const u8 drr_in_use;
+ const u8 drr_window_size_ms;
+ const u16 min_vtotal_supported;
+ const u16 max_vtotal_supported;
+ const u8 use_ramping;
+};
+
+struct populate_subvp_cmd_drr_info_test_case
populate_subvp_cmd_drr_info_cases[] = {
+ {
+ .desc = "Same Clock Frequency",
+ .dc = &(struct dc) {
+ .caps = {
+ .subvp_prefetch_end_to_mall_start_us = 0,
+ }
+ },
+ .subvp_pipe = &(struct pipe_ctx) {
+ .stream = &(struct dc_stream_state) {
+ .timing = {
+ .h_total = 2784,
+ .v_addressable = 1080,
+ .pix_clk_100hz = 1855800,
+ },
+ .mall_stream_config = {
+ .paired_stream = &(struct
dc_stream_state) {
+ .timing = {
+ .h_total = 3600,
+ .v_total = ,
+ .v_addressable = 1080,
+ .v_front_porch = 3,
+ .pix_clk_100hz =
1855800,
+ },
+ },
+ },
+ },
+ },
+ .vblank_pipe = &(struct pipe_ctx) {
+ .stream = &(struct dc_stream_state) {
+ .timing = {
+ .h_total = 2784,
+ .v_total = ,
+ .v_addressable
[PATCH v3 6/8] drm/amd/display: Introduce KUnit tests for dcn20_fpu
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 3 +-
.../tests/dc/dml/dcn20/dcn20_fpu_test.c | 561 ++
2 files changed, 563 insertions(+), 1 deletion(-)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
diff --git a/drivers/gpu/drm/amd/display/tests/Makefile
b/drivers/gpu/drm/amd/display/tests/Makefile
index cc1e9edd38c3..a34677808e48 100644
--- a/drivers/gpu/drm/amd/display/tests/Makefile
+++ b/drivers/gpu/drm/amd/display/tests/Makefile
@@ -9,7 +9,8 @@ endif
ifdef CONFIG_DML_KUNIT_TEST
CFLAGS_$(AMDDALPATH)/tests/dc/dml/display_mode_vba_test.o :=
$(dml_ccflags)
- DC_TESTS += dc/dml/display_mode_vba_test.o
+ CFLAGS_$(AMDDALPATH)/tests/dc/dml/dcn20/dcn20_fpu_test.o :=
$(dml_ccflags)
+ DC_TESTS += dc/dml/display_mode_vba_test.o dc/dml/dcn20/dcn20_fpu_test.o
endif
AMD_DAL_DC_TESTS = $(addprefix $(AMDDALPATH)/tests/,$(DC_TESTS))
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
new file mode 100644
index ..6b7ebb78fec9
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
@@ -0,0 +1,561 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/dcn20/dcn20_fpu.h
+ *
+ * Copyright (C) 2022, Magali Lemes
+ */
+
+#include
+
+#include "dc/inc/resource.h"
+#include "dc/inc/hw/clk_mgr.h"
+#include "dc/dcn21/dcn21_resource.h"
+
+#include "dml/dcn20/dcn20_fpu.h"
+
+/**
+ * DOC: Unit tests for AMDGPU DML dcn20/dcn20_fpu.h
+ */
+
+struct dcn20_cap_soc_clocks_test_case {
+ const char *desc;
+ struct _vcs_dpi_soc_bounding_box_st bb;
+ struct pp_smu_nv_clock_table max_clocks;
+ const int clock_states;
+ const struct _vcs_dpi_voltage_scaling_st
expected_clock_limits[DC__VOLTAGE_STATES];
+};
+
+struct dcn21_update_bw_bounding_box_test_case {
+ const char *desc;
+ struct dc dc;
+ struct clk_bw_params bw_params;
+ const int clocks_to_compare;
+ const struct _vcs_dpi_voltage_scaling_st
expected_clock_limits[DC__VOLTAGE_STATES];
+};
+
+struct dcn20_cap_soc_clocks_test_case dcn20_cap_soc_clocks_test_cases[] = {
+ {
+ .desc = "4-state bounding box clock limits ",
+ .bb = {
+ .clock_limits = {
+ {
+ .dcfclk_mhz = 506.0,
+ .fabricclk_mhz = 506.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 400.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 506.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 1600.0,
+ },
+ {
+ .dcfclk_mhz = 540.0,
+ .fabricclk_mhz = 540.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 540.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 8000.0,
+ },
+ {
+ .dcfclk_mhz = 675.0,
+ .fabricclk_mhz = 675.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 675.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 1.0,
+ },
+ {
+ .dcfclk_mhz = 1265.0,
+ .fabricclk_mhz = 1266.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 1266.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 15000.0,
+ },
+ },
+ .num_states = 4,
+ },
+ .max
[PATCH v3 5/8] drm/amd/display: Introduce KUnit to dcn20/display_mode_vba_20 library
The display_mode_vba_20 deals with hundreds of display parameters for
the DCN20 and sometimes does it in odd ways. The addition of unit tests
intends to assure the quality of the code delivered by HW engineers and,
also make it possible to refactor the code decreasing concerns about adding
bugs to the codebase.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn20/display_mode_vba_20.c| 4 +
.../dc/dml/dcn20/display_mode_vba_20_test.c | 888 ++
2 files changed, 892 insertions(+)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d3b5b6fedf04..738d8c1f5def 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -5112,3 +5112,7 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
locals->OutputBppPerState[mode_lib->vba.VoltageLevel][k];
}
}
+
+#if IS_ENABLED(CONFIG_DML_KUNIT_TEST)
+#include "../../tests/dc/dml/dcn20/display_mode_vba_20_test.c"
+#endif
diff --git
a/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
new file mode 100644
index ..eeeacc2758a3
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
@@ -0,0 +1,888 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/dcn20/display_mode_vba_20.c
+ *
+ * Copyright (C) 2022, Maíra Canal
+ */
+
+#include
+#include "dml/display_mode_enums.h"
+
+struct calculate_write_back_delay_test_case {
+ const char *desc;
+ const enum source_format_class writeback_pixel_format;
+ const double writeback_HRatio;
+ const double writeback_VRatio;
+ const unsigned int writeback_luma_HTaps;
+ const unsigned int writeback_luma_VTaps;
+ const unsigned int writeback_chroma_HTaps;
+ const unsigned int writeback_chroma_VTaps;
+ const unsigned int writeback_destination_width;
+ const double calculate_write_back_delay;
+};
+
+struct calculate_active_row_bandwidth_test_case {
+ const char *desc;
+ const bool GPUVM_enable;
+ const enum source_format_class source_pixel_format;
+ const double VRatio;
+ const bool DCC_enable;
+ const double line_time;
+ const unsigned int meta_row_byte_luma;
+ const unsigned int meta_row_byte_chroma;
+ const unsigned int meta_row_height_luma;
+ const unsigned int meta_row_height_chroma;
+ const unsigned int pixel_PTE_bytes_per_row_luma;
+ const unsigned int pixel_PTE_bytes_per_row_chroma;
+ const unsigned int dpte_row_height_luma;
+ const unsigned int dpte_row_height_chroma;
+ const double meta_row_bw;
+ const double dpte_row_bw;
+ const double qual_row_bw;
+};
+
+/**
+ * dscce_compute_delay_test - KUnit test for dscceComputeDelay
+ * @test: represents a running instance of a test.
+ */
+static void dscce_compute_delay_test(struct kunit *test)
+{
+ /* Testing all the valid values for bits per color (bpc): {8, 10, 12} */
+ /* Testing all the valid values for number of slices: {1, 2, 3, 4} */
+
+ /*
+* For 4:4:4 encoding, the minimum bpp value is 8 and is incremented by
+* 1/16 of a bit. Moreover, the sliceWidth must be less than or equal to
+* 5184/numSlices.
+*/
+
+ /* Minimum sliceWidth value on 4:4:4 encoding */
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 8.0, 1, 1, dm_444), 2004);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 8.0625, 5184, 1, dm_444),
885);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 8.125, 2592, 2, dm_444),
3495);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 8.1875, 1728, 3, dm_444),
4356);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 8.25, 864, 3, dm_444),
4425);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 8.3125, 1296, 4, dm_444),
4854);
+
+ /*
+* For 4:2:0 encoding, the minimum bpp value is 6 and is incremented by
+* 1/16 of a bit. Moreover, the sliceWidth must be less than or equal to
+* 4096/numSlices.
+*/
+
+ /* Minimum sliceWidth value on 4:2:0 encoding */
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 6.0, 2, 1, dm_420), 2982);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 6.0625, 4096, 1, dm_420),
1428);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 6.125, 2048, 2, dm_420),
3522);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 6.1875, 1365, 3, dm_420),
4200);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 6.25, 682, 3, dm_420),
5706);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 6.312
[PATCH v3 4/8] drm/amd/display: Introduce KUnit tests to the display_mode_vba library
The display_mode_vba library deals with hundreds of display parameters
and sometimes does it in odd ways. The addition of unit tests intends to
assure the quality of the code delivered by HW engineers and, also make
it possible to refactor the code decreasing concerns about adding bugs
to the codebase.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 5 +
.../tests/dc/dml/display_mode_vba_test.c | 741 ++
2 files changed, 746 insertions(+)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
diff --git a/drivers/gpu/drm/amd/display/tests/Makefile
b/drivers/gpu/drm/amd/display/tests/Makefile
index ef16497318e8..cc1e9edd38c3 100644
--- a/drivers/gpu/drm/amd/display/tests/Makefile
+++ b/drivers/gpu/drm/amd/display/tests/Makefile
@@ -7,6 +7,11 @@ ifdef CONFIG_AMD_DC_BASICS_KUNIT_TEST
DC_TESTS += dc/basics/fixpt31_32_test.o
endif
+ifdef CONFIG_DML_KUNIT_TEST
+ CFLAGS_$(AMDDALPATH)/tests/dc/dml/display_mode_vba_test.o :=
$(dml_ccflags)
+ DC_TESTS += dc/dml/display_mode_vba_test.o
+endif
+
AMD_DAL_DC_TESTS = $(addprefix $(AMDDALPATH)/tests/,$(DC_TESTS))
AMD_DISPLAY_FILES += $(AMD_DAL_DC_TESTS)
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
new file mode 100644
index ..d3e3a9f50c3d
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
@@ -0,0 +1,741 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/display_mode_vba.h
+ *
+ * Copyright (C) 2022, Maíra Canal
+ */
+
+#include
+#include "dml/display_mode_lib.h"
+
+struct pixel_clock_adjustment_for_progressive_to_interlace_unit_expected {
+ const double pixel_clock[DC__NUM_DPP__MAX];
+ const double pixel_clock_backend[DC__NUM_DPP__MAX];
+};
+
+struct pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case {
+ const char *desc;
+ const unsigned int number_of_active_planes;
+ const bool interlace[DC__NUM_DPP__MAX];
+ const bool progressive_to_interlace_unit_in_OPP;
+ const double pixel_clock[DC__NUM_DPP__MAX];
+ const struct
pixel_clock_adjustment_for_progressive_to_interlace_unit_expected expected;
+};
+
+struct calculate_256B_block_sizes_test_case {
+ const char *desc;
+ const enum source_format_class source_pixel_format;
+ const enum dm_swizzle_mode surface_tiling;
+ const unsigned int byte_per_pixel_Y;
+ const unsigned int byte_per_pixel_C;
+ const unsigned int block_height_256_bytes_Y;
+ const unsigned int block_height_256_bytes_C;
+ const unsigned int block_width_256_bytes_Y;
+ const unsigned int block_width_256_bytes_C;
+};
+
+struct calculate_write_back_DISPCLK_test_case {
+ const char *desc;
+ const enum source_format_class writeback_pixel_format;
+ const double pixel_clock;
+ const double writeback_HRatio;
+ const double writeback_VRatio;
+ const unsigned int writeback_luma_HTaps;
+ const unsigned int writeback_luma_VTaps;
+ const unsigned int writeback_chroma_HTaps;
+ const unsigned int writeback_chroma_VTaps;
+ const double writeback_destination_width;
+ const unsigned int HTotal;
+ const unsigned int writeback_chroma_line_buffer_width;
+ const double calculate_write_back_DISPCLK;
+};
+
+/**
+ * pclk_adjustment_for_progressive_to_interlace_unit_test - KUnit test
+ * for PixelClockAdjustmentForProgressiveToInterlaceUnit
+ * @test: represents a running instance of a test.
+ */
+static void pclk_adjustment_for_progressive_to_interlace_unit_test(struct
kunit *test)
+{
+ const struct
pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case
+ *test_param = test->param_value;
+ struct display_mode_lib *mode_lib;
+ size_t pixel_clock_size = DC__NUM_DPP__MAX * sizeof(const double);
+ size_t interlace_size = DC__NUM_DPP__MAX * sizeof(const bool);
+
+ mode_lib = kunit_kzalloc(test, sizeof(struct display_mode_lib),
+GFP_KERNEL);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, mode_lib);
+
+ mode_lib->vba.NumberOfActivePlanes =
test_param->number_of_active_planes;
+ memcpy(mode_lib->vba.Interlace, test_param->interlace, interlace_size);
+ mode_lib->vba.ProgressiveToInterlaceUnitInOPP =
+ test_param->progressive_to_interlace_unit_in_OPP;
+ memcpy(mode_lib->vba.PixelClock, test_param->pixel_clock,
pixel_clock_size);
+
+ PixelClockAdjustmentForProgressiveToInterlaceUnit(mode_lib);
+
+ KUNIT_EXPECT_TRUE(test, !memcmp(mode_lib->vba.PixelClock,
+ test_param->expected.pixel_clock,
+ pixel_clock_size));
+ KUNIT_EXPECT_TRUE(te
[PATCH v3 3/8] drm/amd/display: Introduce KUnit tests to display_rq_dlg_calc_20
From: Isabella Basso
This adds tests to the bit encoding format verification functions on the
file. They're meant to be simpler so as to provide a proof of concept on
testing DML code.
Signed-off-by: Isabella Basso
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 13 ++
.../dc/dml/dcn20/display_rq_dlg_calc_20.c | 4 +
.../gpu/drm/amd/display/tests/.kunitconfig| 1 +
.../dml/dcn20/display_rq_dlg_calc_20_test.c | 124 ++
4 files changed, 142 insertions(+)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index ce882a8c24f5..039227baedfa 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -67,6 +67,19 @@ config DCE_KUNIT_TEST
If unsure, say N.
+config DML_KUNIT_TEST
+ bool "Run all KUnit tests for DML" if !KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC_DCN && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the Display Controller Engine. Only
useful for kernel
+ devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
+
config AMD_DC_BASICS_KUNIT_TEST
bool "Enable KUnit tests for the 'basics' sub-component of DAL" if
!KUNIT_ALL_TESTS
depends on DRM_AMD_DC && KUNIT
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
index 548cdef8a8ad..ab688c9ba0d1 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
@@ -1683,3 +1683,7 @@ static void calculate_ttu_cursor(struct display_mode_lib
*mode_lib,
ASSERT(*refcyc_per_req_delivery_cur < dml_pow(2, 13));
}
}
+
+#if IS_ENABLED(CONFIG_DML_KUNIT_TEST)
+#include "../../../tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c"
+#endif
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
index 7a58f75a8dfc..eb6f81601757 100644
--- a/drivers/gpu/drm/amd/display/tests/.kunitconfig
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -5,3 +5,4 @@ CONFIG_DRM_AMDGPU=y
CONFIG_DRM_AMD_DC=y
CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
CONFIG_DCE_KUNIT_TEST=y
+CONFIG_DML_KUNIT_TEST=y
diff --git
a/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
new file mode 100644
index ..e6d3e356205c
--- /dev/null
+++
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/dcn20/display_rq_dlg_calc_20.c
+ *
+ * Copyright (c) 2022, Isabella Basso
+ */
+
+#include
+#include "dml/display_mode_lib.h"
+
+/**
+ * get_bytes_per_element_test - KUnit test for get_bytes_per_element
+ * @test: represents a running instance of a test.
+ */
+static void get_bytes_per_element_test(struct kunit *test)
+{
+ /* last numbers should tell us the horizontal 4-element region binary
+* size N used for subsampling, thus giving us N/8 bytes per element
+*/
+ /* note that 4:4:4 is not subsampled */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_16, false), 2);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_32, false), 4);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_64, false), 8);
+
+ /* dcn20 doesn't support bit depths over 10b */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_12, false), 0);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_12, true), 0);
+
+ /* dm_444_XX are not dual plane */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_16, true), 0);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_32, true), 0);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_64, true), 0);
+
+ /* in the dm_42* values, last numbers specify bit depth, demanding we
+* treat chroma and luma channels separately
+*/
+ /* thus we'll now have ceil(N/8) bytes for luma */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_8, false), 1);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_10, false), 2);
+ /* and double the luma value for accommodating blue and red chroma
+* channels
+*/
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_8, true), 2);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_10, true), 4);
+
+ /* monochrome encodings should mirror non-subsampled variants */
+
[PATCH v3 2/8] drm/amd/display: Introduce KUnit tests to the bw_fixed library
KUnit unifies the test structure and provides helper tools that simplify
the development of tests. Basic use case allows running tests as regular
processes, which makes easier to run unit tests on a development machine
and to integrate the tests in a CI system.
This commit introduces a unit test to the bw_fixed library, which
performs a lot of the mathematical operations involving fixed-point
arithmetic and the conversion of integers to fixed-point representation
inside the Display Mode Library.
As fixed-point representation is the base foundation of the DML calcs
operations, this unit tests intend to assure the proper functioning of
the basic mathematical operations of fixed-point arithmetic, such as
multiplication, conversion from fractional to fixed-point number, and
more. You can run it with: ./tools/testing/kunit/kunit.py run \
--arch=x86_64 \
--kunitconfig=drivers/gpu/drm/amd/display/tests/
Co-developed-by: Magali Lemes
Signed-off-by: Magali Lemes
Co-developed-by: Tales Aparecida
Signed-off-by: Tales Aparecida
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 12 +
.../drm/amd/display/dc/dml/calcs/bw_fixed.c | 3 +
.../gpu/drm/amd/display/tests/.kunitconfig| 3 +-
.../tests/dc/dml/calcs/bw_fixed_test.c| 323 ++
4 files changed, 340 insertions(+), 1 deletion(-)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index cc44cfe88607..ce882a8c24f5 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -54,6 +54,18 @@ config DRM_AMD_SECURE_DISPLAY
of crc of specific region via debugfs.
Cooperate with specific DMCU FW.
+config DCE_KUNIT_TEST
+ bool "Run all KUnit tests for DCE" if !KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the Display Controller Engine. Only
useful for kernel
+ devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
config AMD_DC_BASICS_KUNIT_TEST
bool "Enable KUnit tests for the 'basics' sub-component of DAL" if
!KUNIT_ALL_TESTS
diff --git a/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
b/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
index 3aa8dd0acd5e..79ef53ea2480 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
@@ -187,3 +187,6 @@ struct bw_fixed bw_mul(const struct bw_fixed arg1, const
struct bw_fixed arg2)
return res;
}
+#if IS_ENABLED(CONFIG_DCE_KUNIT_TEST)
+#include "../../../tests/dc/dml/calcs/bw_fixed_test.c"
+#endif
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
index 60f2ff8158f5..7a58f75a8dfc 100644
--- a/drivers/gpu/drm/amd/display/tests/.kunitconfig
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -3,4 +3,5 @@ CONFIG_PCI=y
CONFIG_DRM=y
CONFIG_DRM_AMDGPU=y
CONFIG_DRM_AMD_DC=y
-CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
\ No newline at end of file
+CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
+CONFIG_DCE_KUNIT_TEST=y
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
new file mode 100644
index ..1369da49f444
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
@@ -0,0 +1,323 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/calcs/bw_fixed.h
+ *
+ * Copyright (C) 2022, Magali Lemes
+ * Copyright (C) 2022, Maíra Canal
+ * Copyright (C) 2022, Tales Aparecida
+ */
+
+#include
+#include
+#include "bw_fixed.h"
+
+/**
+ * DOC: Unit tests for AMDGPU DML calcs/bw_fixed.h
+ *
+ * bw_fixed.h performs a lot of the mathematical operations involving
+ * fixed-point arithmetic and the conversion of integers to fixed-point
+ * representation.
+ *
+ * As fixed-point representation is the base foundation of the DML calcs
+ * operations, these tests intend to assure the proper functioning of the
+ * basic mathematical operations of fixed-point arithmetic, such as
+ * multiplication, conversion from fractional to fixed-point number, and more.
+ *
+ */
+
+/**
+ * abs_i64_test - KUnit test for abs_i64
+ * @test: represents a running instance of a test.
+ */
+static void abs_i64_test(struct kunit *test)
+{
+ KUNIT_EXPECT_EQ(test, 0ULL, abs_i64(0LL));
+
+ /* Argument type limits */
+ KUNIT_EXPECT_EQ(test, (uint64_t)MAX_I64, abs_i64(MAX_I64));
+ KUNIT_EXPECT_EQ(test, (uint64_t)MAX_I64 + 1, abs_i64(MIN_I64));
+}
+
+/**
+ * bw_int_to_fixed_nonconst_test - KUnit test fo
[PATCH v3 1/8] drm/amd/display: Introduce KUnit tests for fixed31_32 library
From: Tales Aparecida
The fixed31_32 library performs a lot of the mathematical operations
involving fixed-point arithmetic and the conversion of integers to
fixed-point representation.
This unit tests intend to assure the proper functioning of the basic
mathematical operations of fixed-point arithmetic, such as
multiplication, conversion from fractional to fixed-point number,
and more. Use kunit_tool to run:
$ ./tools/testing/kunit/kunit.py run --arch=x86_64 \
--kunitconfig=drivers/gpu/drm/amd/display/tests/
Reviewed-by: David Gow
Signed-off-by: Tales Aparecida
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 13 +
drivers/gpu/drm/amd/display/Makefile | 2 +-
.../gpu/drm/amd/display/tests/.kunitconfig| 6 +
drivers/gpu/drm/amd/display/tests/Makefile| 12 +
.../display/tests/dc/basics/fixpt31_32_test.c | 232 ++
5 files changed, 264 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/amd/display/tests/.kunitconfig
create mode 100644 drivers/gpu/drm/amd/display/tests/Makefile
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 96cbc87f7b6b..cc44cfe88607 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -55,4 +55,17 @@ config DRM_AMD_SECURE_DISPLAY
Cooperate with specific DMCU FW.
+config AMD_DC_BASICS_KUNIT_TEST
+ bool "Enable KUnit tests for the 'basics' sub-component of DAL" if
!KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the Display Core. Only useful for kernel
+ devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
+
endmenu
diff --git a/drivers/gpu/drm/amd/display/Makefile
b/drivers/gpu/drm/amd/display/Makefile
index 2633de77de5e..0f329aab13f0 100644
--- a/drivers/gpu/drm/amd/display/Makefile
+++ b/drivers/gpu/drm/amd/display/Makefile
@@ -43,7 +43,7 @@ endif
#TODO: remove when Timing Sync feature is complete
subdir-ccflags-y += -DBUILD_FEATURE_TIMING_SYNC=0
-DAL_LIBS = amdgpu_dm dcmodules/freesync modules/color
modules/info_packet modules/power dmub/src
+DAL_LIBS = amdgpu_dm dcmodules/freesync modules/color
modules/info_packet modules/power dmub/src tests
ifdef CONFIG_DRM_AMD_DC_HDCP
DAL_LIBS += modules/hdcp
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
new file mode 100644
index ..60f2ff8158f5
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -0,0 +1,6 @@
+CONFIG_KUNIT=y
+CONFIG_PCI=y
+CONFIG_DRM=y
+CONFIG_DRM_AMDGPU=y
+CONFIG_DRM_AMD_DC=y
+CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/display/tests/Makefile
b/drivers/gpu/drm/amd/display/tests/Makefile
new file mode 100644
index ..ef16497318e8
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/Makefile
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: MIT
+#
+# Makefile for the KUnit Tests for DC
+#
+
+ifdef CONFIG_AMD_DC_BASICS_KUNIT_TEST
+ DC_TESTS += dc/basics/fixpt31_32_test.o
+endif
+
+AMD_DAL_DC_TESTS = $(addprefix $(AMDDALPATH)/tests/,$(DC_TESTS))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_DC_TESTS)
diff --git a/drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
b/drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
new file mode 100644
index ..2fc489203499
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: MIT
+/* Unit tests for display/include/fixed31_32.h and dc/basics/fixpt31_32.c
+ *
+ * Copyright (C) 2022, Tales Aparecida
+ */
+
+#include
+#include "os_types.h"
+#include "fixed31_32.h"
+
+static const struct fixed31_32 dc_fixpt_minus_one = { -0x1LL };
+
+/**
+ * dc_fixpt_from_int_test - KUnit test for dc_fixpt_from_int
+ * @test: represents a running instance of a test.
+ */
+static void dc_fixpt_from_int_test(struct kunit *test)
+{
+ struct fixed31_32 res;
+
+ res = dc_fixpt_from_int(0);
+ KUNIT_EXPECT_EQ(test, res.value, dc_fixpt_zero.value);
+
+ res = dc_fixpt_from_int(1);
+ KUNIT_EXPECT_EQ(test, res.value, dc_fixpt_one.value);
+
+ res = dc_fixpt_from_int(-1);
+ KUNIT_EXPECT_EQ(test, res.value, -dc_fixpt_one.value);
+
+ res = dc_fixpt_from_int(INT_MAX);
+ KUNIT_EXPECT_EQ(test, res.value, 0x7FFFLL);
+
+ res = dc_fixpt_from_int(INT_MIN);
+ KUNIT_EXPECT_EQ(test, res.value,
+ 0x8000LL); /* implicit negative signal */
+}
+
+/**
+ * dc
[PATCH v3 0/8] drm/amd/display: Introduce KUnit to Display Mode Library
Hello,
This series is version 3 of the introduction of unit testing to the
AMDPGU driver [1].
Our main goal is to bring unit testing to the AMD display driver; in
particular, we'll focus on the Display Mode Library (DML) for DCN2.0,
DMUB, and some of the DCE functions. This implementation intends to
help developers to recognize bugs before they are merged into the
mainline and also makes it possible for future code refactors of the
AMD display driver.
For the implementation of the tests, we decided to go with the Kernel
Unit Testing Framework (KUnit). KUnit makes it possible to run test
suites on kernel boot or load the tests as a module. It reports all test
case results through a TAP (Test Anything Protocol) in the kernel log.
Moreover, KUnit unifies the test structure and provides tools to
simplify the testing for developers and CI systems.
In regards to CI pipelines, we believe kunit_tool [2] provides
ease of use, but we are also working on integrating KUnit into IGT [3].
Since the second version, we've chosen a mix of approaches to integrate
KUnit tests into amdgpu:
1. Tests that use static functions are included through guards [4].
2. Tests without static functions are included through a Makefile.
We understand that testing static functions is not ideal, but taking into
consideration that this driver relies heavily on static functions with
complex behavior which would benefit from unit testing, otherwise, black-box
tested through public functions with dozens of arguments and sometimes high
cyclomatic complexity.
The first seven patches represent what we intend to do for the rest of the
DML modules: systematic testing of the DML functions, especially mathematically
complicated functions. Also, it shows how simple it is to add new tests to the
DML.
Among the tests, we highlight the dcn20_fpu_test, which, had it existed
then, could catch the defects introduced to dcn20_fpu.c by 8861c27a6c [5]
later fixed by 9ad5d02c2a [6].
In this series, there's also an example of how unit tests can help avoid
regressions and keep track of changes in behavior.
Applying this series on top of the amd-staging-drm-next (787df47adb1f)
and running its tests will fail the `dc_dmub_srv` test, you can verify
that with:
$ ./tools/testing/kunit/kunit.py run --arch=x86_64 \
--kunitconfig=drivers/gpu/drm/amd/display/tests
``
...
[17:37:28] # Subtest: populate_subvp_cmd_drr_info_test
[17:37:28] # populate_subvp_cmd_drr_info_test: pass:0 fail:5 skip:0 total:5
[17:37:28] not ok 1 - populate_subvp_cmd_drr_info_test
[17:37:28] [FAILED] populate_subvp_cmd_drr_info_test =
[17:37:28] # Subtest: dc_dmub_srv
[17:37:28] 1..1
[17:37:28] # Totals: pass:0 fail:5 skip:0 total:5
[17:37:28] not ok 4 - dc_dmub_srv
[17:37:28] === [FAILED] dc_dmub_srv ===
[17:37:28]
[17:37:28] Testing complete. Passed: 88, Failed: 5, Crashed: 0, Skipped: 0,
Errors: 0
``
Full output at: https://pastebin.com/PfmbXAJ9
This is due to a known regression introduced by commit 5da7f4134357
("drm/amd/display: fix 32 bit compilation errors in dc_dmub_srv.c")
[7], which resulted in the struct's members being zero. As an
exercise, you can revert the offending patch, run the tests again, and
the test-series will result in success.
``
[17:41:44] Testing complete. Passed: 93, Failed: 0, Crashed: 0, Skipped: 0,
Errors: 0
``
Full successful output: https://pastebin.com/Nn2rRRkd
This series depends on a couple of KUnit patches already merged into
torvalds/master, which themselves depend on older patches:
commit 61695f8c5d51 ("kunit: split resource API from test.h into new
resource.h")
commit 2852ca7fba9f ("panic: Taint kernel if tests are run")
commit cfc1d277891e ("module: Move all into module/")
commit cdebea6968fa ("kunit: split resource API impl from test.c into new
resource.c")
commit cae56e1740f5 ("kunit: rename print_subtest_{start,end} for clarity
(s/subtest/suite)")
commit 1cdba21db2ca ("kunit: add ability to specify suite-level init and exit
functions")
commit c272612cb4a2 ("kunit: Taint the kernel when KUnit tests are run")
commit 3d6e44623841 ("kunit: unify module and builtin suite definitions")
commit a02353f49162 ("kunit: bail out of test filtering logic quicker if OOM")
commit 1b11063d32d7 ("kunit: fix executor OOM error handling logic on non-UML")
commit e5857d396f35 ("kunit: flatten kunit_suite*** to kunit_suite** in
.kunit_test_suites")
commit 94681e289bf5 ("kunit: executor: Fix a memory leak on failure in
kunit_filter_tests")
You can get a for branch ready for compilation at
https://gitlab.freedesktop.org/isinyaaa/linux/-/tree/for-amd-mixed
Thanks in advance for your time taking a look and sending any feedback!
Best regards,
Isabella Basso, Magali Lemes, Maíra Canal, and Tales Aparecida
[
Re: [PATCH 0/5] drm/amd/display: Reduce stack usage for clang
Hi Nathan,
I have built-tested the whole series with clang 14.0.5 (Fedora
14.0.5-1.fc36), using:
$ make -kj"$(nproc)" ARCH=x86_64 LLVM=1 mrproper allmodconfig
drivers/gpu/drm/amd/amdgpu/
Great to see this patchset coming for DML!
To the whole series:
Tested-by: Maíra Canal
Best Regards,
- Maíra Canal
On 8/30/22 17:34, Nathan Chancellor wrote:
> Hi all,
>
> This series aims to address the following warnings, which are visible
> when building x86_64 allmodconfig with clang after commit 3876a8b5e241
> ("drm/amd/display: Enable building new display engine with KCOV
> enabled").
>
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3542:6:
> error: stack frame size (2200) exceeds limit (2048) in
> 'dml30_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
> void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
> *mode_lib)
> ^
> 1 error generated.
>
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6:
> error: stack frame size (2216) exceeds limit (2048) in
> 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
> void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
> *mode_lib)
> ^
> 1 error generated.
>
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1721:6:
> error: stack frame size (2152) exceeds limit (2048) in
> 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
> void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
> *mode_lib)
> ^
> 1 error generated.
>
> This series is based on commit b3235e8635e1 ("drm/amd/display: clean up
> some inconsistent indentings"). These warnings are fatal for
> allmodconfig due to CONFIG_WERROR so ideally, I would like to see these
> patches cherry-picked to a branch targeting mainline to allow our builds
> to go back to green. However, since this series is not exactly trivial
> in size, I can understand not wanting to apply these to mainline during
> the -rc cycle. If they cannot be cherry-picked to mainline, I can add a
> patch raising the value of -Wframe-larger-than for these files that can
> be cherry-picked to 6.0/mainline then add a revert of that change as the
> last patch in the stack so everything goes back to normal for -next/6.1.
> I am open to other options though!
>
> I have built this series against clang 16.0.0 (ToT) and GCC 12.2.0 for
> x86_64. It has seen no runtime testing, as my only test system with AMD
> graphics is a Renoir one, which as far as I understand it uses DCN 2.1.
>
> Nathan Chancellor (5):
> drm/amd/display: Reduce number of arguments of
> dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
> drm/amd/display: Reduce number of arguments of
> dml32_CalculatePrefetchSchedule()
> drm/amd/display: Reduce number of arguments of dml31's
> CalculateWatermarksAndDRAMSpeedChangeSupport()
> drm/amd/display: Reduce number of arguments of dml31's
> CalculateFlipSchedule()
> drm/amd/display: Mark dml30's UseMinimumDCFCLK() as noinline for stack
> usage
>
> .../dc/dml/dcn30/display_mode_vba_30.c| 2 +-
> .../dc/dml/dcn31/display_mode_vba_31.c| 420 +-
> .../dc/dml/dcn32/display_mode_vba_32.c| 236 +++---
> .../dc/dml/dcn32/display_mode_vba_util_32.c | 323 ++
> .../dc/dml/dcn32/display_mode_vba_util_32.h | 51 +--
> 5 files changed, 318 insertions(+), 714 deletions(-)
>
>
> base-commit: b3235e8635e1dd7ac1a27a73330e9880dfe05154
[PATCH v2 7/8] drm/amd/display: Introduce KUnit tests to dc_dmub_srv library
Add unit test to the SubVP feature in order to avoid possible
regressions and assure the code robustness.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 13 +
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 4 +
.../gpu/drm/amd/display/tests/.kunitconfig| 1 +
.../amd/display/tests/dc/dc_dmub_srv_test.c | 285 ++
4 files changed, 303 insertions(+)
create mode 100644 drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 039227baedfa..f667b954f89f 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -93,4 +93,17 @@ config AMD_DC_BASICS_KUNIT_TEST
If unsure, say N.
+config AMD_DC_KUNIT_TEST
+ bool "Enable KUnit tests for the 'utils' sub-component of DAL" if
!KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the basics folder of Display Core. Only
useful for
+ kernel devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
+
endmenu
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index cd7225d98b3d..86f78fe017a6 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -819,3 +819,7 @@ void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv
*dc_dmub_srv)
diag_data.is_cw0_enabled,
diag_data.is_cw6_enabled);
}
+
+#if IS_ENABLED(CONFIG_AMD_DC_KUNIT_TEST)
+#include "../tests/dc/dc_dmub_srv_test.c"
+#endif
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
index eb6f81601757..4c5861ad58bd 100644
--- a/drivers/gpu/drm/amd/display/tests/.kunitconfig
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -4,5 +4,6 @@ CONFIG_DRM=y
CONFIG_DRM_AMDGPU=y
CONFIG_DRM_AMD_DC=y
CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
+CONFIG_AMD_DC_KUNIT_TEST=y
CONFIG_DCE_KUNIT_TEST=y
CONFIG_DML_KUNIT_TEST=y
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
new file mode 100644
index ..3f1f15397090
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
@@ -0,0 +1,285 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dc_dmub_srv.c
+ *
+ * Copyright (C) 2022, Maíra Canal
+ */
+
+#include
+#include "dc_dmub_srv.h"
+
+struct populate_subvp_cmd_drr_info_test_case {
+ const char *desc;
+ struct dc *dc;
+ struct pipe_ctx *subvp_pipe;
+ struct pipe_ctx *vblank_pipe;
+ const u8 drr_in_use;
+ const u8 drr_window_size_ms;
+ const u16 min_vtotal_supported;
+ const u16 max_vtotal_supported;
+ const u8 use_ramping;
+};
+
+struct populate_subvp_cmd_drr_info_test_case
populate_subvp_cmd_drr_info_cases[] = {
+ {
+ .desc = "Same Clock Frequency",
+ .dc = &(struct dc) {
+ .caps = {
+ .subvp_prefetch_end_to_mall_start_us = 0,
+ }
+ },
+ .subvp_pipe = &(struct pipe_ctx) {
+ .stream = &(struct dc_stream_state) {
+ .timing = {
+ .h_total = 2784,
+ .v_addressable = 1080,
+ .pix_clk_100hz = 1855800,
+ },
+ .mall_stream_config = {
+ .paired_stream = &(struct
dc_stream_state) {
+ .timing = {
+ .h_total = 3600,
+ .v_total = ,
+ .v_addressable = 1080,
+ .v_front_porch = 3,
+ .pix_clk_100hz =
1855800,
+ },
+ },
+ },
+ },
+ },
+ .vblank_pipe = &(struct pipe_ctx) {
+ .stream = &(struct dc_stream_state) {
+ .timing = {
+ .h_total = 2784,
+ .v_total = ,
+ .v_addressable
[PATCH v2 8/8] Documentation/gpu: Add Display Core Unit Test documentation
Explain how to run the KUnit tests present in the AMDGPU's Display Core and clarify which architectures and tools can be used to run the tests. Moreover, explains how to add new tests to the existing tests. Signed-off-by: Maíra Canal --- .../gpu/amdgpu/display/display-test.rst | 88 +++ Documentation/gpu/amdgpu/display/index.rst| 1 + 2 files changed, 89 insertions(+) create mode 100644 Documentation/gpu/amdgpu/display/display-test.rst diff --git a/Documentation/gpu/amdgpu/display/display-test.rst b/Documentation/gpu/amdgpu/display/display-test.rst new file mode 100644 index ..a8c136ce87b7 --- /dev/null +++ b/Documentation/gpu/amdgpu/display/display-test.rst @@ -0,0 +1,88 @@ +.. SPDX-License-Identifier: GPL-2.0+ + + +Display Core Unit Tests + + +Display core provides a set of unit tests, currently focused on the Display Mode +Library. The unit tests use KUnit (Kernel Unit Testing Framework), a common +framework for unit tests within the Linux Kernel. + +This section covers the specifics of the tests for the AMDGPU driver. For general +information about KUnit, please refer to Documentation/dev-tools/kunit/start.rst. + +How to run the tests? += + +In order to facilitate running the test suite, a configuration file is present +in ``drivers/gpu/drm/amd/display/tests/dc/.kunitconfig``. This configuration file +can be used to run the kunit_tool, a Python script (``tools/testing/kunit/kunit.py``) +used to configure, build, exec, parse and run tests. + +.. code-block:: bash + + $ ./tools/testing/kunit/kunit.py run --arch=x86_64 \ + --kunitconfig=drivers/gpu/drm/amd/display/tests + +Currently, the Display Core Unit Tests are only supported on x86_64. + +Moreover, the tests can also be run on real hardware or in other emulation +environments. To include the Display Core Unit Tests on a deployable kernel, +you might add the following config options to your ``.config``: + +.. code-block:: none + + CONFIG_KUNIT=y + CONFIG_AMDGPU=m + CONFIG_AMD_DC_BASICS_KUNIT_TEST=y + CONFIG_AMD_DC_KUNIT_TEST=y + CONFIG_DCE_KUNIT_TEST=y + CONFIG_DML_KUNIT_TEST=y + +Once the kernel is built and installed, you can load the ``amdgpu`` module +to run all tests available. + +Also, the tests can be added to the kernel as built-in modules, by adding the +following config options to your ``.config``: + +.. code-block:: none + + CONFIG_KUNIT=y + CONFIG_AMDGPU=y + CONFIG_AMD_DC_BASICS_KUNIT_TEST=y + CONFIG_AMD_DC_KUNIT_TEST=y + CONFIG_DCE_KUNIT_TEST=y + CONFIG_DML_KUNIT_TEST=y + +In order to run specific tests, you can check the filter options from KUnit on +Documentation/dev-tools/kunit/kunit-tool.rst. + +How to add new tests? += + +Tests covering different parts of the Display Core are always welcomed. Adding +a new test is a simple procedure, that consists in creating a unit test file +and adding the following guard to the end of the tested file when you are +testing static functions: + +.. code-block:: c + + #ifdef CONFIG_MY_KUNIT_TEST + #include "my_kunit_test.c" + #endif + +If you are not testing static functions, you should use the Makefile placed on +``display/tests``. In order to add a test to the Makefile, you can just add +the following entry to the Makefile: + +.. code-block:: make + + ifdef CONFIG_MY_KUNIT_TEST + DC_TESTS += my_kunit_test.o + endif + +The ``display/tests`` folder replicates the folder hierarchy of the ``display`` +folder, so this must be considered while adding new tests. + +More information on how to write unit tests with the KUnit API can be provided +on Documentation/dev-tools/kunit/api/test.rst. diff --git a/Documentation/gpu/amdgpu/display/index.rst b/Documentation/gpu/amdgpu/display/index.rst index c1fb2fb3c710..4f4e72e3e75f 100644 --- a/Documentation/gpu/amdgpu/display/index.rst +++ b/Documentation/gpu/amdgpu/display/index.rst @@ -28,4 +28,5 @@ table of content: display-manager.rst dc-debug.rst dcn-overview.rst + display-test.rst dc-glossary.rst -- 2.37.2
[PATCH v2 6/8] drm/amd/display: Introduce KUnit tests for dcn20_fpu
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 3 +-
.../tests/dc/dml/dcn20/dcn20_fpu_test.c | 561 ++
2 files changed, 563 insertions(+), 1 deletion(-)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
diff --git a/drivers/gpu/drm/amd/display/tests/Makefile
b/drivers/gpu/drm/amd/display/tests/Makefile
index cc1e9edd38c3..a34677808e48 100644
--- a/drivers/gpu/drm/amd/display/tests/Makefile
+++ b/drivers/gpu/drm/amd/display/tests/Makefile
@@ -9,7 +9,8 @@ endif
ifdef CONFIG_DML_KUNIT_TEST
CFLAGS_$(AMDDALPATH)/tests/dc/dml/display_mode_vba_test.o :=
$(dml_ccflags)
- DC_TESTS += dc/dml/display_mode_vba_test.o
+ CFLAGS_$(AMDDALPATH)/tests/dc/dml/dcn20/dcn20_fpu_test.o :=
$(dml_ccflags)
+ DC_TESTS += dc/dml/display_mode_vba_test.o dc/dml/dcn20/dcn20_fpu_test.o
endif
AMD_DAL_DC_TESTS = $(addprefix $(AMDDALPATH)/tests/,$(DC_TESTS))
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
new file mode 100644
index ..6b7ebb78fec9
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/dcn20_fpu_test.c
@@ -0,0 +1,561 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/dcn20/dcn20_fpu.h
+ *
+ * Copyright (C) 2022, Magali Lemes
+ */
+
+#include
+
+#include "dc/inc/resource.h"
+#include "dc/inc/hw/clk_mgr.h"
+#include "dc/dcn21/dcn21_resource.h"
+
+#include "dml/dcn20/dcn20_fpu.h"
+
+/**
+ * DOC: Unit tests for AMDGPU DML dcn20/dcn20_fpu.h
+ */
+
+struct dcn20_cap_soc_clocks_test_case {
+ const char *desc;
+ struct _vcs_dpi_soc_bounding_box_st bb;
+ struct pp_smu_nv_clock_table max_clocks;
+ const int clock_states;
+ const struct _vcs_dpi_voltage_scaling_st
expected_clock_limits[DC__VOLTAGE_STATES];
+};
+
+struct dcn21_update_bw_bounding_box_test_case {
+ const char *desc;
+ struct dc dc;
+ struct clk_bw_params bw_params;
+ const int clocks_to_compare;
+ const struct _vcs_dpi_voltage_scaling_st
expected_clock_limits[DC__VOLTAGE_STATES];
+};
+
+struct dcn20_cap_soc_clocks_test_case dcn20_cap_soc_clocks_test_cases[] = {
+ {
+ .desc = "4-state bounding box clock limits ",
+ .bb = {
+ .clock_limits = {
+ {
+ .dcfclk_mhz = 506.0,
+ .fabricclk_mhz = 506.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 400.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 506.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 1600.0,
+ },
+ {
+ .dcfclk_mhz = 540.0,
+ .fabricclk_mhz = 540.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 540.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 8000.0,
+ },
+ {
+ .dcfclk_mhz = 675.0,
+ .fabricclk_mhz = 675.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 675.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 1.0,
+ },
+ {
+ .dcfclk_mhz = 1265.0,
+ .fabricclk_mhz = 1266.0,
+ .dispclk_mhz = 1284.0,
+ .dppclk_mhz = 1284.0,
+ .phyclk_mhz = 810.0,
+ .socclk_mhz = 1266.0,
+ .dscclk_mhz = 428.0,
+ .dram_speed_mts = 15000.0,
+ },
+ },
+ .num_states = 4,
+ },
+ .max
[PATCH v2 5/8] drm/amd/display: Introduce KUnit to dcn20/display_mode_vba_20 library
The display_mode_vba_20 deals with hundreds of display parameters for
the DCN20 and sometimes does it in odd ways. The addition of unit tests
intends to assure the quality of the code delivered by HW engineers and,
also make it possible to refactor the code decreasing concerns about adding
bugs to the codebase.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn20/display_mode_vba_20.c| 4 +
.../dc/dml/dcn20/display_mode_vba_20_test.c | 888 ++
2 files changed, 892 insertions(+)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d3b5b6fedf04..738d8c1f5def 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -5112,3 +5112,7 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
locals->OutputBppPerState[mode_lib->vba.VoltageLevel][k];
}
}
+
+#if IS_ENABLED(CONFIG_DML_KUNIT_TEST)
+#include "../../tests/dc/dml/dcn20/display_mode_vba_20_test.c"
+#endif
diff --git
a/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
new file mode 100644
index ..eeeacc2758a3
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_mode_vba_20_test.c
@@ -0,0 +1,888 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/dcn20/display_mode_vba_20.c
+ *
+ * Copyright (C) 2022, Maíra Canal
+ */
+
+#include
+#include "dml/display_mode_enums.h"
+
+struct calculate_write_back_delay_test_case {
+ const char *desc;
+ const enum source_format_class writeback_pixel_format;
+ const double writeback_HRatio;
+ const double writeback_VRatio;
+ const unsigned int writeback_luma_HTaps;
+ const unsigned int writeback_luma_VTaps;
+ const unsigned int writeback_chroma_HTaps;
+ const unsigned int writeback_chroma_VTaps;
+ const unsigned int writeback_destination_width;
+ const double calculate_write_back_delay;
+};
+
+struct calculate_active_row_bandwidth_test_case {
+ const char *desc;
+ const bool GPUVM_enable;
+ const enum source_format_class source_pixel_format;
+ const double VRatio;
+ const bool DCC_enable;
+ const double line_time;
+ const unsigned int meta_row_byte_luma;
+ const unsigned int meta_row_byte_chroma;
+ const unsigned int meta_row_height_luma;
+ const unsigned int meta_row_height_chroma;
+ const unsigned int pixel_PTE_bytes_per_row_luma;
+ const unsigned int pixel_PTE_bytes_per_row_chroma;
+ const unsigned int dpte_row_height_luma;
+ const unsigned int dpte_row_height_chroma;
+ const double meta_row_bw;
+ const double dpte_row_bw;
+ const double qual_row_bw;
+};
+
+/**
+ * dscce_compute_delay_test - KUnit test for dscceComputeDelay
+ * @test: represents a running instance of a test.
+ */
+static void dscce_compute_delay_test(struct kunit *test)
+{
+ /* Testing all the valid values for bits per color (bpc): {8, 10, 12} */
+ /* Testing all the valid values for number of slices: {1, 2, 3, 4} */
+
+ /*
+* For 4:4:4 encoding, the minimum bpp value is 8 and is incremented by
+* 1/16 of a bit. Moreover, the sliceWidth must be less than or equal to
+* 5184/numSlices.
+*/
+
+ /* Minimum sliceWidth value on 4:4:4 encoding */
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 8.0, 1, 1, dm_444), 2004);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 8.0625, 5184, 1, dm_444),
885);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 8.125, 2592, 2, dm_444),
3495);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 8.1875, 1728, 3, dm_444),
4356);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 8.25, 864, 3, dm_444),
4425);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 8.3125, 1296, 4, dm_444),
4854);
+
+ /*
+* For 4:2:0 encoding, the minimum bpp value is 6 and is incremented by
+* 1/16 of a bit. Moreover, the sliceWidth must be less than or equal to
+* 4096/numSlices.
+*/
+
+ /* Minimum sliceWidth value on 4:2:0 encoding */
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 6.0, 2, 1, dm_420), 2982);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(8, 6.0625, 4096, 1, dm_420),
1428);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 6.125, 2048, 2, dm_420),
3522);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(10, 6.1875, 1365, 3, dm_420),
4200);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 6.25, 682, 3, dm_420),
5706);
+
+ KUNIT_EXPECT_EQ(test, dscceComputeDelay(12, 6.312
[PATCH v2 4/8] drm/amd/display: Introduce KUnit tests to the display_mode_vba library
The display_mode_vba library deals with hundreds of display parameters
and sometimes does it in odd ways. The addition of unit tests intends to
assure the quality of the code delivered by HW engineers and, also make
it possible to refactor the code decreasing concerns about adding bugs
to the codebase.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 5 +
.../tests/dc/dml/display_mode_vba_test.c | 741 ++
2 files changed, 746 insertions(+)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
diff --git a/drivers/gpu/drm/amd/display/tests/Makefile
b/drivers/gpu/drm/amd/display/tests/Makefile
index ef16497318e8..cc1e9edd38c3 100644
--- a/drivers/gpu/drm/amd/display/tests/Makefile
+++ b/drivers/gpu/drm/amd/display/tests/Makefile
@@ -7,6 +7,11 @@ ifdef CONFIG_AMD_DC_BASICS_KUNIT_TEST
DC_TESTS += dc/basics/fixpt31_32_test.o
endif
+ifdef CONFIG_DML_KUNIT_TEST
+ CFLAGS_$(AMDDALPATH)/tests/dc/dml/display_mode_vba_test.o :=
$(dml_ccflags)
+ DC_TESTS += dc/dml/display_mode_vba_test.o
+endif
+
AMD_DAL_DC_TESTS = $(addprefix $(AMDDALPATH)/tests/,$(DC_TESTS))
AMD_DISPLAY_FILES += $(AMD_DAL_DC_TESTS)
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
new file mode 100644
index ..d3e3a9f50c3d
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/display_mode_vba_test.c
@@ -0,0 +1,741 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/display_mode_vba.h
+ *
+ * Copyright (C) 2022, Maíra Canal
+ */
+
+#include
+#include "dml/display_mode_lib.h"
+
+struct pixel_clock_adjustment_for_progressive_to_interlace_unit_expected {
+ const double pixel_clock[DC__NUM_DPP__MAX];
+ const double pixel_clock_backend[DC__NUM_DPP__MAX];
+};
+
+struct pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case {
+ const char *desc;
+ const unsigned int number_of_active_planes;
+ const bool interlace[DC__NUM_DPP__MAX];
+ const bool progressive_to_interlace_unit_in_OPP;
+ const double pixel_clock[DC__NUM_DPP__MAX];
+ const struct
pixel_clock_adjustment_for_progressive_to_interlace_unit_expected expected;
+};
+
+struct calculate_256B_block_sizes_test_case {
+ const char *desc;
+ const enum source_format_class source_pixel_format;
+ const enum dm_swizzle_mode surface_tiling;
+ const unsigned int byte_per_pixel_Y;
+ const unsigned int byte_per_pixel_C;
+ const unsigned int block_height_256_bytes_Y;
+ const unsigned int block_height_256_bytes_C;
+ const unsigned int block_width_256_bytes_Y;
+ const unsigned int block_width_256_bytes_C;
+};
+
+struct calculate_write_back_DISPCLK_test_case {
+ const char *desc;
+ const enum source_format_class writeback_pixel_format;
+ const double pixel_clock;
+ const double writeback_HRatio;
+ const double writeback_VRatio;
+ const unsigned int writeback_luma_HTaps;
+ const unsigned int writeback_luma_VTaps;
+ const unsigned int writeback_chroma_HTaps;
+ const unsigned int writeback_chroma_VTaps;
+ const double writeback_destination_width;
+ const unsigned int HTotal;
+ const unsigned int writeback_chroma_line_buffer_width;
+ const double calculate_write_back_DISPCLK;
+};
+
+/**
+ * pclk_adjustment_for_progressive_to_interlace_unit_test - KUnit test
+ * for PixelClockAdjustmentForProgressiveToInterlaceUnit
+ * @test: represents a running instance of a test.
+ */
+static void pclk_adjustment_for_progressive_to_interlace_unit_test(struct
kunit *test)
+{
+ const struct
pixel_clock_adjustment_for_progressive_to_interlace_unit_test_case
+ *test_param = test->param_value;
+ struct display_mode_lib *mode_lib;
+ size_t pixel_clock_size = DC__NUM_DPP__MAX * sizeof(const double);
+ size_t interlace_size = DC__NUM_DPP__MAX * sizeof(const bool);
+
+ mode_lib = kunit_kzalloc(test, sizeof(struct display_mode_lib),
+GFP_KERNEL);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, mode_lib);
+
+ mode_lib->vba.NumberOfActivePlanes =
test_param->number_of_active_planes;
+ memcpy(mode_lib->vba.Interlace, test_param->interlace, interlace_size);
+ mode_lib->vba.ProgressiveToInterlaceUnitInOPP =
+ test_param->progressive_to_interlace_unit_in_OPP;
+ memcpy(mode_lib->vba.PixelClock, test_param->pixel_clock,
pixel_clock_size);
+
+ PixelClockAdjustmentForProgressiveToInterlaceUnit(mode_lib);
+
+ KUNIT_EXPECT_TRUE(test, !memcmp(mode_lib->vba.PixelClock,
+ test_param->expected.pixel_clock,
+ pixel_clock_size));
+ KUNIT_EXPECT_TRUE(te
[PATCH v2 3/8] drm/amd/display: Introduce KUnit tests to display_rq_dlg_calc_20
From: Isabella Basso
This adds tests to the bit encoding format verification functions on the
file. They're meant to be simpler so as to provide a proof of concept on
testing DML code.
Signed-off-by: Isabella Basso
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 13 ++
.../dc/dml/dcn20/display_rq_dlg_calc_20.c | 4 +
.../gpu/drm/amd/display/tests/.kunitconfig| 1 +
.../dml/dcn20/display_rq_dlg_calc_20_test.c | 124 ++
4 files changed, 142 insertions(+)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index ce882a8c24f5..039227baedfa 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -67,6 +67,19 @@ config DCE_KUNIT_TEST
If unsure, say N.
+config DML_KUNIT_TEST
+ bool "Run all KUnit tests for DML" if !KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC_DCN && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the Display Controller Engine. Only
useful for kernel
+ devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
+
config AMD_DC_BASICS_KUNIT_TEST
bool "Enable KUnit tests for the 'basics' sub-component of DAL" if
!KUNIT_ALL_TESTS
depends on DRM_AMD_DC && KUNIT
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
index 548cdef8a8ad..ab688c9ba0d1 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
@@ -1683,3 +1683,7 @@ static void calculate_ttu_cursor(struct display_mode_lib
*mode_lib,
ASSERT(*refcyc_per_req_delivery_cur < dml_pow(2, 13));
}
}
+
+#if IS_ENABLED(CONFIG_DML_KUNIT_TEST)
+#include "../../../tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c"
+#endif
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
index 7a58f75a8dfc..eb6f81601757 100644
--- a/drivers/gpu/drm/amd/display/tests/.kunitconfig
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -5,3 +5,4 @@ CONFIG_DRM_AMDGPU=y
CONFIG_DRM_AMD_DC=y
CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
CONFIG_DCE_KUNIT_TEST=y
+CONFIG_DML_KUNIT_TEST=y
diff --git
a/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
new file mode 100644
index ..e6d3e356205c
--- /dev/null
+++
b/drivers/gpu/drm/amd/display/tests/dc/dml/dcn20/display_rq_dlg_calc_20_test.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/dcn20/display_rq_dlg_calc_20.c
+ *
+ * Copyright (c) 2022, Isabella Basso
+ */
+
+#include
+#include "dml/display_mode_lib.h"
+
+/**
+ * get_bytes_per_element_test - KUnit test for get_bytes_per_element
+ * @test: represents a running instance of a test.
+ */
+static void get_bytes_per_element_test(struct kunit *test)
+{
+ /* last numbers should tell us the horizontal 4-element region binary
+* size N used for subsampling, thus giving us N/8 bytes per element
+*/
+ /* note that 4:4:4 is not subsampled */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_16, false), 2);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_32, false), 4);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_64, false), 8);
+
+ /* dcn20 doesn't support bit depths over 10b */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_12, false), 0);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_12, true), 0);
+
+ /* dm_444_XX are not dual plane */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_16, true), 0);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_32, true), 0);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_444_64, true), 0);
+
+ /* in the dm_42* values, last numbers specify bit depth, demanding we
+* treat chroma and luma channels separately
+*/
+ /* thus we'll now have ceil(N/8) bytes for luma */
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_8, false), 1);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_10, false), 2);
+ /* and double the luma value for accommodating blue and red chroma
+* channels
+*/
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_8, true), 2);
+ KUNIT_ASSERT_EQ(test, get_bytes_per_element(dm_420_10, true), 4);
+
+ /* monochrome encodings should mirror non-subsampled variants */
+
[PATCH v2 2/8] drm/amd/display: Introduce KUnit tests to the bw_fixed library
KUnit unifies the test structure and provides helper tools that simplify
the development of tests. Basic use case allows running tests as regular
processes, which makes easier to run unit tests on a development machine
and to integrate the tests in a CI system.
This commit introduces a unit test to the bw_fixed library, which
performs a lot of the mathematical operations involving fixed-point
arithmetic and the conversion of integers to fixed-point representation
inside the Display Mode Library.
As fixed-point representation is the base foundation of the DML calcs
operations, this unit tests intend to assure the proper functioning of
the basic mathematical operations of fixed-point arithmetic, such as
multiplication, conversion from fractional to fixed-point number, and
more. You can run it with: ./tools/testing/kunit/kunit.py run \
--arch=x86_64 \
--kunitconfig=drivers/gpu/drm/amd/display/tests/
Co-developed-by: Magali Lemes
Signed-off-by: Magali Lemes
Co-developed-by: Tales Aparecida
Signed-off-by: Tales Aparecida
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 12 +
.../drm/amd/display/dc/dml/calcs/bw_fixed.c | 3 +
.../gpu/drm/amd/display/tests/.kunitconfig| 3 +-
.../tests/dc/dml/calcs/bw_fixed_test.c| 323 ++
4 files changed, 340 insertions(+), 1 deletion(-)
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index cc44cfe88607..ce882a8c24f5 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -54,6 +54,18 @@ config DRM_AMD_SECURE_DISPLAY
of crc of specific region via debugfs.
Cooperate with specific DMCU FW.
+config DCE_KUNIT_TEST
+ bool "Run all KUnit tests for DCE" if !KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the Display Controller Engine. Only
useful for kernel
+ devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
config AMD_DC_BASICS_KUNIT_TEST
bool "Enable KUnit tests for the 'basics' sub-component of DAL" if
!KUNIT_ALL_TESTS
diff --git a/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
b/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
index 3aa8dd0acd5e..79ef53ea2480 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/calcs/bw_fixed.c
@@ -187,3 +187,6 @@ struct bw_fixed bw_mul(const struct bw_fixed arg1, const
struct bw_fixed arg2)
return res;
}
+#if IS_ENABLED(CONFIG_DCE_KUNIT_TEST)
+#include "../../../tests/dc/dml/calcs/bw_fixed_test.c"
+#endif
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
index 60f2ff8158f5..7a58f75a8dfc 100644
--- a/drivers/gpu/drm/amd/display/tests/.kunitconfig
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -3,4 +3,5 @@ CONFIG_PCI=y
CONFIG_DRM=y
CONFIG_DRM_AMDGPU=y
CONFIG_DRM_AMD_DC=y
-CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
\ No newline at end of file
+CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
+CONFIG_DCE_KUNIT_TEST=y
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
new file mode 100644
index ..1369da49f444
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dml/calcs/bw_fixed_test.c
@@ -0,0 +1,323 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dml/calcs/bw_fixed.h
+ *
+ * Copyright (C) 2022, Magali Lemes
+ * Copyright (C) 2022, Maíra Canal
+ * Copyright (C) 2022, Tales Aparecida
+ */
+
+#include
+#include
+#include "bw_fixed.h"
+
+/**
+ * DOC: Unit tests for AMDGPU DML calcs/bw_fixed.h
+ *
+ * bw_fixed.h performs a lot of the mathematical operations involving
+ * fixed-point arithmetic and the conversion of integers to fixed-point
+ * representation.
+ *
+ * As fixed-point representation is the base foundation of the DML calcs
+ * operations, these tests intend to assure the proper functioning of the
+ * basic mathematical operations of fixed-point arithmetic, such as
+ * multiplication, conversion from fractional to fixed-point number, and more.
+ *
+ */
+
+/**
+ * abs_i64_test - KUnit test for abs_i64
+ * @test: represents a running instance of a test.
+ */
+static void abs_i64_test(struct kunit *test)
+{
+ KUNIT_EXPECT_EQ(test, 0ULL, abs_i64(0LL));
+
+ /* Argument type limits */
+ KUNIT_EXPECT_EQ(test, (uint64_t)MAX_I64, abs_i64(MAX_I64));
+ KUNIT_EXPECT_EQ(test, (uint64_t)MAX_I64 + 1, abs_i64(MIN_I64));
+}
+
+/**
+ * bw_int_to_fixed_nonconst_test - KUnit test fo
[PATCH v2 1/8] drm/amd/display: Introduce KUnit tests for fixed31_32 library
From: Tales Aparecida
The fixed31_32 library performs a lot of the mathematical operations
involving fixed-point arithmetic and the conversion of integers to
fixed-point representation.
This unit tests intend to assure the proper functioning of the basic
mathematical operations of fixed-point arithmetic, such as
multiplication, conversion from fractional to fixed-point number,
and more. Use kunit_tool to run:
$ ./tools/testing/kunit/kunit.py run --arch=x86_64 \
--kunitconfig=drivers/gpu/drm/amd/display/tests/
Reviewed-by: David Gow
Signed-off-by: Tales Aparecida
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig | 13 +
drivers/gpu/drm/amd/display/Makefile | 2 +-
.../gpu/drm/amd/display/tests/.kunitconfig| 6 +
drivers/gpu/drm/amd/display/tests/Makefile| 12 +
.../display/tests/dc/basics/fixpt31_32_test.c | 232 ++
5 files changed, 264 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/amd/display/tests/.kunitconfig
create mode 100644 drivers/gpu/drm/amd/display/tests/Makefile
create mode 100644
drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 96cbc87f7b6b..cc44cfe88607 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -55,4 +55,17 @@ config DRM_AMD_SECURE_DISPLAY
Cooperate with specific DMCU FW.
+config AMD_DC_BASICS_KUNIT_TEST
+ bool "Enable KUnit tests for the 'basics' sub-component of DAL" if
!KUNIT_ALL_TESTS
+ depends on DRM_AMD_DC && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ Enables unit tests for the Display Core. Only useful for kernel
+ devs running KUnit.
+
+ For more information on KUnit and unit tests in general please
refer to
+ the KUnit documentation in Documentation/dev-tools/kunit/.
+
+ If unsure, say N.
+
endmenu
diff --git a/drivers/gpu/drm/amd/display/Makefile
b/drivers/gpu/drm/amd/display/Makefile
index 2633de77de5e..0f329aab13f0 100644
--- a/drivers/gpu/drm/amd/display/Makefile
+++ b/drivers/gpu/drm/amd/display/Makefile
@@ -43,7 +43,7 @@ endif
#TODO: remove when Timing Sync feature is complete
subdir-ccflags-y += -DBUILD_FEATURE_TIMING_SYNC=0
-DAL_LIBS = amdgpu_dm dcmodules/freesync modules/color
modules/info_packet modules/power dmub/src
+DAL_LIBS = amdgpu_dm dcmodules/freesync modules/color
modules/info_packet modules/power dmub/src tests
ifdef CONFIG_DRM_AMD_DC_HDCP
DAL_LIBS += modules/hdcp
diff --git a/drivers/gpu/drm/amd/display/tests/.kunitconfig
b/drivers/gpu/drm/amd/display/tests/.kunitconfig
new file mode 100644
index ..60f2ff8158f5
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/.kunitconfig
@@ -0,0 +1,6 @@
+CONFIG_KUNIT=y
+CONFIG_PCI=y
+CONFIG_DRM=y
+CONFIG_DRM_AMDGPU=y
+CONFIG_DRM_AMD_DC=y
+CONFIG_AMD_DC_BASICS_KUNIT_TEST=y
\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/display/tests/Makefile
b/drivers/gpu/drm/amd/display/tests/Makefile
new file mode 100644
index ..ef16497318e8
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/Makefile
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: MIT
+#
+# Makefile for the KUnit Tests for DC
+#
+
+ifdef CONFIG_AMD_DC_BASICS_KUNIT_TEST
+ DC_TESTS += dc/basics/fixpt31_32_test.o
+endif
+
+AMD_DAL_DC_TESTS = $(addprefix $(AMDDALPATH)/tests/,$(DC_TESTS))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_DC_TESTS)
diff --git a/drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
b/drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
new file mode 100644
index ..2fc489203499
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/basics/fixpt31_32_test.c
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: MIT
+/* Unit tests for display/include/fixed31_32.h and dc/basics/fixpt31_32.c
+ *
+ * Copyright (C) 2022, Tales Aparecida
+ */
+
+#include
+#include "os_types.h"
+#include "fixed31_32.h"
+
+static const struct fixed31_32 dc_fixpt_minus_one = { -0x1LL };
+
+/**
+ * dc_fixpt_from_int_test - KUnit test for dc_fixpt_from_int
+ * @test: represents a running instance of a test.
+ */
+static void dc_fixpt_from_int_test(struct kunit *test)
+{
+ struct fixed31_32 res;
+
+ res = dc_fixpt_from_int(0);
+ KUNIT_EXPECT_EQ(test, res.value, dc_fixpt_zero.value);
+
+ res = dc_fixpt_from_int(1);
+ KUNIT_EXPECT_EQ(test, res.value, dc_fixpt_one.value);
+
+ res = dc_fixpt_from_int(-1);
+ KUNIT_EXPECT_EQ(test, res.value, -dc_fixpt_one.value);
+
+ res = dc_fixpt_from_int(INT_MAX);
+ KUNIT_EXPECT_EQ(test, res.value, 0x7FFFLL);
+
+ res = dc_fixpt_from_int(INT_MIN);
+ KUNIT_EXPECT_EQ(test, res.value,
+ 0x8000LL); /* implicit negative signal */
+}
+
+/**
+ * dc
[PATCH v2 0/8] drm/amd/display: Introduce KUnit to Display Mode Library
Hello,
This series is version 2 of the introduction of unit testing to the
AMDPGU driver [1].
Our main goal is to bring unit testing to the AMD display driver; in
particular, we'll focus on the Display Mode Library (DML) for DCN2.0,
DMUB, and some of the DCE functions. This implementation intends to
help developers to recognize bugs before they are merged into the
mainline and also makes it possible for future code refactors of the
AMD display driver.
For the implementation of the tests, we decided to go with the Kernel
Unit Testing Framework (KUnit). KUnit makes it possible to run test
suites on kernel boot or load the tests as a module. It reports all test
case results through a TAP (Test Anything Protocol) in the kernel log.
Moreover, KUnit unifies the test structure and provides tools to
simplify the testing for developers and CI systems.
In regards to CI pipelines, we believe kunit_tool [2] provides
ease of use, but we are also working on integrating KUnit into IGT.
In this second version, we've chosen a mix of approaches to integrate
KUnit tests into amdgpu:
1. Tests that use static functions are included through guards [3].
2. Tests without static functions are included through a Makefile.
We understand that testing static functions is not ideal, but taking into
consideration that this driver relies heavily on static functions with
complex behavior which would benefit from unit testing, otherwise, black-box
tested through public functions with dozens of arguments and sometimes high
cyclomatic complexity.
The first seven patches represent what we intend to do for the rest of the
DML modules: systematic testing of the DML functions, especially mathematically
complicated functions. Also, it shows how simple it is to add new tests to the
DML.
Among the tests, we highlight the dcn20_fpu_test, which, had it existed
then, could catch the defects introduced to dcn20_fpu.c by 8861c27a6c [4]
later fixed by 9ad5d02c2a [5].
In this series, there's also an example of how unit tests can help avoid
regressions and keep track of changes in behavior.
Applying this series on top of the amd-staging-drm-next (787df47adb1f)
and running its tests will fail the `dc_dmub_srv` test, you can verify
that with:
$ ./tools/testing/kunit/kunit.py run --arch=x86_64 \
--kunitconfig=drivers/gpu/drm/amd/display/tests
```
...
[17:37:28] # Subtest: populate_subvp_cmd_drr_info_test
[17:37:28] # populate_subvp_cmd_drr_info_test: pass:0 fail:5 skip:0 total:5
[17:37:28] not ok 1 - populate_subvp_cmd_drr_info_test
[17:37:28] [FAILED] populate_subvp_cmd_drr_info_test =
[17:37:28] # Subtest: dc_dmub_srv
[17:37:28] 1..1
[17:37:28] # Totals: pass:0 fail:5 skip:0 total:5
[17:37:28] not ok 4 - dc_dmub_srv
[17:37:28] === [FAILED] dc_dmub_srv ===
[17:37:28]
[17:37:28] Testing complete. Passed: 88, Failed: 5, Crashed: 0, Skipped: 0,
Errors: 0
```
Full output at: https://pastebin.com/PfmbXAJ9
This is due to a known regression introduced by commit 5da7f4134357
("drm/amd/display: fix 32 bit compilation errors in dc_dmub_srv.c")
[6], which resulted in the struct's members being zero. As an
exercise, you can revert the offending patch, run the tests again, and
the test-series will result in success.
```
[17:41:44] Testing complete. Passed: 93, Failed: 0, Crashed: 0, Skipped: 0,
Errors: 0
```
Full successful output: https://pastebin.com/Nn2rRRkd
This series depends on a couple of KUnit patches already merged into
torvalds/master, which themselves depend on older patches:
commit 61695f8c5d51 ("kunit: split resource API from test.h into new
resource.h")
commit 2852ca7fba9f ("panic: Taint kernel if tests are run")
commit cfc1d277891e ("module: Move all into module/")
commit cdebea6968fa ("kunit: split resource API impl from test.c into new
resource.c")
commit cae56e1740f5 ("kunit: rename print_subtest_{start,end} for clarity
(s/subtest/suite)")
commit 1cdba21db2ca ("kunit: add ability to specify suite-level init and exit
functions")
commit c272612cb4a2 ("kunit: Taint the kernel when KUnit tests are run")
commit 3d6e44623841 ("kunit: unify module and builtin suite definitions")
commit a02353f49162 ("kunit: bail out of test filtering logic quicker if OOM")
commit 1b11063d32d7 ("kunit: fix executor OOM error handling logic on non-UML")
commit e5857d396f35 ("kunit: flatten kunit_suite*** to kunit_suite** in
.kunit_test_suites")
commit 94681e289bf5 ("kunit: executor: Fix a memory leak on failure in
kunit_filter_tests")
Thanks in advance for your time taking a look and sending any feedback!
Best regards,
Isabella Basso, Magali Lemes, Maíra Canal, and Tales Aparecida`
[1]
https://summerofcode.withgoogle.com/programs/2022/organizations/xorg-foundation
[2] https://www.kernel.o
Re: [PATCH v2] drm/amd: remove duplicated argument to &
Hi Bernard
On 8/23/22 04:14, Bernard Zhao wrote:
This patch trf to fis cocci warning:
I believe that there are a couple of typos on this description. Maybe
you could fixed to s/trf/try and s/fis/fix.
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c:
2349:8-34: duplicated argument to && or ||
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c:
3680:8-55: duplicated argument to && or ||
Signed-off-by: Bernard Zhao
Also, it would be nice to have a changelog between the versions.
Other than those small nits,
Reviewed-by: Maíra Canal
Best Regards,
- Maíra Canal
---
.../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c| 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index cb2025771646..f99c1696a1f6 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -2346,8 +2346,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
if (mode_lib->vba.DSCEnable[k] && mode_lib->vba.ForcedOutputLinkBPP[k] != 0)
mode_lib->vba.DSCOnlyIfNecessaryWithBPP = true;
- if ((mode_lib->vba.DSCEnable[k] ||
mode_lib->vba.DSCEnable[k])
- && mode_lib->vba.OutputFormat[k] ==
dm_n422
+ if (mode_lib->vba.DSCEnable[k] &&
mode_lib->vba.OutputFormat[k] == dm_n422
&& !mode_lib->vba.DSC422NativeSupport)
mode_lib->vba.DSC422NativeNotSupported = true;
@@ -3678,7 +3677,6 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
if (mode_lib->vba.SourcePixelFormat[k] != dm_444_64
&& mode_lib->vba.SourcePixelFormat[k]
!= dm_444_32
&& mode_lib->vba.SourcePixelFormat[k]
!= dm_444_16
- && mode_lib->vba.SourcePixelFormat[k]
!= dm_444_16
&& mode_lib->vba.SourcePixelFormat[k]
!= dm_444_8
&& mode_lib->vba.SourcePixelFormat[k]
!= dm_rgbe) {
if (mode_lib->vba.ViewportWidthChroma[k] >
mode_lib->vba.SurfaceWidthC[k]
Re: [BUG][5.20] refcount_t: underflow; use-after-free
On 8/17/22 17:57, Mikhail Gavrilov wrote:
> On Wed, Aug 17, 2022 at 11:43 PM Maíra Canal wrote:
>>
>> Hi Mikhail,
>>
>> Looks like 45ecaea738830b9d521c93520c8f201359dcbd95 ("drm/sched: Partial
>> revert of 'drm/sched: Keep s_fence->parent pointer'") introduced the
>> error. Try reverting it and check if the use-after-free still happens.
>
> Thanks, but unfortunately, this did not lead to the expected result.
> Again happens use-after-free in an incomprehensible context.
> From the new: added warning "suspicious RCU usage" but it looks like
> it is completely not related to the use-after-free issue.
>
Hi Mikhail,
Could you please specify the steps to reproduce this use-after-free? I
will try to reproduce it on the RX5700 XT and bisect the issue.
Best Regards,
- Maíra Canal
> [ 215.434115] [ cut here ]
> [ 215.434184] refcount_t: underflow; use-after-free.
> [ 215.434204] WARNING: CPU: 7 PID: 1258 at lib/refcount.c:28
> refcount_warn_saturate+0xba/0x110
> [ 215.434214] Modules linked in: uinput rfcomm snd_seq_dummy
> snd_hrtimer nft_objref nf_conntrack_netbios_ns nf_conntrack_broadcast
> nft_fib_inet nft_fib_ipv4 nft_fib_ipv6 nft_fib nft_reject_inet
> nf_reject_ipv4 nf_reject_ipv6 nft_reject nft_ct nft_chain_nat nf_nat
> nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 ip_set nf_tables nfnetlink
> qrtr bnep sunrpc binfmt_misc snd_seq_midi snd_seq_midi_event
> intel_rapl_msr intel_rapl_common snd_hda_codec_realtek vfat
> snd_hda_codec_generic snd_hda_codec_hdmi mt76x2u fat mt76x2_common
> snd_hda_intel mt76x02_usb snd_intel_dspcfg snd_intel_sdw_acpi mt76_usb
> iwlmvm edac_mce_amd snd_usb_audio snd_hda_codec mt76x02_lib
> snd_hda_core snd_usbmidi_lib snd_hwdep snd_rawmidi uvcvideo mt76
> kvm_amd snd_seq videobuf2_vmalloc videobuf2_memops snd_seq_device
> mac80211 videobuf2_v4l2 videobuf2_common kvm btusb iwlwifi snd_pcm
> btrtl videodev libarc4 eeepc_wmi btbcm asus_wmi iwlmei btintel
> ledtrig_audio xpad irqbypass sparse_keymap btmtk platform_profile
> joydev
> [ 215.434436] hid_logitech_hidpp rapl ff_memless mc snd_timer
> bluetooth cfg80211 video pcspkr wmi_bmof snd soundcore k10temp
> i2c_piix4 rfkill mei asus_ec_sensors acpi_cpufreq zram amdgpu
> drm_ttm_helper ttm iommu_v2 ucsi_ccg gpu_sched crct10dif_pclmul
> crc32_pclmul typec_ucsi drm_buddy crc32c_intel ghash_clmulni_intel ccp
> igb sp5100_tco typec drm_display_helper nvme dca nvme_core cec wmi
> ip6_tables ip_tables fuse
> [ 215.434528] Unloaded tainted modules: amd64_edac():1 amd64_edac():1
> amd64_edac():1 amd64_edac():1 amd64_edac():1 amd64_edac():1
> amd64_edac():1 amd64_edac():1 amd64_edac():1 amd64_edac():1
> amd64_edac():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
> pcc_cpufreq():1 amd64_edac():1 amd64_edac():1 pcc_cpufreq():1
> pcc_cpufreq():1 amd64_edac():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1
> amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1
> pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1
> pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1
> pcc_cpufreq():1 pcc_cpufreq():1 pcc_cpufreq():1 fjes():1
> [ 215.434672] pcc_cpufreq():1 fjes():1 pcc_cpufreq():1 fjes():1
> pcc_cpufreq():1 fjes():1 fjes():1 fjes():1 fjes():1 fjes():1
> [ 215.434702] CPU: 7 PID: 1258 Comm: kworker/7:3 Tainted: G W L
> --- --- 6.0.0-0.rc1.20220817git3cc40a443a04.14.fc38.x86_64 #1
> [ 215.434709] Hardware name: System manufacturer System Product
> Name/ROG STRIX X570-I GAMING, BIOS 4403 04/27/2022
> [ 215.434715] Workqueue: events drm_sched_entity_kill_jobs_work [gpu_sched]
> [ 215.434728] RIP: 0010:refcount_warn_saturate+0xba/0x110
> [ 215.434734] Code: 01 01 e8 59 59 6f 00 0f 0b e9 22 46 a5 00 80 3d be
> 7d be 01 00 75 85 48 c7 c7 c0 99 8e 92 c6 05 ae 7d be 01 01 e8 36 59
> 6f 00 <0f> 0b e9 ff 45 a5 00 80 3d 99 7d be 01 00 0f 85 5e ff ff ff 48
> c7
> [ 215.434740] RSP: 0018:9ccb0237fe60 EFLAGS: 00010286
> [ 215.434747] RAX: 0026 RBX: 8d531f6f2828 RCX:
>
> [ 215.434753] RDX: 0001 RSI: 928d07a4 RDI:
>
> [ 215.434757] RBP: 8d61e47f5600 R08: R09:
> 9ccb0237fd10
> [ 215.434762] R10: 0003 R11: 8d622e2fffe8 R12:
> 8d61e47fc800
> [ 215.434767] R13: 8d5313e95500 R14: 8d61e47fc805 R15:
> 8d531f6f2830
&g
Re: [PATCH] drm/amd/display: fix i386 frame size warning
Hi Hamza,
On 8/18/22 13:48, Hamza Mahfooz wrote:
> Addresses the following warning:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3596:6:
> error: stack frame size (2092) exceeds limit (2048) in
> 'dml30_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
> void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
> *mode_lib)
> ^
Could you please specify how you generated this error? I was trying to
test the patch and I couldn't reproduce this error on i386.
I ran on amd-staging-drm-next without your patch:
$ make -skj"$(nproc)" ARCH=i386 LLVM=1 mrproper allmodconfig
drivers/gpu/drm/amd/amdgpu/
which didn't generated warnings on display_mode_vba_30.
Moreover, I applied your patch on amd-staging-drm-next and ran:
$ make -skj"$(nproc)" ARCH=x86_64 LLVM=1 mrproper allmodconfig
drivers/gpu/drm/amd/amdgpu/
and I still get the warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3542:6:
error: stack frame size (2184) exceeds limit (2048) in
'dml30_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
*mode_lib)
^
1 error generated.
Best Regards,
- Maíra Canal
>
> UseMinimumDCFCLK() is eating away at
> dml30_ModeSupportAndSystemConfigurationFull()'s stack space, so use a
> pointer to struct vba_vars_st instead of passing lots of large arrays
> as parameters by value.
>
> Signed-off-by: Hamza Mahfooz
> ---
> .../dc/dml/dcn30/display_mode_vba_30.c| 295 --
> 1 file changed, 63 insertions(+), 232 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> index 876b321b30ca..b7fa003ffe06 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> @@ -396,64 +396,10 @@ static void CalculateUrgentBurstFactor(
>
> static void UseMinimumDCFCLK(
> struct display_mode_lib *mode_lib,
> - int MaxInterDCNTileRepeaters,
> + struct vba_vars_st *v,
> int MaxPrefetchMode,
> - double FinalDRAMClockChangeLatency,
> - double SREnterPlusExitTime,
> - int ReturnBusWidth,
> - int RoundTripPingLatencyCycles,
> - int ReorderingBytes,
> - int PixelChunkSizeInKByte,
> - int MetaChunkSize,
> - bool GPUVMEnable,
> - int GPUVMMaxPageTableLevels,
> - bool HostVMEnable,
> - int NumberOfActivePlanes,
> - double HostVMMinPageSize,
> - int HostVMMaxNonCachedPageTableLevels,
> - bool DynamicMetadataVMEnabled,
> - enum immediate_flip_requirement ImmediateFlipRequirement,
> - bool ProgressiveToInterlaceUnitInOPP,
> - double
> MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation,
> - double
> PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
> - double
> PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
> - double
> PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly,
> - int VTotal[],
> - int VActive[],
> - int DynamicMetadataTransmittedBytes[],
> - int DynamicMetadataLinesBeforeActiveRequired[],
> - bool Interlace[],
> - double RequiredDPPCLK[][2][DC__NUM_DPP__MAX],
> - double RequiredDISPCLK[][2],
> - double UrgLatency[],
> - unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX],
> - double ProjectedDCFCLKDeepSleep[][2],
> - double MaximumVStartup[][2][DC__NUM_DPP__MAX],
> - double TotalVActivePixelBandwidth[][2],
> - double TotalVActiveCursorBandwidth[][2],
> - double TotalMetaRowBandwidth[][2],
> - double TotalDPTERowBandwidth[][2],
> - unsigned int TotalNumberOfActiveDPP[][2],
> - unsigned int TotalNumberOfDCCActiveDPP[][2],
> - int dpte_group_bytes[],
> - double PrefetchLinesY[][2][DC__NUM_DPP__MAX],
> - double PrefetchLinesC[][2][DC__NUM_DPP__MAX],
> - unsigned int
> swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX],
> - unsigned int
> swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX],
> - int BytePerPixelY[],
> - int BytePerPixelC[],
> - int HTotal[],
> -
[PATCH] drm/amd/display: Include missing header
The file amdgpu_dm_plane.c missed the header amdgpu_dm_plane.h, which
resulted on the following warning:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:1046:5:
warning: no previous prototype for 'fill_dc_scaling_info'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:1222:6:
warning: no previous prototype for 'handle_cursor_update'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:152:6:
warning: no previous prototype for 'modifier_has_dcc'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:1576:5:
warning: no previous prototype for 'amdgpu_dm_plane_init'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:157:10:
warning: no previous prototype for 'modifier_gfx9_swizzle_mode'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:752:5:
warning: no previous prototype for 'fill_plane_buffer_attributes'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:83:31:
warning: no previous prototype for 'amd_get_format_info'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:88:6:
warning: no previous prototype for 'fill_blending_from_plane_state'
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:992:5:
warning: no previous prototype for 'dm_plane_helper_check_state'
[-Wmissing-prototypes]
Therefore, include the missing header on the file and turn global functions
that are not used outside of the file into static functions.
Fixes: 5d945cbcd4b1 ("drm/amd/display: Create a file dedicated to planes")
Reported-by: kernel test robot
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 5 +++--
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h | 8
2 files changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index b841b8b0a9d8..e022be4df290 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -34,6 +34,7 @@
#include "dal_asic_id.h"
#include "amdgpu_display.h"
#include "amdgpu_dm_trace.h"
+#include "amdgpu_dm_plane.h"
#include "gc/gc_11_0_0_offset.h"
#include "gc/gc_11_0_0_sh_mask.h"
@@ -149,12 +150,12 @@ static void add_modifier(uint64_t **mods, uint64_t *size,
uint64_t *cap, uint64_
*size += 1;
}
-bool modifier_has_dcc(uint64_t modifier)
+static bool modifier_has_dcc(uint64_t modifier)
{
return IS_AMD_FMT_MOD(modifier) && AMD_FMT_MOD_GET(DCC, modifier);
}
-unsigned modifier_gfx9_swizzle_mode(uint64_t modifier)
+static unsigned modifier_gfx9_swizzle_mode(uint64_t modifier)
{
if (modifier == DRM_FORMAT_MOD_LINEAR)
return 0;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
index 95168c2cfa6f..286981a2dd40 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
@@ -36,17 +36,9 @@ int fill_dc_scaling_info(struct amdgpu_device *adev,
const struct drm_plane_state *state,
struct dc_scaling_info *scaling_info);
-void get_min_max_dc_plane_scaling(struct drm_device *dev,
- struct drm_framebuffer *fb,
- int *min_downscale, int *max_upscale);
-
int dm_plane_helper_check_state(struct drm_plane_state *state,
struct drm_crtc_state *new_crtc_state);
-bool modifier_has_dcc(uint64_t modifier);
-
-unsigned int modifier_gfx9_swizzle_mode(uint64_t modifier);
-
int fill_plane_buffer_attributes(struct amdgpu_device *adev,
const struct amdgpu_framebuffer *afb,
const enum surface_pixel_format format,
--
2.37.2
Re: [BUG][5.20] refcount_t: underflow; use-after-free
On 8/17/22 14:44, Mikhail Gavrilov wrote:
On Wed, Aug 17, 2022 at 9:08 PM Melissa Wen wrote:
Hi Mikhail,
IIUC, you got this second user-after-free by applying the first version
of Maíra's patch, right? So, that version was adding another unbalanced
unlock to the cs ioctl flow, but it was solved in the latest version,
that you can find here: https://patchwork.freedesktop.org/patch/497680/
If this is the situation, can you check this last version?
Thanks,
Melissa
With the last version warning "bad unlock balance detected!" was gone,
but the user-after-free issue remains.
And again "Workqueue: events drm_sched_entity_kill_jobs_work [gpu_sched]".
Hi Mikhail,
Looks like 45ecaea738830b9d521c93520c8f201359dcbd95 ("drm/sched: Partial
revert of 'drm/sched: Keep s_fence->parent pointer'") introduced the
error. Try reverting it and check if the use-after-free still happens.
Best Regards,
- Maíra Canal
[ 297.834779] [ cut here ]
[ 297.834818] refcount_t: underflow; use-after-free.
[ 297.834831] WARNING: CPU: 30 PID: 2377 at lib/refcount.c:28
refcount_warn_saturate+0xba/0x110
[ 297.834838] Modules linked in: uinput rfcomm snd_seq_dummy
snd_hrtimer nft_objref nf_conntrack_netbios_ns nf_conntrack_broadcast
nft_fib_inet nft_fib_ipv4 nft_fib_ipv6 nft_fib nft_reject_inet
nf_reject_ipv4 nf_reject_ipv6 nft_reject nft_ct nft_chain_nat nf_nat
nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 ip_set nf_tables nfnetlink
qrtr bnep sunrpc binfmt_misc snd_seq_midi snd_seq_midi_event mt76x2u
mt76x2_common mt76x02_usb mt76_usb mt76x02_lib snd_hda_codec_realtek
iwlmvm intel_rapl_msr snd_hda_codec_generic snd_hda_codec_hdmi mt76
vfat fat snd_hda_intel intel_rapl_common mac80211 snd_intel_dspcfg
snd_intel_sdw_acpi snd_usb_audio snd_hda_codec snd_usbmidi_lib btusb
edac_mce_amd iwlwifi libarc4 uvcvideo snd_hda_core btrtl snd_rawmidi
snd_hwdep videobuf2_vmalloc btbcm kvm_amd videobuf2_memops snd_seq
iwlmei btintel videobuf2_v4l2 eeepc_wmi snd_seq_device
videobuf2_common btmtk kvm xpad videodev joydev irqbypass snd_pcm
asus_wmi hid_logitech_hidpp ff_memless cfg80211 bluetooth rapl mc
[ 297.834932] ledtrig_audio snd_timer sparse_keymap platform_profile
wmi_bmof snd video pcspkr k10temp i2c_piix4 rfkill soundcore mei
asus_ec_sensors acpi_cpufreq zram amdgpu drm_ttm_helper ttm
crct10dif_pclmul crc32_pclmul crc32c_intel iommu_v2 ucsi_ccg gpu_sched
typec_ucsi drm_buddy ghash_clmulni_intel drm_display_helper ccp igb
typec sp5100_tco nvme cec nvme_core dca wmi ip6_tables ip_tables fuse
[ 297.834978] Unloaded tainted modules: amd64_edac():1 amd64_edac():1
amd64_edac():1 amd64_edac():1 amd64_edac():1 amd64_edac():1
amd64_edac():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1
amd64_edac():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 amd64_edac():1
pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
amd64_edac():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1
amd64_edac():1 amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1
amd64_edac():1 pcc_cpufreq():1 amd64_edac():1 amd64_edac():1
pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
pcc_cpufreq():1 pcc_cpufreq():1 pcc_cpufreq():1 fjes():1
[ 297.835055] pcc_cpufreq():1 fjes():1 pcc_cpufreq():1 fjes():1
pcc_cpufreq():1 fjes():1 fjes():1 fjes():1 fjes():1 fjes():1
[ 297.835071] CPU: 30 PID: 2377 Comm: kworker/30:6 Tainted: G
WL--- ---
6.0.0-0.rc1.20220817git3cc40a443a04.14.fc38.x86_64 #1
[ 297.835075] Hardware name: System manufacturer System Product
Name/ROG STRIX X570-I GAMING, BIOS 4403 04/27/2022
[ 297.835078] Workqueue: events drm_sched_entity_kill_jobs_work [gpu_sched]
[ 297.835085] RIP: 0010:refcount_warn_saturate+0xba/0x110
[ 297.835088] Code: 01 01 e8 59 59 6f 00 0f 0b e9 22 46 a5 00 80 3d
be 7d be 01 00 75 85 48 c7 c7 c0 99 8e aa c6 05 ae 7d be 01 01 e8 36
59 6f 00 <0f> 0b e9 ff 45 a5 00 80 3d 99 7d be 01 00 0f 85 5e ff ff ff
48 c7
[ 297.835091] RSP: 0018:bd3506df7e60 EFLAGS: 00010286
[ 297.835095] RAX: 0026 RBX: 961b250cbc28 RCX:
[ 297.835097] RDX: 0001 RSI: aa8d07a4 RDI:
[ 297.835100] RBP: 96276a3f5600 R08: R09: bd3506df7d10
[ 297.835102] R10: 0003 R11: 9627ae2fffe8 R12: 96276a3fc800
[ 297.835105] R13: 9618c03e6600 R14: 96276a3fc805 R15: 961b250cbc30
[ 297.835108] FS: () GS:96276a20()
knlGS:
[ 297.835110] CS: 0010 DS: ES: CR0: 80050033
[ 297.835113] CR2: 621001e4a000 CR3: 00018d958000 CR4: 000
[PATCH] drm/amdgpu: Fix use-after-free on amdgpu_bo_list mutex
If amdgpu_cs_vm_handling returns r != 0, then it will unlock the
bo_list_mutex inside the function amdgpu_cs_vm_handling and again on
amdgpu_cs_parser_fini. This problem results in the following
use-after-free problem:
[ 220.280990] [ cut here ]
[ 220.281000] refcount_t: underflow; use-after-free.
[ 220.281019] WARNING: CPU: 1 PID: 3746 at lib/refcount.c:28
refcount_warn_saturate+0xba/0x110
[ 220.281029] [ cut here ]
[ 220.281415] CPU: 1 PID: 3746 Comm: chrome:cs0 Tainted: G W L --- ---
5.20.0-0.rc0.20220812git7ebfc85e2cd7.10.fc38.x86_64 #1
[ 220.281421] Hardware name: System manufacturer System Product Name/ROG STRIX
X570-I GAMING, BIOS 4403 04/27/2022
[ 220.281426] RIP: 0010:refcount_warn_saturate+0xba/0x110
[ 220.281431] Code: 01 01 e8 79 4a 6f 00 0f 0b e9 42 47 a5 00 80 3d de
7e be 01 00 75 85 48 c7 c7 f8 98 8e 98 c6 05 ce 7e be 01 01 e8 56 4a
6f 00 <0f> 0b e9 1f 47 a5 00 80 3d b9 7e be 01 00 0f 85 5e ff ff ff 48
c7
[ 220.281437] RSP: 0018:b4b0d18d7a80 EFLAGS: 00010282
[ 220.281443] RAX: 0026 RBX: 0003 RCX:
[ 220.281448] RDX: 0001 RSI: 988d06dc RDI:
[ 220.281452] RBP: R08: R09: b4b0d18d7930
[ 220.281457] R10: 0003 R11: a0672e2fffe8 R12: a058ca360400
[ 220.281461] R13: a05846c50a18 R14: fe00 R15: 0003
[ 220.281465] FS: 7f82683e06c0() GS:a066e2e0()
knlGS:
[ 220.281470] CS: 0010 DS: ES: CR0: 80050033
[ 220.281475] CR2: 3590005cc000 CR3: 0001fca46000 CR4: 00350ee0
[ 220.281480] Call Trace:
[ 220.281485]
[ 220.281490] amdgpu_cs_ioctl+0x4e2/0x2070 [amdgpu]
[ 220.281806] ? amdgpu_cs_find_mapping+0xe0/0xe0 [amdgpu]
[ 220.282028] drm_ioctl_kernel+0xa4/0x150
[ 220.282043] drm_ioctl+0x21f/0x420
[ 220.282053] ? amdgpu_cs_find_mapping+0xe0/0xe0 [amdgpu]
[ 220.282275] ? lock_release+0x14f/0x460
[ 220.282282] ? _raw_spin_unlock_irqrestore+0x30/0x60
[ 220.282290] ? _raw_spin_unlock_irqrestore+0x30/0x60
[ 220.282297] ? lockdep_hardirqs_on+0x7d/0x100
[ 220.282305] ? _raw_spin_unlock_irqrestore+0x40/0x60
[ 220.282317] amdgpu_drm_ioctl+0x4a/0x80 [amdgpu]
[ 220.282534] __x64_sys_ioctl+0x90/0xd0
[ 220.282545] do_syscall_64+0x5b/0x80
[ 220.282551] ? futex_wake+0x6c/0x150
[ 220.282568] ? lock_is_held_type+0xe8/0x140
[ 220.282580] ? do_syscall_64+0x67/0x80
[ 220.282585] ? lockdep_hardirqs_on+0x7d/0x100
[ 220.282592] ? do_syscall_64+0x67/0x80
[ 220.282597] ? do_syscall_64+0x67/0x80
[ 220.282602] ? lockdep_hardirqs_on+0x7d/0x100
[ 220.282609] entry_SYSCALL_64_after_hwframe+0x63/0xcd
[ 220.282616] RIP: 0033:0x7f8282a4f8bf
[ 220.282639] Code: 00 48 89 44 24 18 31 c0 48 8d 44 24 60 c7 04 24 10
00 00 00 48 89 44 24 08 48 8d 44 24 20 48 89 44 24 10 b8 10 00 00 00
0f 05 <89> c2 3d 00 f0 ff ff 77 18 48 8b 44 24 18 64 48 2b 04 25 28 00
00
[ 220.282644] RSP: 002b:7f82683df410 EFLAGS: 0246 ORIG_RAX:
0010
[ 220.282651] RAX: ffda RBX: 7f82683df588 RCX: 7f8282a4f8bf
[ 220.282655] RDX: 7f82683df4d0 RSI: c0186444 RDI: 0018
[ 220.282659] RBP: 7f82683df4d0 R08: 7f82683df5e0 R09: 7f82683df4b0
[ 220.282663] R10: 1d04000a0600 R11: 0246 R12: c0186444
[ 220.282667] R13: 0018 R14: 7f82683df588 R15: 0003
[ 220.282689]
[ 220.282693] irq event stamp: 6232311
[ 220.282697] hardirqs last enabled at (6232319): []
__up_console_sem+0x5e/0x70
[ 220.282704] hardirqs last disabled at (6232326): []
__up_console_sem+0x43/0x70
[ 220.282709] softirqs last enabled at (6232072): []
__irq_exit_rcu+0xf9/0x170
[ 220.282716] softirqs last disabled at (6232061): []
__irq_exit_rcu+0xf9/0x170
[ 220.282722] ---[ end trace ]---
Therefore, remove the mutex_unlock from the amdgpu_cs_vm_handling
function, so that amdgpu_cs_submit and amdgpu_cs_parser_fini can handle
the unlock.
Fixes: 90af0ca047f3 ("drm/amdgpu: Protect the amdgpu_bo_list list with a mutex
v2")
Reported-by: Mikhail Gavrilov
Signed-off-by: Maíra Canal
---
Thanks Melissa and Christian for the feedback on mutex_unlock.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index d8f1335bc68f..b7bae833c804 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -837,16 +837,12 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser
*p)
continue;
r = amdgpu_vm_bo_update(adev, bo_va, false);
- if (r) {
- mutex_unlock(>bo_list->bo_list_mutex);
+ if (r)
return r;
- }
r = amdgpu_sync_fence(>j
Re: [BUG][5.20] refcount_t: underflow; use-after-free
Hi Mikhail
Looks like this use-after-free problem was introduced on
90af0ca047f3049c4b46e902f432ad6ef1e2ded6. Checking this patch it seems
like: if amdgpu_cs_vm_handling return r != 0, then it will unlock
bo_list_mutex inside the function amdgpu_cs_vm_handling and again on
amdgpu_cs_parser_fini.
Maybe the following patch will help:
---
>From 71d718c0f53a334bb59bcd5dabd29bbe92c724af Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ma=C3=ADra=20Canal?=
Date: Sun, 14 Aug 2022 21:12:24 -0300
Subject: [PATCH] drm/amdgpu: Fix use-after-free on amdgpu_bo_list mutex
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Fixes: 90af0ca047f3 ("drm/amdgpu: Protect the amdgpu_bo_list list with a
mutex v2")
Reported-by: Mikhail Gavrilov
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index d8f1335bc68f..a7fce7b14321 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -837,17 +837,14 @@ static int amdgpu_cs_vm_handling(struct
amdgpu_cs_parser *p)
continue;
r = amdgpu_vm_bo_update(adev, bo_va, false);
- if (r) {
- mutex_unlock(>bo_list->bo_list_mutex);
+ if (r)
return r;
- }
r = amdgpu_sync_fence(>job->sync, bo_va->last_pt_update);
- if (r) {
- mutex_unlock(>bo_list->bo_list_mutex);
+ if (r)
return r;
- }
}
+ mutex_unlock(>bo_list->bo_list_mutex);
r = amdgpu_vm_handle_moved(adev, vm);
if (r)
--
2.37.1
---
Best Regards,
- Maíra Canal
On 8/14/22 18:11, Mikhail Gavrilov wrote:
> Hi folks.
> Joined testing 5.20 today (7ebfc85e2cd7).
> I encountered a frequently GPU freeze, after which a message appears
> in the kernel logs:
> [ 220.280990] [ cut here ]
> [ 220.281000] refcount_t: underflow; use-after-free.
> [ 220.281019] WARNING: CPU: 1 PID: 3746 at lib/refcount.c:28
> refcount_warn_saturate+0xba/0x110
> [ 220.281029] Modules linked in: uinput rfcomm snd_seq_dummy
> snd_hrtimer nft_objref nf_conntrack_netbios_ns nf_conntrack_broadcast
> nft_fib_inet nft_fib_ipv4 nft_fib_ipv6 nft_fib nft_reject_inet
> nf_reject_ipv4 nf_reject_ipv6 nft_reject nft_ct nft_chain_nat nf_nat
> nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 ip_set nf_tables nfnetlink
> qrtr bnep sunrpc snd_seq_midi snd_seq_midi_event vfat intel_rapl_msr
> fat intel_rapl_common snd_hda_codec_realtek mt76x2u
> snd_hda_codec_generic snd_hda_codec_hdmi mt76x2_common iwlmvm
> mt76x02_usb edac_mce_amd mt76_usb snd_hda_intel snd_intel_dspcfg
> mt76x02_lib snd_intel_sdw_acpi snd_usb_audio snd_hda_codec mt76
> kvm_amd uvcvideo mac80211 snd_hda_core btusb eeepc_wmi snd_usbmidi_lib
> videobuf2_vmalloc videobuf2_memops kvm btrtl snd_rawmidi asus_wmi
> snd_hwdep videobuf2_v4l2 btbcm iwlwifi ledtrig_audio libarc4 btintel
> snd_seq videobuf2_common sparse_keymap btmtk irqbypass videodev
> snd_seq_device joydev xpad iwlmei platform_profile bluetooth
> ff_memless snd_pcm mc rapl
> [ 220.281185] video snd_timer cfg80211 wmi_bmof snd pcspkr soundcore
> k10temp i2c_piix4 rfkill mei asus_ec_sensors acpi_cpufreq zram
> hid_logitech_hidpp amdgpu igb dca drm_ttm_helper ttm crct10dif_pclmul
> iommu_v2 crc32_pclmul gpu_sched crc32c_intel ucsi_ccg drm_buddy nvme
> typec_ucsi ghash_clmulni_intel drm_display_helper ccp nvme_core typec
> sp5100_tco cec wmi ip6_tables ip_tables fuse
> [ 220.281258] Unloaded tainted modules: amd64_edac():1 amd64_edac():1
> amd64_edac():1 amd64_edac():1 amd64_edac():1 amd64_edac():1
> amd64_edac():1 amd64_edac():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1
> pcc_cpufreq():1 amd64_edac():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1
> pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
> pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
> pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 amd64_edac():1
> pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 amd64_edac():1
> pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 amd64_edac():1
> pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 amd64_edac():1 amd64_edac():1
> pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1 amd64_edac():1
> pcc_cpufreq():1 pcc_cpufreq():1 amd64_edac():1 pcc_cpufreq():1
> amd64_edac():1 pcc_cpufreq():1 pcc_cpufreq():1 pcc_cpufreq():1
> [ 220.281388] pcc_cpufreq():1 fjes():1 pcc_cpufreq():1 fjes():1
> fje
Re: [PATCH 7/8] drm/amd/display: Introduce KUnit tests to dc_dmub_srv library
On 8/11/22 04:37, David Gow wrote:
On Thu, Aug 11, 2022 at 8:41 AM Tales Aparecida
wrote:
From: Maíra Canal
Add unit test to the SubVP feature in order to avoid possible
regressions and assure the code robustness.
Signed-off-by: Maíra Canal
Signed-off-by: Tales Aparecida
---
FYI: This seems to have a dependency issue. See below.
Otherwise, I haven't had a chance to review it properly yet, but I'll
try to take a closer look over the next few days.
Cheers,
-- David
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 4 +
.../amd/display/tests/dc/dc_dmub_srv_test.c | 285 ++
2 files changed, 289 insertions(+)
create mode 100644 drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 2d61c2a91cee..f5dd1f69840e 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -809,3 +809,7 @@ void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv
*dc_dmub_srv)
diag_data.is_cw0_enabled,
diag_data.is_cw6_enabled);
}
+
+#if IS_ENABLED(CONFIG_AMD_DC_BASICS_KUNIT_TEST)
+#include "../tests/dc/dc_dmub_srv_test.c"
+#endif
diff --git a/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
b/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
new file mode 100644
index ..051079cbf65e
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/tests/dc/dc_dmub_srv_test.c
@@ -0,0 +1,285 @@
+// SPDX-License-Identifier: MIT
+/*
+ * KUnit tests for dc_dmub_srv.c
+ *
+ * Copyright (C) 2022, Maíra Canal
+ */
+
+#include
+#include "dc_dmub_srv.h"
+
+struct populate_subvp_cmd_drr_info_test_case {
+ const char *desc;
+ struct dc *dc;
+ struct pipe_ctx *subvp_pipe;
+ struct pipe_ctx *vblank_pipe;
+ const u8 drr_in_use;
+ const u8 drr_window_size_ms;
+ const u16 min_vtotal_supported;
+ const u16 max_vtotal_supported;
+ const u8 use_ramping;
+};
+
+struct populate_subvp_cmd_drr_info_test_case
populate_subvp_cmd_drr_info_cases[] = {
+ {
+ .desc = "Same Clock Frequency",
+ .dc = &(struct dc) {
+ .caps = {
+ .subvp_prefetch_end_to_mall_start_us = 0,
+ }
+ },
+ .subvp_pipe = &(struct pipe_ctx) {
+ .stream = &(struct dc_stream_state) {
+ .timing = {
+ .h_total = 2784,
+ .v_addressable = 1080,
+ .pix_clk_100hz = 1855800,
+ },
+ .mall_stream_config = {
+ .paired_stream = &(struct
dc_stream_state) {
+ .timing = {
+ .h_total = 3600,
+ .v_total = ,
+ .v_addressable = 1080,
+ .v_front_porch = 3,
+ .pix_clk_100hz =
1855800,
+ },
+ },
+ },
+ },
+ },
+ .vblank_pipe = &(struct pipe_ctx) {
+ .stream = &(struct dc_stream_state) {
+ .timing = {
+ .h_total = 2784,
+ .v_total = ,
+ .v_addressable = 1080,
+ .pix_clk_100hz = 1855800,
+ },
+ },
+ },
+ .drr_in_use = true,
+ .use_ramping = false,
+ .drr_window_size_ms = 4,
+ .min_vtotal_supported = 2540,
+ .max_vtotal_supported = 2619,
+ },
+ {
+ .desc = "Same Clock Frequency with Prefetch End to Mall Start",
+ .dc = &(struct dc) {
+ .caps = {
+ .subvp_prefetch_end_to_mall_start_us = 500,
+ }
+ },
+ .subvp_pipe = &(struct pipe_ctx) {
+ .stream = &(struct dc_stream_state) {
+ .timing = {
+ .h_total = 2784,
+ .v_addressable = 1080,
+ .pix_clk_100hz = 1855800,
+ },
+ .m
Re: [PATCH 1/8] drm/amd/display: Introduce KUnit tests for fixed31_32 library
On 8/11/22 04:19, David Gow wrote:
On Thu, Aug 11, 2022 at 11:05 AM 'Daniel Latypov' via KUnit
Development wrote:
On Wed, Aug 10, 2022 at 5:40 PM Tales Aparecida
wrote:
The fixed31_32 library performs a lot of the mathematical operations
involving fixed-point arithmetic and the conversion of integers to
fixed-point representation.
This unit tests intend to assure the proper functioning of the basic
mathematical operations of fixed-point arithmetic, such as
multiplication, conversion from fractional to fixed-point number,
and more. Use kunit_tool to run:
$ ./tools/testing/kunit/kunit.py run --arch=x86_64 \
--kunitconfig=drivers/gpu/drm/amd/display/tests/
Nice, thanks for including a kunitconfig, that'll help a lot.
Just as an FYI: if you're working on top of torvalds/master, I think
you would no longer need --arch=x86_64.
Before, CONFIG_PCI=y was tricky to enable on UML, but commit
6fc3a8636a7b ("kunit: tool: Enable virtio/PCI by default on UML")
landed for 6.0.
I.e. I can run this command on torvalds/master w/ no other patches applied:
$ ./tools/testing/kunit/kunit.py config --kunitconfig=/dev/stdin <
There are still a few issues which prevent these tests from working on
UML I haven't had a chance to go through all of them yet, but I'll
drop a couple of quick responses to some of the individual patches.
The first thing to note is that amdgpu doesn't actually build on UML
at all without:
https://patchwork.kernel.org/project/linux-rdma/patch/20220218075727.2737623-3-david...@google.com/
IIRC, no-one liked spreading !defined(CONFIG_UML) everwhere. Replacing
it with IS_ENABLED(CONFIG_X86) also works, as X86_64 is defined on
UML, but X86 isn't.
The other issues are basically just other missing #ifdef checks or
dependencies. Plus there's a warning on my system even under x86_64
for integer overflow in the MIN_I64 definition.
Currently, we only support the tests to x86_64, as the DC core don't
build to UML yet. In the future, I intend to send the patch that enables
the tests to run on UML, but for the first iteration, we focused in running
the tests on x86.
If you want with UML, you can apply the following patch (which is working in
progress yet):
--
From cac02e5d714d78e1d69995383b818eec26661925 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ma=C3=ADra=20Canal?=
Date: Sat, 23 Jul 2022 14:57:41 -0300
Subject: [PATCH] drm/amdgpu: Enable compilation under UML
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The User-Mode Linux configuration is used by KUnit to execute kernel
results directly. This removes the need for a test machine or a virtual
machine. Therefore, as KUnit tests are being added to AMDGPU, it is
interesting to enable compilation under UML, as it eases running the tests
on CI and developers' machines.
Also, the use of UML is encouraged by the KUnit team [1], as it is considered
a better practice to write tests that run on UML to tests that only run
under a particular architecture.
[1]
https://docs.kernel.org/dev-tools/kunit/usage.html#writing-tests-for-other-architectures
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 6 +++---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 2 +-
drivers/gpu/drm/amd/display/Kconfig | 2 +-
drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c | 8
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 2 +-
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index a5409531a2fd..bbed3284e78e 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -1766,7 +1766,7 @@ static int kfd_fill_mem_info_for_cpu(int numa_node_id,
int *avail_size,
return 0;
}
-#ifdef CONFIG_X86_64
+#if IS_ENABLED(CONFIG_X86)
static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size,
uint32_t *num_entries,
struct crat_subtype_iolink *sub_type_hdr)
@@ -1825,7 +1825,7 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image,
size_t *size)
struct crat_subtype_generic *sub_type_hdr;
int avail_size = *size;
int numa_node_id;
-#ifdef CONFIG_X86_64
+#if IS_ENABLED(CONFIG_X86)
uint32_t entries = 0;
#endif
int ret = 0;
@@ -1890,7 +1890,7 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image,
size_t *size)
sub_type_hdr->length);
/* Fill in Subtype: IO Link */
-#ifdef CONFIG_X86_64
+#if IS_ENABLED(CONFIG_X86)
ret = kfd_fill_iolink_info_for_cpu(numa_node_id, _size,
,
(struct crat_subtype_iolink *)sub_type_hdr);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index 25990bec600d..5f0e58c430a1 100644
--- a/drivers/gp
Re: [PATCH 0/8] drm/amd/display: Introduce KUnit to Display Mode Library
On 8/11/22 08:22, Christian König wrote: Am 11.08.22 um 02:40 schrieb Tales Aparecida: Hello, This series is the consolidation of an RFC sent earlier this year [RFC] bringing unit testing to the AMDPGU driver. [gsoc] Our main goal is to bring unit testing to the AMD display driver; in particular, we'll focus on the Display Mode Library (DML) for DCN2.0, DMUB, and some of the DCE functions. This implementation intends to help developers to recognize bugs before they are merged into the mainline and also makes it possible for future code refactors of the AMD display driver. For the implementation of the tests, we decided to go with the Kernel Unit Testing Framework (KUnit). KUnit makes it possible to run test suites on kernel boot or load the tests as a module. It reports all test case results through a TAP (Test Anything Protocol) in the kernel log. Moreover, KUnit unifies the test structure and provides tools to simplify the testing for developers and CI systems. In regards to CI pipelines, we believe kunit_tool[kunit_tool] provides ease of use, but we are also working on integrating KUnit into IGT, for those already depending on the tool [igt_patch]. We've chosen what we believe to be the simplest approach to integrate KUnit tests into amdgpu [kunit_static]. We took into consideration that this driver relies heavily on static functions with complex behavior which would benefit from unit testing, otherwise, black-box tested through public functions with dozens of arguments and sometimes high cyclomatic complexity. Further than that, this approach also helps beginners by avoiding the need to edit any Makefiles. Other approaches are available and we would gladly receive feedback on this matter. Yeah, that approach immediately trigger goosebumps for me. We should absolutely not do that. The static functions are subject to change and we shouldn't need to change the unit tests when only the internals change. I agree with you that ideally, we should not test static functions. But, considering the scope of the AMD Display Core functions, it is pretty hard to avoid it. Most of the exposed functions on the AMD Display Core have dozens of side effects and some functions pass the 500 lines. In this sense, it is pretty hard to write a proper unit test for the function. If we think through the theory of equivalence partition, when we have two parameters, we have a simple area to analyze the boundary values and the partition. If we have more than 4 parameters, we have a hyperplane with dimension n to analyze, which means that finding the partitions and the boundary values gets harder and harder. In the Display Core, there are static functions with more than 50 parameters and the exposed functions call more the one static function, so we might be analyzing more than 100 parameters, which I don't believe is possible for a unit test. In theory, I agree that we should not test the static functions. But, considering the current scope of the AMD Display code, I don't believe it is viable to test on the exposed functions. Best Regards, - Maíra Canal Instead black box testing and/or exposing tests as a separate module (e.g. for the fixed point calculations for example) is probably the way to go. Just my thoughts on this, essentially our display team has to take a look. Regards, Christian. The first three patches add KUnit represent what we intend to do on the rest of the DML modules: systematic testing of the DML functions, especially mathematically complicated functions. Also, it shows how simple it is to add new tests to the DML. Among the tests, we highlight the dcn20_fpu_test, which, had it existed then, could catch the defects introduced to dcn20_fpu.c by 8861c27a6c [dcn20_bug] later fixed by 9ad5d02c2a [dcn20_fix]. In this series, there's also an example of how unit tests can help avoid regressions and keeping track of changes in behavior. Applying this series on top of the amd-staging-drm-next (2305916dca04) and running its tests will result in a failure in the `dc_dmub_srv` test, you can verify that with: $ ./tools/testing/kunit/kunit.py run --arch=x86_64 \ --kunitconfig=drivers/gpu/drm/amd/display/tests ``` ... [20:19:00] # Subtest: populate_subvp_cmd_drr_info_test [20:19:00] # populate_subvp_cmd_drr_info_test: pass:0 fail:5 skip:0 total:5 [20:19:00] not ok 1 - populate_subvp_cmd_drr_info_test [20:19:00] [FAILED] populate_subvp_cmd_drr_info_test = [20:19:00] # Subtest: dc_dmub_srv [20:19:00] 1..1 [20:19:00] # Totals: pass:0 fail:5 skip:0 total:5 [20:19:00] not ok 8 - dc_dmub_srv [20:19:00] === [FAILED] dc_dmub_srv === [20:19:00] [20:19:00] Testing complete. Passed: 59, Failed: 5, Crashed: 0, Skipped: 0, Errors: 0 ``` Full output at: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fshare.riseup.net%2F
[PATCH] drm/amd/display: Drop XFCEnabled parameter from CalculatePrefetchSchedule
The XFCEnabled parameter from the CalculatePrefetchSchedule function is
not used and is only mentioned in a couple of comments. Therefore,
remove the argument and the comments.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn21/display_mode_vba_21.c| 21 +++
1 file changed, 3 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index 8a7485e21d53..05cbc6968cde 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -120,7 +120,6 @@ static bool CalculatePrefetchSchedule(
unsigned int SwathHeightY,
unsigned int SwathHeightC,
double TWait,
- bool XFCEnabled,
double XFCRemoteSurfaceFlipDelay,
bool ProgressiveToInterlaceUnitInOPP,
double *DSTXAfterScaler,
@@ -673,7 +672,6 @@ static bool CalculatePrefetchSchedule(
unsigned int SwathHeightY,
unsigned int SwathHeightC,
double TWait,
- bool XFCEnabled,
double XFCRemoteSurfaceFlipDelay,
bool ProgressiveToInterlaceUnitInOPP,
double *DSTXAfterScaler,
@@ -910,12 +908,7 @@ static bool CalculatePrefetchSchedule(
TimeForFetchingMetaPTE = dml_max(*Tno_bw + (double)
PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / *PrefetchBandwidth,
dml_max(UrgentExtraLatency +
UrgentLatency * (GPUVMPageTableLevels * (HostVMDynamicLevels + 1) - 1),
LineTime / 4));
} else {
-// 5/30/2018 - This was an optimization requested from Sy but now
NumberOfCursors is no longer a factor
-// so if this needs to be reinstated, then it should be officially
done in the VBA code as well.
-// if (mode_lib->NumberOfCursors > 0 || XFCEnabled)
- TimeForFetchingMetaPTE = LineTime / 4;
-// else
-// TimeForFetchingMetaPTE = 0.0;
+ TimeForFetchingMetaPTE = LineTime / 4;
}
if ((GPUVMEnable == true || DCCEnable == true)) {
@@ -931,11 +924,7 @@ static bool CalculatePrefetchSchedule(
LineTime
/ 4.0)));
} else {
-// See note above dated 5/30/2018
-// if (NumberOfCursors > 0 || XFCEnabled)
- TimeForFetchingRowInVBlank = (LineTime -
TimeForFetchingMetaPTE) / 2.0;
-// else // TODO: Did someone else add this??
-// TimeForFetchingRowInVBlank = 0.0;
+ TimeForFetchingRowInVBlank = (LineTime -
TimeForFetchingMetaPTE) / 2.0;
}
*DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 *
TimeForFetchingMetaPTE / LineTime, 1.0) / 4.0;
@@ -943,11 +932,9 @@ static bool CalculatePrefetchSchedule(
*DestinationLinesToRequestRowInVBlank = dml_ceil(4.0 *
TimeForFetchingRowInVBlank / LineTime, 1.0) / 4.0;
LinesToRequestPrefetchPixelData = *DestinationLinesForPrefetch
-// See note above dated 5/30/2018
-// - ((NumberOfCursors > 0 ||
GPUVMEnable || DCCEnable) ?
- ((GPUVMEnable || DCCEnable) ?
(*DestinationLinesToRequestVMInVBlank + 2 *
*DestinationLinesToRequestRowInVBlank) :
- 0.0); // TODO:
Did someone else add this??
+ 0.0);
if (LinesToRequestPrefetchPixelData > 0) {
@@ -2200,7 +2187,6 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
mode_lib->vba.SwathHeightY[k],
mode_lib->vba.SwathHeightC[k],
TWait,
-
mode_lib->vba.XFCEnabled[k],
mode_lib->vba.XFCRemoteSurfaceFlipDelay,
mode_lib->vba.ProgressiveToInterlaceUnitInOPP,
>DSTXAfterScaler[k],
@@ -3493,7 +3479,6 @@ static noinline void CalculatePrefetchSchedulePerPlane(
locals->SwathHeightYThisState[k],
Re: [PATCH] drm/amd/display: Fix a compilation failure on PowerPC caused by FPU code
Hi Siqueira
On 7/28/22 17:33, Rodrigo Siqueira wrote:
> We got a report from Stephen/Michael that the PowerPC build was failing
> with the following error:
>
> ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float,
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o uses soft float
> ld: failed to merge target specific data of file
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o
>
> This error happened because of the function optc3_set_vrr_m_const. This
> function expects a double as a parameter in a code that is not allowed
> to have FPU operations. After further investigation, it became clear
> that optc3_set_vrr_m_const was never invoked, so we can safely drop this
> function and fix the ld issue.
>
> Cc: Alex Deucher
> Cc: Melissa Wen
> Reported-by: Stephen Rothwell
> Reported-by: Michael Ellerman
> Signed-off-by: Rodrigo Siqueira
> ---
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c| 8
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h| 3 ---
> drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c| 1 -
> drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h | 2 --
> 4 files changed, 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
> b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
> index d072997477dd..1782b9c26cf4 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
> @@ -184,14 +184,6 @@ void optc3_set_dsc_config(struct timing_generator *optc,
> REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 0);
> }
>
> -void optc3_set_vrr_m_const(struct timing_generator *optc,
> - double vtotal_avg)
> -{
> - DC_FP_START();
> - optc3_fpu_set_vrr_m_const(optc, vtotal_avg);
The function optc3_fpu_set_vrr_m_const is only used here, so by deleting
it, the function optc3_fpu_set_vrr_m_const is declared but not used.
Couldn't it be dropped also?
Best Regards,
- Maíra Canal
> - DC_FP_END();
> -}
> -
> void optc3_set_odm_bypass(struct timing_generator *optc,
> const struct dc_crtc_timing *dc_crtc_timing)
> {
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h
> b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h
> index 33bd12f5dc17..dd45a5499b07 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h
> @@ -329,9 +329,6 @@ void optc3_lock_doublebuffer_enable(struct
> timing_generator *optc);
>
> void optc3_lock_doublebuffer_disable(struct timing_generator *optc);
>
> -void optc3_set_vrr_m_const(struct timing_generator *optc,
> - double vtotal_avg);
> -
> void optc3_set_drr_trigger_window(struct timing_generator *optc,
> uint32_t window_start, uint32_t window_end);
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> index 992e56c6907e..eff1f4e17689 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> @@ -281,7 +281,6 @@ static struct timing_generator_funcs dcn32_tg_funcs = {
> .lock_doublebuffer_enable = optc3_lock_doublebuffer_enable,
> .lock_doublebuffer_disable = optc3_lock_doublebuffer_disable,
> .enable_optc_clock = optc1_enable_optc_clock,
> - .set_vrr_m_const = optc3_set_vrr_m_const,
> .set_drr = optc31_set_drr, // TODO: Update to optc32_set_drr
> once FW headers are promoted
> .get_last_used_drr_vtotal = optc2_get_last_used_drr_vtotal,
> .set_vtotal_min_max = optc3_set_vtotal_min_max,
> diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
> b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
> index 62d4683f17a2..4cfa733cf96f 100644
> --- a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
> +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
> @@ -302,8 +302,6 @@ struct timing_generator_funcs {
> int group_idx,
> uint32_t gsl_ready_signal);
> void (*set_out_mux)(struct timing_generator *tg, enum otg_out_mux_dest
> dest);
> - void (*set_vrr_m_const)(struct timing_generator *optc,
> - double vtotal_avg);
> void (*set_drr_trigger_window)(struct timing_generator *optc,
> uint32_t window_start, uint32_t window_end);
> void (*set_vtotal_change_limit)(struct timing_generator *optc,
[PATCH 16/16] drm/amd/display: Remove never used VBA variables
The variables OutputBPP, VTotal_Min,
TotalBandwidthConsumedGBytePerSecond, BandwidthSupport,
dummy_integer_array, dummysinglestring,
SurfaceRequiredDISPCLKWithoutODMCombine, SurfaceRequiredDISPCLK,
MinVoltageLevel, and MaxVoltageLevel are never used. So, remove the
variables entries from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 5eaedc3bf2c8..839f8fde4b47 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -527,7 +527,6 @@ struct vba_vars_st {
unsigned int MinCompressedBufferSizeInKByte;
unsigned int NumberOfActiveSurfaces;
bool ViewportStationary[DC__NUM_DPP__MAX];
- double OutputBPP[DC__NUM_DPP__MAX];
unsigned int GPUVMMinPageSizeKBytes[DC__NUM_DPP__MAX];
bool SynchronizeTimingsFinal;
bool SynchronizeDRRDisplaysForUCLKPStateChangeFinal;
@@ -557,7 +556,6 @@ struct vba_vars_st {
unsigned int HTotal[DC__NUM_DPP__MAX];
unsigned int VTotal[DC__NUM_DPP__MAX];
unsigned int VTotal_Max[DC__NUM_DPP__MAX];
- unsigned int VTotal_Min[DC__NUM_DPP__MAX];
int DPPPerPlane[DC__NUM_DPP__MAX];
double PixelClock[DC__NUM_DPP__MAX];
double PixelClockBackEnd[DC__NUM_DPP__MAX];
@@ -690,12 +688,10 @@ struct vba_vars_st {
/*outputs*/
bool ScaleRatioAndTapsSupport;
bool SourceFormatPixelAndScanSupport;
- double TotalBandwidthConsumedGBytePerSecond;
bool DCCEnabledInAnyPlane;
bool WritebackLatencySupport;
bool WritebackModeSupport;
bool Writeback10bpc420Supported;
- bool BandwidthSupport[DC__VOLTAGE_STATES];
unsigned int TotalNumberOfActiveWriteback;
double CriticalPoint;
double ReturnBWToDCNPerState;
@@ -955,9 +951,7 @@ struct vba_vars_st {
unsigned intdummyinteger9;
unsigned intdummyinteger10;
unsigned intdummyinteger11;
- unsigned intdummy_integer_array[8][DC__NUM_DPP__MAX];
- bool dummysinglestring;
bool SingleDPPViewportSizeSupportPerPlane[DC__NUM_DPP__MAX];
double PlaneRequiredDISPCLKWithODMCombine2To1;
double PlaneRequiredDISPCLKWithODMCombine4To1;
@@ -1248,11 +1242,7 @@ struct vba_vars_st {
unsigned int NotEnoughUrgentLatencyHidingA[DC__VOLTAGE_STATES][2];
double ReadBandwidthSurfaceLuma[DC__NUM_DPP__MAX];
double ReadBandwidthSurfaceChroma[DC__NUM_DPP__MAX];
- double SurfaceRequiredDISPCLKWithoutODMCombine;
- double SurfaceRequiredDISPCLK;
double MinActiveFCLKChangeLatencySupported;
- int MinVoltageLevel;
- int MaxVoltageLevel;
unsigned int TotalNumberOfSingleDPPSurfaces[DC__VOLTAGE_STATES][2];
unsigned int
CompressedBufferSizeInkByteAllStates[DC__VOLTAGE_STATES][2];
unsigned int
DETBufferSizeInKByteAllStates[DC__VOLTAGE_STATES][2][DC__NUM_DPP__MAX];
--
2.37.1
[PATCH 15/16] drm/amd/display: Remove only mencioned once VBA variables
The variables PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE, RefreshRate, FECEnable, ScalerRecoutWidth, MaxNumDP2p0Streams, and MaxNumDP2p0Outputs are only used on assignments, so there values are not used on code. So, remove the variables entries from the struct vba_vars_st. Signed-off-by: Maíra Canal --- .../amd/display/dc/dml/dcn32/display_mode_vba_32.c | 1 - .../gpu/drm/amd/display/dc/dml/display_mode_vba.c | 13 ++--- .../gpu/drm/amd/display/dc/dml/display_mode_vba.h | 6 -- 3 files changed, 2 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index 3c044549c95f..e9c6cc45bfc3 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -3715,7 +3715,6 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l } mode_lib->vba.DSCEnabled[k] = mode_lib->vba.RequiresDSC[mode_lib->vba.VoltageLevel][k]; - mode_lib->vba.FECEnable[k] = mode_lib->vba.RequiresFEC[mode_lib->vba.VoltageLevel][k]; mode_lib->vba.OutputBpp[k] = mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k]; } diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c index 7a4a013f195a..1176a73813aa 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -340,7 +340,6 @@ static void fetch_socbb_params(struct display_mode_lib *mode_lib) mode_lib->vba.SMNLatency = soc->smn_latency_us; mode_lib->vba.MALLAllocatedForDCNFinal = soc->mall_allocated_for_dcn_mbytes; - mode_lib->vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE = soc->pct_ideal_dram_bw_after_urgent_strobe; mode_lib->vba.MaxAveragePercentOfIdealFabricBWDisplayCanUseInNormalSystemOperation = soc->max_avg_fabric_bw_use_normal_percent; mode_lib->vba.MaxAveragePercentOfIdealDRAMBWDisplayCanUseInNormalSystemOperationSTROBE = @@ -441,11 +440,9 @@ static void fetch_ip_params(struct display_mode_lib *mode_lib) mode_lib->vba.CompbufReservedSpaceZs = ip->compbuf_reserved_space_zs; mode_lib->vba.CompressedBufferSegmentSizeInkByteFinal = ip->compressed_buffer_segment_size_in_kbytes; mode_lib->vba.LineBufferSizeFinal = ip->line_buffer_size_bits; - mode_lib->vba.AlphaPixelChunkSizeInKByte = ip->alpha_pixel_chunk_size_kbytes; // not ysed - mode_lib->vba.MinPixelChunkSizeBytes = ip->min_pixel_chunk_size_bytes; // not used + mode_lib->vba.AlphaPixelChunkSizeInKByte = ip->alpha_pixel_chunk_size_kbytes; + mode_lib->vba.MinPixelChunkSizeBytes = ip->min_pixel_chunk_size_bytes; mode_lib->vba.MaximumPixelsPerLinePerDSCUnit = ip->maximum_pixels_per_line_per_dsc_unit; - mode_lib->vba.MaxNumDP2p0Outputs = ip->max_num_dp2p0_outputs; - mode_lib->vba.MaxNumDP2p0Streams = ip->max_num_dp2p0_streams; mode_lib->vba.DCCMetaBufferSizeBytes = ip->dcc_meta_buffer_size_bytes; mode_lib->vba.PixelChunkSizeInKByte = ip->pixel_chunk_size_kbytes; @@ -560,7 +557,6 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib) mode_lib->vba.UsesMALLForPStateChange[mode_lib->vba.NumberOfActivePlanes] = src->use_mall_for_pstate_change; mode_lib->vba.UseMALLForStaticScreen[mode_lib->vba.NumberOfActivePlanes] = src->use_mall_for_static_screen; mode_lib->vba.GPUVMMinPageSizeKBytes[mode_lib->vba.NumberOfActivePlanes] = src->gpuvm_min_page_size_kbytes; - mode_lib->vba.RefreshRate[mode_lib->vba.NumberOfActivePlanes] = dst->refresh_rate; //todo remove this mode_lib->vba.OutputLinkDPRate[mode_lib->vba.NumberOfActivePlanes] = dout->dp_rate; mode_lib->vba.ODMUse[mode_lib->vba.NumberOfActivePlanes] = dst->odm_combine_policy; mode_lib->vba.DETSizeOverride[mode_lib->vba.NumberOfActivePlanes] = src->det_size_override; @@ -606,8 +602,6 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib) mode_lib->vba.VActive[mode_lib->vba.NumberOfActivePlanes] = dst->vactive; mode_lib->vba.SurfaceTiling[mode_lib->vba.NumberOfActivePlanes] = (enum dm_swizzle_mode) (src->sw_mode); - mode_lib->vba.ScalerRecoutWidth[mode_lib->vba.NumberOfActivePlanes] = - dst->recout_width; // TODO: or should this be full_recout_width???...maybe only when in hsplit mode
[PATCH 13/16] drm/amd/display: Remove TFinalxFill VBA variable
The TFinalxFill variable from the struct vba_vars_st is only used
on assignments, so its value is not used on code. So,
remove the TFinalxFill entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c | 3 ---
.../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 3 ---
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c | 3 ---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
4 files changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 7effe4be61b2..91e74c0f3c3c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -2618,9 +2618,6 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
mode_lib->vba.RemainingFillLevel = dml_max(
0.0,
mode_lib->vba.FinalFillLevel -
mode_lib->vba.InitFillLevel);
- mode_lib->vba.TFinalxFill =
mode_lib->vba.RemainingFillLevel
- / (mode_lib->vba.SrcActiveDrainRate
- *
mode_lib->vba.XFCFillBWOverhead / 100);
}
}
{
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index a23b400f615b..9b52f9f3e4a0 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -2691,9 +2691,6 @@ static void
dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
mode_lib->vba.RemainingFillLevel = dml_max(
0.0,
mode_lib->vba.FinalFillLevel -
mode_lib->vba.InitFillLevel);
- mode_lib->vba.TFinalxFill =
mode_lib->vba.RemainingFillLevel
- / (mode_lib->vba.SrcActiveDrainRate
- *
mode_lib->vba.XFCFillBWOverhead / 100);
}
}
{
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index 4ba9fa17ea39..bc8cc21cf3f6 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -2627,9 +2627,6 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
mode_lib->vba.RemainingFillLevel = dml_max(
0.0,
mode_lib->vba.FinalFillLevel -
mode_lib->vba.InitFillLevel);
- mode_lib->vba.TFinalxFill =
mode_lib->vba.RemainingFillLevel
- / (mode_lib->vba.SrcActiveDrainRate
- *
mode_lib->vba.XFCFillBWOverhead / 100);
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index f973d0ee82f9..46e69f941bff 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -421,7 +421,6 @@ struct vba_vars_st {
double FinalFillMargin;
double FinalFillLevel;
double RemainingFillLevel;
- double TFinalxFill;
//
// SOC Bounding Box Parameters
--
2.37.1
[PATCH 14/16] drm/amd/display: Remove MaximumDCCCompressionYSurface VBA variable
The MaximumDCCCompressionYSurface variable from the struct vba_vars_st is
only used on assignments, so its value is not used on code. So,
remove the MaximumDCCCompressionYSurface entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
.../amd/display/dc/dml/dcn21/display_mode_vba_21.c | 13 +++--
.../gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
2 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index bc8cc21cf3f6..7007b6e16e7d 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -143,7 +143,7 @@ static bool CalculatePrefetchSchedule(
double *VReadyOffsetPix);
static double RoundToDFSGranularityUp(double Clock, double VCOSpeed);
static double RoundToDFSGranularityDown(double Clock, double VCOSpeed);
-static double CalculateDCCConfiguration(
+static void CalculateDCCConfiguration(
bool DCCEnabled,
bool DCCProgrammingAssumesScanDirectionUnknown,
unsigned int ViewportWidth,
@@ -1072,7 +1072,7 @@ static double RoundToDFSGranularityDown(double Clock,
double VCOSpeed)
return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4 / Clock, 1);
}
-static double CalculateDCCConfiguration(
+static void CalculateDCCConfiguration(
bool DCCEnabled,
bool DCCProgrammingAssumesScanDirectionUnknown,
unsigned int ViewportWidth,
@@ -1087,7 +1087,6 @@ static double CalculateDCCConfiguration(
unsigned int *MaxCompressedBlock,
unsigned int *Independent64ByteBlock)
{
- double MaximumDCCCompressionSurface = 0.0;
enum {
REQ_256Bytes,
REQ_128BytesNonContiguous,
@@ -1185,25 +1184,19 @@ static double CalculateDCCConfiguration(
*MaxUncompressedBlock = 256;
*MaxCompressedBlock = 256;
*Independent64ByteBlock = false;
- MaximumDCCCompressionSurface = 4.0;
} else if (Request == REQ_128BytesContiguous) {
*MaxUncompressedBlock = 128;
*MaxCompressedBlock = 128;
*Independent64ByteBlock = false;
- MaximumDCCCompressionSurface = 2.0;
} else if (Request == REQ_128BytesNonContiguous) {
*MaxUncompressedBlock = 256;
*MaxCompressedBlock = 64;
*Independent64ByteBlock = true;
- MaximumDCCCompressionSurface = 4.0;
} else {
*MaxUncompressedBlock = 0;
*MaxCompressedBlock = 0;
*Independent64ByteBlock = 0;
- MaximumDCCCompressionSurface = 0.0;
}
-
- return MaximumDCCCompressionSurface;
}
static double CalculatePrefetchSourceLines(
@@ -2568,7 +2561,7 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
// DCC Configuration
mode_lib->vba.ActiveDPPs = 0;
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
- locals->MaximumDCCCompressionYSurface[k] =
CalculateDCCConfiguration(
+ CalculateDCCConfiguration(
mode_lib->vba.DCCEnable[k],
false, // We should always know the direction
DCCProgrammingAssumesScanDirectionUnknown,
mode_lib->vba.ViewportWidth[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 46e69f941bff..a07e97035dd1 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -1032,7 +1032,6 @@ struct vba_vars_st {
unsigned int DCCYMaxUncompressedBlock[DC__NUM_DPP__MAX];
unsigned int DCCYMaxCompressedBlock[DC__NUM_DPP__MAX];
unsigned int DCCYIndependent64ByteBlock[DC__NUM_DPP__MAX];
- double MaximumDCCCompressionYSurface[DC__NUM_DPP__MAX];
unsigned int BlockHeight256BytesY[DC__NUM_DPP__MAX];
unsigned int BlockHeight256BytesC[DC__NUM_DPP__MAX];
unsigned int BlockWidth256BytesY[DC__NUM_DPP__MAX];
--
2.37.1
[PATCH 07/16] drm/amd/display: Remove WritebackAllowFCLKChangeEndPosition VBA variable
The WritebackAllowFCLKChangeEndPosition variable from the struct
vba_vars_st is only used on assignments, so its value is not used on
code. So, remove the WritebackAllowFCLKChangeEndPosition entry
from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
.../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c| 4
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
2 files changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index e2e1d6e77902..756a55f69799 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -1219,12 +1219,8 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
v->WritebackAllowDRAMClockChangeEndPosition[k]
= dml_max(0,
v->VStartup[k] *
mode_lib->vba.HTotal[k] / mode_lib->vba.PixelClock[k]
-
v->Watermark.WritebackDRAMClockChangeWatermark);
- v->WritebackAllowFCLKChangeEndPosition[k] =
dml_max(0,
- v->VStartup[k] *
mode_lib->vba.HTotal[k] / mode_lib->vba.PixelClock[k]
- -
v->Watermark.WritebackFCLKChangeWatermark);
} else {
v->WritebackAllowDRAMClockChangeEndPosition[k]
= 0;
- v->WritebackAllowFCLKChangeEndPosition[k] = 0;
}
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 76cba5d7ac10..518e599d74e2 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -1303,7 +1303,6 @@ struct vba_vars_st {
bool OutputMultistreamEn[DC__NUM_DPP__MAX];
bool UsesMALLForStaticScreen[DC__NUM_DPP__MAX];
double MaxActiveDRAMClockChangeLatencySupported[DC__NUM_DPP__MAX];
- double WritebackAllowFCLKChangeEndPosition[DC__NUM_DPP__MAX];
bool PTEBufferSizeNotExceededPerState[DC__NUM_DPP__MAX]; // new in DML32
bool DCCMetaBufferSizeNotExceededPerState[DC__NUM_DPP__MAX]; // new in
DML32
bool NotEnoughDSCSlices[DC__VOLTAGE_STATES];
--
2.37.1
[PATCH 12/16] drm/amd/display: Remove NumberOfDP2p0Support VBA variable
The NumberOfDP2p0Support variable from the struct vba_vars_st is
only used on assignments, so its value is not used on code. So,
remove the NumberOfDP2p0Support entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 --
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
2 files changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index 6d4907656f9f..3c044549c95f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -2186,8 +2186,6 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
mode_lib->vba.NumberOfOTGSupport =
(v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalNumberOfActiveOTG
<= mode_lib->vba.MaxNumOTG);
mode_lib->vba.NumberOfHDMIFRLSupport =
(v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalNumberOfActiveHDMIFRL
<= mode_lib->vba.MaxNumHDMIFRLOutputs);
- mode_lib->vba.NumberOfDP2p0Support =
(v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalNumberOfActiveDP2p0
<= mode_lib->vba.MaxNumDP2p0Streams
- &&
v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalNumberOfActiveDP2p0Outputs
<= mode_lib->vba.MaxNumDP2p0Outputs);
/* Display IO and DSC Support Check */
mode_lib->vba.NonsupportedDSCInputBPC = false;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 31cf144860b9..f973d0ee82f9 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -754,7 +754,6 @@ struct vba_vars_st {
bool DCCProgrammingAssumesScanDirectionUnknownFinal;
bool EnoughWritebackUnits;
bool ODMCombine2To1SupportCheckOK[DC__VOLTAGE_STATES];
- bool NumberOfDP2p0Support;
unsigned int MaxNumDP2p0Streams;
unsigned int MaxNumDP2p0Outputs;
enum dm_output_type
OutputTypePerState[DC__VOLTAGE_STATES][DC__NUM_DPP__MAX];
--
2.37.1
[PATCH 11/16] drm/amd/display: Remove MPCCombineEnable VBA variable
The MPCCombineEnable variable from the struct vba_vars_st is only
used on assignments, so its value is not used on code. So, remove
the MPCCombineEnable entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 1 -
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c | 1 -
.../gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c| 1 -
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 --
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
5 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index b776a7940fac..7dd51fe88d4f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -5259,7 +5259,6 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
}
v->ImmediateFlipSupport =
v->ImmediateFlipSupportedForState[v->VoltageLevel][MaximumMPCCombine];
for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
- v->MPCCombineEnable[k] =
v->MPCCombine[v->VoltageLevel][MaximumMPCCombine][k];
v->DPPPerPlane[k] =
v->NoOfDPP[v->VoltageLevel][MaximumMPCCombine][k];
}
v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine];
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index b338e72d96d8..2e906f01950b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -5530,7 +5530,6 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
}
v->ImmediateFlipSupport =
v->ImmediateFlipSupportedForState[v->VoltageLevel][MaximumMPCCombine];
for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
- v->MPCCombineEnable[k] =
v->MPCCombine[v->VoltageLevel][MaximumMPCCombine][k];
v->DPPPerPlane[k] =
v->NoOfDPP[v->VoltageLevel][MaximumMPCCombine][k];
}
v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine];
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
index 6c60731687bf..6a5b3c39ec60 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
@@ -5645,7 +5645,6 @@ void dml314_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_
}
v->ImmediateFlipSupport =
v->ImmediateFlipSupportedForState[v->VoltageLevel][MaximumMPCCombine];
for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
- v->MPCCombineEnable[k] =
v->MPCCombine[v->VoltageLevel][MaximumMPCCombine][k];
v->DPPPerPlane[k] =
v->NoOfDPP[v->VoltageLevel][MaximumMPCCombine][k];
}
v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine];
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index 5fce4bbb4e85..6d4907656f9f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -3685,8 +3685,6 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
mode_lib->vba.CompressedBufferSizeInkByteAllStates[mode_lib->vba.VoltageLevel][MaximumMPCCombine];
// Not used, informational
for (k = 0; k <= mode_lib->vba.NumberOfActiveSurfaces - 1; k++) {
- mode_lib->vba.MPCCombineEnable[k] =
-
mode_lib->vba.MPCCombine[mode_lib->vba.VoltageLevel][MaximumMPCCombine][k];
mode_lib->vba.DPPPerPlane[k] =
mode_lib->vba.NoOfDPP[mode_lib->vba.VoltageLevel][MaximumMPCCombine][k];
mode_lib->vba.SwathHeightY[k] =
mode_lib->vba.SwathHeightYAllStates[mode_lib->vba.VoltageLevel][MaximumMPCCombine][k];
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index f4d4bf7b6111..31cf144860b9 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -1147,7 +1147,6 @@ struct vba_vars_st {
d
[PATCH 10/16] drm/amd/display: Remove ModeIsSupported VBA variable
The ModeIsSupported variable from the struct vba_vars_st is only used on
assignments, so its value is not used on code. So, remove the
ModeIsSupported entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 1 -
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c | 1 -
.../gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c| 1 -
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 --
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
5 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index 4fac83c776ad..b776a7940fac 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -5250,7 +5250,6 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
for (i = v->soc.num_states; i >= 0; i--) {
if (i == v->soc.num_states || v->ModeSupport[i][0] ==
true || v->ModeSupport[i][1] == true) {
v->VoltageLevel = i;
- v->ModeIsSupported = v->ModeSupport[i][0] ==
true || v->ModeSupport[i][1] == true;
if (v->ModeSupport[i][1] == true) {
MaximumMPCCombine = 1;
} else {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index 9ea2d2fd56f1..b338e72d96d8 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -5521,7 +5521,6 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
for (i = v->soc.num_states; i >= 0; i--) {
if (i == v->soc.num_states || v->ModeSupport[i][0] ==
true || v->ModeSupport[i][1] == true) {
v->VoltageLevel = i;
- v->ModeIsSupported = v->ModeSupport[i][0] ==
true || v->ModeSupport[i][1] == true;
if (v->ModeSupport[i][0] == true) {
MaximumMPCCombine = 0;
} else {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
index ae749d39db2a..6c60731687bf 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
@@ -5636,7 +5636,6 @@ void dml314_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_
for (i = v->soc.num_states; i >= 0; i--) {
if (i == v->soc.num_states || v->ModeSupport[i][0] ==
true || v->ModeSupport[i][1] == true) {
v->VoltageLevel = i;
- v->ModeIsSupported = v->ModeSupport[i][0] ==
true || v->ModeSupport[i][1] == true;
if (v->ModeSupport[i][0] == true) {
MaximumMPCCombine = 0;
} else {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index a88cfce3b771..5fce4bbb4e85 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -3668,8 +3668,6 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
if (i == v->soc.num_states || mode_lib->vba.ModeSupport[i][0]
== true ||
mode_lib->vba.ModeSupport[i][1] == true) {
mode_lib->vba.VoltageLevel = i;
- mode_lib->vba.ModeIsSupported =
mode_lib->vba.ModeSupport[i][0] == true
- || mode_lib->vba.ModeSupport[i][1] ==
true;
if (mode_lib->vba.ModeSupport[i][0] == true) {
MaximumMPCCombine = 0;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index ac8131b52b78..f4d4bf7b6111 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -1132,7 +1132,6 @@ struct vba_vars_st {
double VRatioChroma[DC__NUM_DPP__MAX];
int WritebackSourceWidth[DC__NUM_DPP__MAX];
- bool ModeIsSupported;
bool ODMCombine4To1Supported;
unsigned int SurfaceWidthY[DC__NUM_DPP__MAX];
--
2.37.1
[PATCH 06/16] drm/amd/display: Remove ImmediateFlipSupportedSurface VBA variable
The ImmediateFlipSupportedSurface variable from the struct
vba_vars_st is only used on assignments, so its value is not used
on code. So, remove the ImmediateFlipSupportedSurface entry from the struct
vba_vars_st.
Signed-off-by: Maíra Canal
---
.../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 6 --
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 2 --
2 files changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index f199ef475ed0..e2e1d6e77902 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -355,12 +355,6 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
if (j != k && mode_lib->vba.BlendingAndTiming[k] == j
&& mode_lib->vba.DSCEnabled[j])
v->DSCDelay[k] = v->DSCDelay[j];
- //Immediate Flip
- for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) {
- v->ImmediateFlipSupportedSurface[k] =
mode_lib->vba.ImmediateFlipSupport
- && (mode_lib->vba.ImmediateFlipRequirement[k]
!= dm_immediate_flip_not_required);
- }
-
// Prefetch
dml32_CalculateSurfaceSizeInMall(
mode_lib->vba.NumberOfActiveSurfaces,
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 841a05bea57e..76cba5d7ac10 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -659,8 +659,6 @@ struct vba_vars_st {
double DISPCLK_calculated;
double DPPCLK_calculated[DC__NUM_DPP__MAX];
- bool ImmediateFlipSupportedSurface[DC__NUM_DPP__MAX];
-
bool Use_One_Row_For_Frame[DC__NUM_DPP__MAX];
bool Use_One_Row_For_Frame_Flip[DC__NUM_DPP__MAX];
unsigned int VUpdateOffsetPix[DC__NUM_DPP__MAX];
--
2.37.1
[PATCH 09/16] drm/amd/display: Remove SwathWidthCSingleDPP VBA variable
The SwathWidthCSingleDPP variable from the struct vba_vars_st is only
used on assignments, so its value is not used on code. So, remove the
SwathWidthCSingleDPP entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 2 --
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c | 2 --
.../gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c| 2 --
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 --
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
5 files changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index caa3a9c598ce..4fac83c776ad 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -3660,10 +3660,8 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
if (v->SourceScan[k] != dm_vert) {
v->SwathWidthYSingleDPP[k] = v->ViewportWidth[k];
- v->SwathWidthCSingleDPP[k] = v->ViewportWidthChroma[k];
} else {
v->SwathWidthYSingleDPP[k] = v->ViewportHeight[k];
- v->SwathWidthCSingleDPP[k] = v->ViewportHeightChroma[k];
}
}
for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index eca05bbc0fb5..9ea2d2fd56f1 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -3965,10 +3965,8 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
for (k = 0; k < v->NumberOfActivePlanes; k++) {
if (v->SourceScan[k] != dm_vert) {
v->SwathWidthYSingleDPP[k] = v->ViewportWidth[k];
- v->SwathWidthCSingleDPP[k] = v->ViewportWidthChroma[k];
} else {
v->SwathWidthYSingleDPP[k] = v->ViewportHeight[k];
- v->SwathWidthCSingleDPP[k] = v->ViewportHeightChroma[k];
}
}
for (k = 0; k < v->NumberOfActivePlanes; k++) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
index acb47cdaaa05..ae749d39db2a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
@@ -4077,10 +4077,8 @@ void dml314_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_
for (k = 0; k < v->NumberOfActivePlanes; k++) {
if (v->SourceScan[k] != dm_vert) {
v->SwathWidthYSingleDPP[k] = v->ViewportWidth[k];
- v->SwathWidthCSingleDPP[k] = v->ViewportWidthChroma[k];
} else {
v->SwathWidthYSingleDPP[k] = v->ViewportHeight[k];
- v->SwathWidthCSingleDPP[k] = v->ViewportHeightChroma[k];
}
}
for (k = 0; k < v->NumberOfActivePlanes; k++) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index 756a55f69799..a88cfce3b771 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -1721,10 +1721,8 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
for (k = 0; k <= mode_lib->vba.NumberOfActiveSurfaces - 1; k++) {
if (!IsVertical(mode_lib->vba.SourceRotation[k])) {
v->SwathWidthYSingleDPP[k] =
mode_lib->vba.ViewportWidth[k];
- v->SwathWidthCSingleDPP[k] =
mode_lib->vba.ViewportWidthChroma[k];
} else {
v->SwathWidthYSingleDPP[k] =
mode_lib->vba.ViewportHeight[k];
- v->SwathWidthCSingleDPP[k] =
mode_lib->vba.ViewportHeightChroma[k];
}
}
for (k = 0; k <= mode_lib->vba.NumberOfActiveSurfaces - 1; k++) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 91562c0d35f2..ac8131b52b78 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -939,
[PATCH 08/16] drm/amd/display: Remove some XFC variables from VBA
The variables XFCSupported, XFCTSlvVupdateOffset, XFCSlaveVupdateWidth,
XFCSlaveVReadyOffset, XFCTransferDelay, XFCPrechargeDelay,
XFCRemoteSurfaceFlipLatency and XFCPrefetchMargin are are only
used on assignments, so their values are not used on code. So, remove
the variables entries from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn20/display_mode_vba_20.c| 38 ---
.../dc/dml/dcn20/display_mode_vba_20v2.c | 38 ---
.../dc/dml/dcn21/display_mode_vba_21.c| 38 ---
.../drm/amd/display/dc/dml/display_mode_vba.c | 1 -
.../drm/amd/display/dc/dml/display_mode_vba.h | 8
5 files changed, 123 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 1424aa7a5018..7effe4be61b2 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -2580,9 +2580,6 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
if (mode_lib->vba.XFCEnabled[k] == true) {
double TWait;
- mode_lib->vba.XFCSlaveVUpdateOffset[k] =
mode_lib->vba.XFCTSlvVupdateOffset;
- mode_lib->vba.XFCSlaveVupdateWidth[k] =
mode_lib->vba.XFCTSlvVupdateWidth;
- mode_lib->vba.XFCSlaveVReadyOffset[k] =
mode_lib->vba.XFCTSlvVreadyOffset;
TWait = CalculateTWait(
mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb],
mode_lib->vba.DRAMClockChangeLatency,
@@ -2606,26 +2603,6 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
_lib->vba.SrcActiveDrainRate,
_lib->vba.TInitXFill,
_lib->vba.TslvChk);
- mode_lib->vba.XFCRemoteSurfaceFlipLatency[k] =
- dml_floor(
-
mode_lib->vba.XFCRemoteSurfaceFlipDelay
- /
(mode_lib->vba.HTotal[k]
-
/ mode_lib->vba.PixelClock[k]),
- 1);
- mode_lib->vba.XFCTransferDelay[k] =
- dml_ceil(
-
mode_lib->vba.XFCBusTransportTime
- /
(mode_lib->vba.HTotal[k]
-
/ mode_lib->vba.PixelClock[k]),
- 1);
- mode_lib->vba.XFCPrechargeDelay[k] =
- dml_ceil(
-
(mode_lib->vba.XFCBusTransportTime
- +
mode_lib->vba.TInitXFill
- +
mode_lib->vba.TslvChk)
- /
(mode_lib->vba.HTotal[k]
-
/ mode_lib->vba.PixelClock[k]),
- 1);
mode_lib->vba.InitFillLevel =
mode_lib->vba.XFCXBUFLatencyTolerance
* mode_lib->vba.SrcActiveDrainRate;
mode_lib->vba.FinalFillMargin =
@@ -2644,21 +2621,6 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
mode_lib->vba.TFinalxFill =
mode_lib->vba.RemainingFillLevel
/ (mode_lib->vba.SrcActiveDrainRate
*
mode_lib->vba.XFCFillBWOverhead / 100);
- mode_lib->vba.XFCPrefetchMargin[k] =
- mode_lib->vba.XFCRemoteSurfaceFlipDelay
- +
mode_lib->vba.TFinalxFill
- +
(mode_lib->vba.DestinationLinesToRequestVMInVBlank[k]
- +
mode_lib->vba.DestinationLinesToRequestRowInVBlank[k])
-
[PATCH 05/16] drm/amd/display: Remove VStartupMargin and FirstMainPlane VBA variables
The variables VStartupMargin and FirstMainPlane from the struct
vba_vars_st are only used on assignments, so there values are not used
on code. So, remove the variables entries from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
.../display/dc/dml/dcn20/display_mode_vba_20.c | 14 +++---
.../dc/dml/dcn20/display_mode_vba_20v2.c| 14 +++---
.../display/dc/dml/dcn30/display_mode_vba_30.c | 17 ++---
.../drm/amd/display/dc/dml/display_mode_vba.h | 2 --
4 files changed, 12 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d86d5c346e42..1424aa7a5018 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -2662,19 +2662,12 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
}
}
{
- unsigned int VStartupMargin = 0;
bool FirstMainPlane = true;
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
- if (mode_lib->vba.BlendingAndTiming[k] == k) {
- unsigned int Margin =
(mode_lib->vba.MaxVStartupLines[k] - mode_lib->vba.VStartup[k])
- * mode_lib->vba.HTotal[k] /
mode_lib->vba.PixelClock[k];
-
- if (FirstMainPlane) {
- VStartupMargin = Margin;
- FirstMainPlane = false;
- } else
- VStartupMargin =
dml_min(VStartupMargin, Margin);
+ if (mode_lib->vba.BlendingAndTiming[k] == k &&
FirstMainPlane) {
+ FirstMainPlane = false;
+ }
}
if (mode_lib->vba.UseMaximumVStartup) {
@@ -2685,7 +2678,6 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
}
}
}
-}
static void dml20_DisplayPipeConfiguration(struct display_mode_lib *mode_lib)
{
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index effd02574a0e..03613dbb3e61 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -2735,19 +2735,12 @@ static void
dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
}
}
{
- unsigned int VStartupMargin = 0;
bool FirstMainPlane = true;
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
- if (mode_lib->vba.BlendingAndTiming[k] == k) {
- unsigned int Margin =
(mode_lib->vba.MaxVStartupLines[k] - mode_lib->vba.VStartup[k])
- * mode_lib->vba.HTotal[k] /
mode_lib->vba.PixelClock[k];
-
- if (FirstMainPlane) {
- VStartupMargin = Margin;
- FirstMainPlane = false;
- } else
- VStartupMargin =
dml_min(VStartupMargin, Margin);
+ if (mode_lib->vba.BlendingAndTiming[k] == k &&
FirstMainPlane) {
+ FirstMainPlane = false;
+ }
}
if (mode_lib->vba.UseMaximumVStartup) {
@@ -2758,7 +2751,6 @@ static void
dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
}
}
}
-}
static void dml20v2_DisplayPipeConfiguration(struct display_mode_lib *mode_lib)
{
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index fe7fcb0d7b1f..caa3a9c598ce 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -3028,17 +3028,12 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
}
// VStartup Margin
- v->VStartupMargin = 0;
- v->FirstMainPlane = true;
- for (k = 0; k < v->NumberOfActivePlanes; ++k) {
- if (v->BlendingAndTiming[k] == k) {
- double margin = (v->MaxVStartupLines[k] -
v->VStartup[k]) * v->HTotal[k]
- / v->PixelClock[k];
- if (v->FirstMainPlane == true) {
-
[PATCH 04/16] drm/amd/display: Remove AllowDRAMSelfRefreshDuringVBlank VBA variable
The AllowDRAMSelfRefreshDuringVBlank variable from the struct vba_vars_st
is only used on assignments, so its value is not used on code. So, remove
it the AllowDRAMSelfRefreshDuringVBlank entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c | 3 ---
.../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 3 ---
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c | 3 ---
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 3 ---
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c | 3 ---
.../gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c | 3 ---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
7 files changed, 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 37a8b418a24d..d86d5c346e42 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -2350,7 +2350,6 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
if
(mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb]
== 0) {
mode_lib->vba.AllowDRAMClockChangeDuringVBlank[k] =
true;
- mode_lib->vba.AllowDRAMSelfRefreshDuringVBlank[k] =
true;
mode_lib->vba.MinTTUVBlank[k] = dml_max(
mode_lib->vba.DRAMClockChangeWatermark,
dml_max(
@@ -2358,13 +2357,11 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
mode_lib->vba.UrgentWatermark));
} else if
(mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb]
== 1) {
mode_lib->vba.AllowDRAMClockChangeDuringVBlank[k] =
false;
- mode_lib->vba.AllowDRAMSelfRefreshDuringVBlank[k] =
true;
mode_lib->vba.MinTTUVBlank[k] = dml_max(
mode_lib->vba.StutterEnterPlusExitWatermark,
mode_lib->vba.UrgentWatermark);
} else {
mode_lib->vba.AllowDRAMClockChangeDuringVBlank[k] =
false;
- mode_lib->vba.AllowDRAMSelfRefreshDuringVBlank[k] =
false;
mode_lib->vba.MinTTUVBlank[k] =
mode_lib->vba.UrgentWatermark;
}
if (!mode_lib->vba.DynamicMetadataEnable[k])
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 0e0697326717..effd02574a0e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -2384,7 +2384,6 @@ static void
dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
if
(mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb]
== 0) {
mode_lib->vba.AllowDRAMClockChangeDuringVBlank[k] =
true;
- mode_lib->vba.AllowDRAMSelfRefreshDuringVBlank[k] =
true;
mode_lib->vba.MinTTUVBlank[k] = dml_max(
mode_lib->vba.DRAMClockChangeWatermark,
dml_max(
@@ -2392,13 +2391,11 @@ static void
dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
mode_lib->vba.UrgentWatermark));
} else if
(mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb]
== 1) {
mode_lib->vba.AllowDRAMClockChangeDuringVBlank[k] =
false;
- mode_lib->vba.AllowDRAMSelfRefreshDuringVBlank[k] =
true;
mode_lib->vba.MinTTUVBlank[k] = dml_max(
mode_lib->vba.StutterEnterPlusExitWatermark,
mode_lib->vba.UrgentWatermark);
} else {
mode_lib->vba.AllowDRAMClockChangeDuringVBlank[k] =
false;
- mode_lib->vba.AllowDRAMSelfRefreshDuringVBlank[k] =
false;
mode_lib->vba.MinTTUVBlank[k] =
mode_lib->vba.UrgentWatermark;
}
if (!mode_lib->vba.DynamicMetadataEnable[k])
dif
[PATCH 03/16] drm/amd/display: Remove DSCCLK_calculated VBA variable
The DSCCLK_calculated variable from the struct vba_vars_st is
only used on assignments, so its value is not used on code. Moreover,
its getter function is not used also. So, remove the DSCCLK_calculated
entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn20/display_mode_vba_20.c| 21 ++
.../dc/dml/dcn20/display_mode_vba_20v2.c | 21 ++
.../dc/dml/dcn21/display_mode_vba_21.c| 18 +--
.../dc/dml/dcn30/display_mode_vba_30.c| 19 ++--
.../dc/dml/dcn31/display_mode_vba_31.c| 19 ++--
.../dc/dml/dcn314/display_mode_vba_314.c | 19 ++--
.../dc/dml/dcn32/display_mode_vba_32.c| 22 ++-
.../drm/amd/display/dc/dml/display_mode_vba.c | 1 -
.../drm/amd/display/dc/dml/display_mode_vba.h | 2 --
9 files changed, 13 insertions(+), 129 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 8a499f8066b7..37a8b418a24d 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -1770,28 +1770,11 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
// DSCCLK
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
- if ((mode_lib->vba.BlendingAndTiming[k] != k) ||
!mode_lib->vba.DSCEnabled[k]) {
- mode_lib->vba.DSCCLK_calculated[k] = 0.0;
- } else {
- if (mode_lib->vba.OutputFormat[k] == dm_420
- || mode_lib->vba.OutputFormat[k] ==
dm_n422)
+ if ((mode_lib->vba.BlendingAndTiming[k] == k) ||
mode_lib->vba.DSCEnabled[k]) {
+ if (mode_lib->vba.OutputFormat[k] == dm_420 ||
mode_lib->vba.OutputFormat[k] == dm_n422)
mode_lib->vba.DSCFormatFactor = 2;
else
mode_lib->vba.DSCFormatFactor = 1;
- if (mode_lib->vba.ODMCombineEnabled[k])
- mode_lib->vba.DSCCLK_calculated[k] =
-
mode_lib->vba.PixelClockBackEnd[k] / 6
- /
mode_lib->vba.DSCFormatFactor
- / (1
-
- mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
-
/ 100);
- else
- mode_lib->vba.DSCCLK_calculated[k] =
-
mode_lib->vba.PixelClockBackEnd[k] / 3
- /
mode_lib->vba.DSCFormatFactor
- / (1
-
- mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
-
/ 100);
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index ef7f0b8ed2d5..0e0697326717 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -1806,28 +1806,11 @@ static void
dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
// DSCCLK
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
- if ((mode_lib->vba.BlendingAndTiming[k] != k) ||
!mode_lib->vba.DSCEnabled[k]) {
- mode_lib->vba.DSCCLK_calculated[k] = 0.0;
- } else {
- if (mode_lib->vba.OutputFormat[k] == dm_420
- || mode_lib->vba.OutputFormat[k] ==
dm_n422)
+ if ((mode_lib->vba.BlendingAndTiming[k] == k) ||
mode_lib->vba.DSCEnabled[k]) {
+ if (mode_lib->vba.OutputFormat[k] == dm_420 ||
mode_lib->vba.OutputFormat[k] == dm_n422)
mode_lib->vba.DSCFormatFactor = 2;
else
mode_lib->vba.DSCFormatFactor = 1;
- if (mode_lib->vba.ODMCombineEnabled[k])
- mode_lib->vba.DSCCLK_calculated[k] =
-
mode_lib->vba.PixelCl
[PATCH 02/16] drm/amd/display: Remove CompBufReservedSpace* VBA variable
The variables CompBufReservedSpaceZs, CompBufReservedSpace64B and
CompBufReservedSpaceNeedAdjustment from the struct vba_vars_st are
only used on assignments, so their values are not used on code. Moreover,
their getter functions are not used also. So, remove the variables
entries from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
.../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 3 ---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c| 2 --
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h| 5 -
3 files changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index 573504de1789..a1fb2d1d1cdb 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -307,9 +307,6 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
.dummy_boolean); /* bool
*ViewportSizeSupport */
}
- v->CompBufReservedSpaceZs = v->CompBufReservedSpaceKBytes * 1024.0
/ 256.0;
- v->CompBufReservedSpace64B= v->CompBufReservedSpaceKBytes * 1024.0
/ 64.0;
-
// DCFCLK Deep Sleep
dml32_CalculateDCFCLKDeepSleep(
mode_lib->vba.NumberOfActiveSurfaces,
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 5dc2f52165fb..d1c720b48b0c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -122,8 +122,6 @@ dml_get_attr_func(fclk_watermark,
mode_lib->vba.Watermark.FCLKChangeWatermark);
dml_get_attr_func(usr_retraining_watermark,
mode_lib->vba.Watermark.USRRetrainingWatermark);
dml_get_attr_func(comp_buffer_reserved_space_kbytes,
mode_lib->vba.CompBufReservedSpaceKBytes);
-dml_get_attr_func(comp_buffer_reserved_space_64bytes,
mode_lib->vba.CompBufReservedSpace64B);
-dml_get_attr_func(comp_buffer_reserved_space_zs,
mode_lib->vba.CompBufReservedSpaceZs);
dml_get_attr_func(unbounded_request_enabled,
mode_lib->vba.UnboundedRequestEnabled);
#define dml_get_pipe_attr_func(attr, var) double get_##attr(struct
display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned
int num_pipes, unsigned int which_pipe) \
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index cb125f7d0814..632041cf49bb 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -67,8 +67,6 @@ dml_get_attr_decl(min_meta_chunk_size_in_byte);
dml_get_attr_decl(fclk_watermark);
dml_get_attr_decl(usr_retraining_watermark);
dml_get_attr_decl(comp_buffer_reserved_space_kbytes);
-dml_get_attr_decl(comp_buffer_reserved_space_64bytes);
-dml_get_attr_decl(comp_buffer_reserved_space_zs);
dml_get_attr_decl(unbounded_request_enabled);
#define dml_get_pipe_attr_decl(attr) double get_##attr(struct display_mode_lib
*mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes,
unsigned int which_pipe)
@@ -655,9 +653,6 @@ struct vba_vars_st {
Watermarks Watermark;
bool DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE;
unsigned int CompBufReservedSpaceKBytes;
- unsigned int CompBufReservedSpace64B;
- unsigned int CompBufReservedSpaceZs;
- bool CompBufReservedSpaceNeedAdjustment;
// These are the clocks calcuated by the library but they are not
actually
// used explicitly. They are fetched by tests and then possibly used.
The
--
2.37.1
[PATCH 01/16] drm/amd/display: Remove NonUrgentLatencyTolerance VBA variable
The NonUrgentLatencyTolerance variable from the struct vba_vars_st is
only used on assignments, so its value is not used on code. Moreover,
its getter function is not used also. So, remove the
NonUrgentLatencyTolerance entry from the struct vba_vars_st.
Signed-off-by: Maíra Canal
---
.../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c| 4
.../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 4
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 1 -
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 2 --
4 files changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d3b5b6fedf04..8a499f8066b7 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -1768,10 +1768,6 @@ static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
mode_lib->vba.UrgentLatencySupportUs[k]);
}
- // Non-Urgent Latency Tolerance
- mode_lib->vba.NonUrgentLatencyTolerance =
mode_lib->vba.MinUrgentLatencySupportUs
- - mode_lib->vba.UrgentWatermark;
-
// DSCCLK
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
if ((mode_lib->vba.BlendingAndTiming[k] != k) ||
!mode_lib->vba.DSCEnabled[k]) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 63bbdf8b8678..ef7f0b8ed2d5 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -1804,10 +1804,6 @@ static void
dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
mode_lib->vba.UrgentLatencySupportUs[k]);
}
- // Non-Urgent Latency Tolerance
- mode_lib->vba.NonUrgentLatencyTolerance =
mode_lib->vba.MinUrgentLatencySupportUs
- - mode_lib->vba.UrgentWatermark;
-
// DSCCLK
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
if ((mode_lib->vba.BlendingAndTiming[k] != k) ||
!mode_lib->vba.DSCEnabled[k]) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 503e7d984ff0..5dc2f52165fb 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -102,7 +102,6 @@ dml_get_attr_func(stutter_efficiency_no_vblank,
mode_lib->vba.StutterEfficiencyN
dml_get_attr_func(stutter_period, mode_lib->vba.StutterPeriod);
dml_get_attr_func(urgent_latency, mode_lib->vba.UrgentLatency);
dml_get_attr_func(urgent_extra_latency, mode_lib->vba.UrgentExtraLatency);
-dml_get_attr_func(nonurgent_latency, mode_lib->vba.NonUrgentLatencyTolerance);
dml_get_attr_func(dram_clock_change_latency,
mode_lib->vba.MinActiveDRAMClockChangeLatencySupported);
dml_get_attr_func(dispclk_calculated, mode_lib->vba.DISPCLK_calculated);
dml_get_attr_func(total_data_read_bw, mode_lib->vba.TotalDataReadBandwidth);
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 8460aefe7b6d..cb125f7d0814 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -50,7 +50,6 @@ dml_get_attr_decl(stutter_efficiency);
dml_get_attr_decl(stutter_period);
dml_get_attr_decl(urgent_latency);
dml_get_attr_decl(urgent_extra_latency);
-dml_get_attr_decl(nonurgent_latency);
dml_get_attr_decl(dram_clock_change_latency);
dml_get_attr_decl(dispclk_calculated);
dml_get_attr_decl(total_data_read_bw);
@@ -648,7 +647,6 @@ struct vba_vars_st {
double WritebackDRAMClockChangeWatermark;
double StutterEfficiency;
double StutterEfficiencyNotIncludingVBlank;
- double NonUrgentLatencyTolerance;
double MinActiveDRAMClockChangeLatencySupported;
double Z8StutterEfficiencyBestCase;
unsigned int Z8NumberOfStutterBurstsPerFrameBestCase;
--
2.37.1
[PATCH 00/16] Remove entries from struct vba_vars_st
A while ago, I sent a patch removing some entries from the struct vba_vars_st [1]. At that time, I used git grep and checked if they were used anywhere else manually. But the struct vba_vars_st has more than 900 variables, so git grep every variable is a pretty huge work. So, I grabbed all the variables' names and put them in a text file, and wrote a bash script to analyze if the variables were used. I ended up finding a bunch of variables that were only assigned but never used. I manually checked the results of the script in order to make sure that no functional changes were made to the code. I only removed variables that were only assigned but never used or variables that were never even mentioned. Best Regards, - Maíra Canal [1] https://lore.kernel.org/amd-gfx/20220630215316.1078841-1-mairaca...@riseup.net/T/#u Maíra Canal (16): drm/amd/display: Remove NonUrgentLatencyTolerance VBA variable drm/amd/display: Remove CompBufReservedSpace* VBA variable drm/amd/display: Remove DSCCLK_calculated VBA variable drm/amd/display: Remove AllowDRAMSelfRefreshDuringVBlank VBA variable drm/amd/display: Remove VStartupMargin and FirstMainPlane VBA variables drm/amd/display: Remove ImmediateFlipSupportedSurface VBA variable drm/amd/display: Remove WritebackAllowFCLKChangeEndPosition VBA variable drm/amd/display: Remove some XFC variables from VBA drm/amd/display: Remove SwathWidthCSingleDPP VBA variable drm/amd/display: Remove ModeIsSupported VBA variable drm/amd/display: Remove MPCCombineEnable VBA variable drm/amd/display: Remove NumberOfDP2p0Support VBA variable drm/amd/display: Remove TFinalxFill VBA variable drm/amd/display: Remove MaximumDCCCompressionYSurface VBA variable drm/amd/display: Remove only mencioned once VBA variables drm/amd/display: Remove never used VBA variables .../dc/dml/dcn20/display_mode_vba_20.c| 83 ++- .../dc/dml/dcn20/display_mode_vba_20v2.c | 83 ++- .../dc/dml/dcn21/display_mode_vba_21.c| 75 + .../dc/dml/dcn30/display_mode_vba_30.c| 43 ++ .../dc/dml/dcn31/display_mode_vba_31.c| 26 +- .../dc/dml/dcn314/display_mode_vba_314.c | 26 +- .../dc/dml/dcn32/display_mode_vba_32.c| 44 +- .../drm/amd/display/dc/dml/display_mode_vba.c | 18 +--- .../drm/amd/display/dc/dml/display_mode_vba.h | 45 -- 9 files changed, 30 insertions(+), 413 deletions(-) -- 2.37.1
[PATCH] drm/amd/display: Remove unused struct freesync_context
All references to struct freesync_context were removed, so remove the
struct freesync_context itself and its entry on struct dc_stream_state.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dc_stream.h | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h
b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index c3d97206ed89..f87f852d4829 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -48,11 +48,6 @@ struct dc_stream_status {
bool is_abm_supported;
};
-// TODO: References to this needs to be removed..
-struct freesync_context {
- bool dummy;
-};
-
enum hubp_dmdata_mode {
DMDATA_SW_MODE,
DMDATA_HW_MODE
@@ -184,9 +179,6 @@ struct dc_stream_state {
struct rect src; /* composition area */
struct rect dst; /* stream addressable area */
- // TODO: References to this needs to be removed..
- struct freesync_context freesync_ctx;
-
struct audio_info audio_info;
struct dc_info_packet hdr_static_metadata;
--
2.37.1
Re: [PATCH 1/2] drm/amd/display: change variables type
Hi Magali
On 7/25/22 15:15, Magali Lemes wrote:
> As "dcn3_15_soc" and "dcn3_16_soc" are of type "struct
> _vcs_dpi_soc_bounding_box_st", change their types accordingly.
>
> Signed-off-by: Magali Lemes
> ---
Great catch! To the whole series:
Reviewed-by: Maíra Canal
Best Regards,
- Maíra Canal
> drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
> b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
> index 39929fa67a51..45276317c057 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
> +++ b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
> @@ -32,7 +32,7 @@
> container_of(pool, struct dcn315_resource_pool, base)
>
> extern struct _vcs_dpi_ip_params_st dcn3_15_ip;
> -extern struct _vcs_dpi_ip_params_st dcn3_15_soc;
> +extern struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc;
>
> struct dcn315_resource_pool {
> struct resource_pool base;
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
> b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
> index 0dc5a6c13ae7..d2234aac5449 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
> +++ b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
> @@ -32,7 +32,7 @@
> container_of(pool, struct dcn316_resource_pool, base)
>
> extern struct _vcs_dpi_ip_params_st dcn3_16_ip;
> -extern struct _vcs_dpi_ip_params_st dcn3_16_soc;
> +extern struct _vcs_dpi_soc_bounding_box_st dcn3_16_soc;
>
> struct dcn316_resource_pool {
> struct resource_pool base;
Re: [PATCH v2 3/4] drm/amd/display: Remove parameters from rq_dlg_get_dlg_reg
Hi Siqueira,
On 7/22/22 17:11, Rodrigo Siqueira Jordao wrote:
> Hi Maira,
>
> First of all, thanks a lot for this patch. This change is really helpful
> for reducing the stack size. I just have few comments inline.
Thank you for the feedback!
>
> On 2022-07-21 14:36, Maíra Canal wrote:
>> Across all DCN's (except DCN32, that has a separate
>> rq_dlg_get_dlg_reg), the parameters const bool vm_en, const bool
>> ignore_viewport_pos, and const bool immediate_flip_support are not used
>> on the function. Therefore, change the rq_dlg_get_dlg_reg signature
>> by deleting those parameters.
>>
>> Signed-off-by: Maíra Canal
>> ---
>> v1 -> v2:
>> - Replace "enum" to "enum entries" (André Almeida).
>> ---
>> .../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 3 +--
>> .../dc/dml/dcn20/display_rq_dlg_calc_20.c | 5 +
>> .../dc/dml/dcn20/display_rq_dlg_calc_20.h | 5 +
>> .../dc/dml/dcn20/display_rq_dlg_calc_20v2.c | 5 +
>> .../dc/dml/dcn20/display_rq_dlg_calc_20v2.h | 5 +
>> .../dc/dml/dcn21/display_rq_dlg_calc_21.c | 5 +
>> .../dc/dml/dcn21/display_rq_dlg_calc_21.h | 5 +
>> .../dc/dml/dcn30/display_rq_dlg_calc_30.c | 18 +++---
>> .../dc/dml/dcn30/display_rq_dlg_calc_30.h | 5 +
>> .../dc/dml/dcn31/display_rq_dlg_calc_31.c | 19 +++
>> .../dc/dml/dcn31/display_rq_dlg_calc_31.h | 5 +
>> .../dc/dml/dcn314/display_rq_dlg_calc_314.c | 15 ++-
>> .../dc/dml/dcn314/display_rq_dlg_calc_314.h | 5 +
>> .../drm/amd/display/dc/dml/display_mode_lib.h | 5 +
>> .../gpu/drm/amd/display/dc/dml/dml_wrapper.c | 3 +--
>> 15 files changed, 20 insertions(+), 88 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
>> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
>> index dc60b835e938..d9cfb29a2651 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
>> @@ -857,8 +857,7 @@ void dcn20_calculate_dlg_params(
>> pipe_cnt,
>> pipe_idx,
>> cstate_en,
>> - context->bw_ctx.bw.dcn.clk.p_state_change_support,
>> - false, false, true);
>> + context->bw_ctx.bw.dcn.clk.p_state_change_support);
>>
>> context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg(>bw_ctx.dml,
>> >res_ctx.pipe_ctx[i].rq_regs,
>> diff --git
>> a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
>> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
>> index 548cdef8a8ad..d0a4c69b47c8 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
>> @@ -1553,10 +1553,7 @@ void dml20_rq_dlg_get_dlg_reg(struct
>> display_mode_lib *mode_lib,
>> const unsigned int num_pipes,
>> const unsigned int pipe_idx,
>> const bool cstate_en,
>> - const bool pstate_en,
>> - const bool vm_en,
>> - const bool ignore_viewport_pos,
>> - const bool immediate_flip_support)
>> + const bool pstate_en)
>> {
>> display_rq_params_st rq_param = {0};
>> display_dlg_sys_params_st dlg_sys_param = {0};
>> diff --git
>> a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
>> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
>> index 8b23867e97c1..36c3692e53b8 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
>> @@ -65,9 +65,6 @@ void dml20_rq_dlg_get_dlg_reg(
>> const unsigned int num_pipes,
>> const unsigned int pipe_idx,
>> const bool cstate_en,
>> - const bool pstate_en,
>> - const bool vm_en,
>> - const bool ignore_viewport_pos,
>> - const bool immediate_flip_support);
>> + const bool pstate_en);
>> #endif
>> diff --git
>> a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
>> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
>> index 0fc9f3e3ffae..17df9d31c11f 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
>
[PATCH v2 4/4] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function
Based on the dml30_CalculateWriteBackDISPCLK, it separates the
DISPCLK calculations on three variables, making no functional changes, in order
to make it more readable and better express that three values are being compared
on dml_max.
Signed-off-by: Maíra Canal
Reviewed-by: André Almeida
---
.../drm/amd/display/dc/dml/display_mode_vba.c | 29 ---
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 503e7d984ff0..df80c79d8fbc 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -1115,20 +1115,27 @@ double CalculateWriteBackDISPCLK(
unsigned int HTotal,
unsigned int WritebackChromaLineBufferWidth)
{
- double CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max(
- dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio,
- dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio,
1) * dml_ceil(WritebackDestinationWidth / 4.0, 1)
+ double DISPCLK_H, DISPCLK_V, DISPCLK_HB, CalculateWriteBackDISPCLK;
+
+ DISPCLK_H = dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio;
+ DISPCLK_V = (WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) *
dml_ceil(WritebackDestinationWidth / 4.0, 1)
+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) /
(double) HTotal + dml_ceil(1.0 / WritebackVRatio, 1)
- * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) /
(double) HTotal,
- dml_ceil(1.0 / WritebackVRatio, 1) *
WritebackDestinationWidth / (double) HTotal));
+ * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) /
(double) HTotal;
+ DISPCLK_HB = dml_ceil(1.0 / WritebackVRatio, 1) *
WritebackDestinationWidth / (double) HTotal;
+
+ CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max3(DISPCLK_H,
DISPCLK_V, DISPCLK_HB);
+
if (WritebackPixelFormat != dm_444_32) {
- CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
1.01 * PixelClock * dml_max(
- dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 *
WritebackHRatio),
- dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 *
WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / 2.0, 1)
- + dml_ceil(WritebackDestinationWidth / 2.0 /
WritebackChromaLineBufferWidth, 1)) / HTotal
- + dml_ceil(1 / (2 * WritebackVRatio), 1) *
(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal,
- dml_ceil(1.0 / (2 * WritebackVRatio), 1) *
WritebackDestinationWidth / 2.0 / HTotal)));
+ DISPCLK_H = dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 *
WritebackHRatio);
+ DISPCLK_V = (WritebackChromaVTaps * dml_ceil(1 / (2 *
WritebackVRatio), 1) *
+ dml_ceil(WritebackDestinationWidth / 4.0, 1) +
+ dml_ceil(WritebackDestinationWidth / 2.0 /
WritebackChromaLineBufferWidth, 1)) / HTotal +
+ dml_ceil(1 / (2 * WritebackVRatio), 1)
*(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal;
+ DISPCLK_HB = dml_ceil(1.0 / (2 * WritebackVRatio), 1) *
WritebackDestinationWidth / 2.0 / HTotal;
+ CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
+ 1.01 * PixelClock * dml_max3(DISPCLK_H,
DISPCLK_V, DISPCLK_HB));
}
+
return CalculateWriteBackDISPCLK;
}
--
2.36.1
[PATCH v2 3/4] drm/amd/display: Remove parameters from rq_dlg_get_dlg_reg
Across all DCN's (except DCN32, that has a separate
rq_dlg_get_dlg_reg), the parameters const bool vm_en, const bool
ignore_viewport_pos, and const bool immediate_flip_support are not used
on the function. Therefore, change the rq_dlg_get_dlg_reg signature
by deleting those parameters.
Signed-off-by: Maíra Canal
---
v1 -> v2:
- Replace "enum" to "enum entries" (André Almeida).
---
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 3 +--
.../dc/dml/dcn20/display_rq_dlg_calc_20.c | 5 +
.../dc/dml/dcn20/display_rq_dlg_calc_20.h | 5 +
.../dc/dml/dcn20/display_rq_dlg_calc_20v2.c | 5 +
.../dc/dml/dcn20/display_rq_dlg_calc_20v2.h | 5 +
.../dc/dml/dcn21/display_rq_dlg_calc_21.c | 5 +
.../dc/dml/dcn21/display_rq_dlg_calc_21.h | 5 +
.../dc/dml/dcn30/display_rq_dlg_calc_30.c | 18 +++---
.../dc/dml/dcn30/display_rq_dlg_calc_30.h | 5 +
.../dc/dml/dcn31/display_rq_dlg_calc_31.c | 19 +++
.../dc/dml/dcn31/display_rq_dlg_calc_31.h | 5 +
.../dc/dml/dcn314/display_rq_dlg_calc_314.c | 15 ++-
.../dc/dml/dcn314/display_rq_dlg_calc_314.h | 5 +
.../drm/amd/display/dc/dml/display_mode_lib.h | 5 +
.../gpu/drm/amd/display/dc/dml/dml_wrapper.c | 3 +--
15 files changed, 20 insertions(+), 88 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
index dc60b835e938..d9cfb29a2651 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
@@ -857,8 +857,7 @@ void dcn20_calculate_dlg_params(
pipe_cnt,
pipe_idx,
cstate_en,
-
context->bw_ctx.bw.dcn.clk.p_state_change_support,
- false, false, true);
+
context->bw_ctx.bw.dcn.clk.p_state_change_support);
context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg(>bw_ctx.dml,
>res_ctx.pipe_ctx[i].rq_regs,
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
index 548cdef8a8ad..d0a4c69b47c8 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
@@ -1553,10 +1553,7 @@ void dml20_rq_dlg_get_dlg_reg(struct display_mode_lib
*mode_lib,
const unsigned int num_pipes,
const unsigned int pipe_idx,
const bool cstate_en,
- const bool pstate_en,
- const bool vm_en,
- const bool ignore_viewport_pos,
- const bool immediate_flip_support)
+ const bool pstate_en)
{
display_rq_params_st rq_param = {0};
display_dlg_sys_params_st dlg_sys_param = {0};
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
index 8b23867e97c1..36c3692e53b8 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
@@ -65,9 +65,6 @@ void dml20_rq_dlg_get_dlg_reg(
const unsigned int num_pipes,
const unsigned int pipe_idx,
const bool cstate_en,
- const bool pstate_en,
- const bool vm_en,
- const bool ignore_viewport_pos,
- const bool immediate_flip_support);
+ const bool pstate_en);
#endif
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
index 0fc9f3e3ffae..17df9d31c11f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
@@ -1554,10 +1554,7 @@ void dml20v2_rq_dlg_get_dlg_reg(struct display_mode_lib
*mode_lib,
const unsigned int num_pipes,
const unsigned int pipe_idx,
const bool cstate_en,
- const bool pstate_en,
- const bool vm_en,
- const bool ignore_viewport_pos,
- const bool immediate_flip_support)
+ const bool pstate_en)
{
display_rq_params_st rq_param = {0};
display_dlg_sys_params_st dlg_sys_param = {0};
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
index 2b4e46ea1c3d..f524f1ccfe41 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_
[PATCH v2 2/4] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK
The functions dml30_CalculateWriteBackDISPCLK and
dml31_CalculateWriteBackDISPCLK are identical. Therefor, to avoid code
duplication, replace dml31_CalculateWriteBackDISPCLK by
dml30_CalculateWriteBackDISPCLK
Signed-off-by: Maíra Canal
---
v1 -> v2:
- Describe changes in imperative mood (André Almeida).
---
.../dc/dml/dcn31/display_mode_vba_31.c| 24 ++-
.../dc/dml/dcn31/display_mode_vba_31.h| 11 -
2 files changed, 2 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index 3fab19134480..3bc529f0b0fc 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -2085,7 +2085,7 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
if (v->WritebackEnable[k]) {
v->WritebackDISPCLK = dml_max(
v->WritebackDISPCLK,
- dml31_CalculateWriteBackDISPCLK(
+ dml30_CalculateWriteBackDISPCLK(
v->WritebackPixelFormat[k],
v->PixelClock[k],
v->WritebackHRatio[k],
@@ -3470,26 +3470,6 @@ static double CalculateTWait(unsigned int PrefetchMode,
double DRAMClockChangeLa
}
}
-double dml31_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
- double PixelClock,
- double WritebackHRatio,
- double WritebackVRatio,
- unsigned int WritebackHTaps,
- unsigned int WritebackVTaps,
- long WritebackSourceWidth,
- long WritebackDestinationWidth,
- unsigned int HTotal,
- unsigned int WritebackLineBufferSize)
-{
- double DISPCLK_H, DISPCLK_V, DISPCLK_HB;
-
- DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) /
WritebackHRatio;
- DISPCLK_V = PixelClock * (WritebackVTaps *
dml_ceil(WritebackDestinationWidth / 6.0, 1) + 8.0) / HTotal;
- DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth *
WritebackVTaps - WritebackLineBufferSize / 57.0) / 6.0 / WritebackSourceWidth;
- return dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB);
-}
-
static double CalculateWriteBackDelay(
enum source_format_class WritebackPixelFormat,
double WritebackHRatio,
@@ -4055,7 +4035,7 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
if (v->WritebackEnable[k] == true) {
v->WritebackRequiredDISPCLK = dml_max(
v->WritebackRequiredDISPCLK,
- dml31_CalculateWriteBackDISPCLK(
+ dml30_CalculateWriteBackDISPCLK(
v->WritebackPixelFormat[k],
v->PixelClock[k],
v->WritebackHRatio[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
index 90be612f26b2..654362adcaa9 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
@@ -28,16 +28,5 @@
void dml31_recalculate(struct display_mode_lib *mode_lib);
void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
*mode_lib);
-double dml31_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
- double PixelClock,
- double WritebackHRatio,
- double WritebackVRatio,
- unsigned int WritebackHTaps,
- unsigned int WritebackVTaps,
- long WritebackSourceWidth,
- long WritebackDestinationWidth,
- unsigned int HTotal,
- unsigned int WritebackLineBufferSize);
#endif /* __DML31_DISPLAY_MODE_VBA_H__ */
--
2.36.1
[PATCH v2 1/4] drm/amd/display: Drop dm_sw_gfx7_2d_thin_l_vp and dm_sw_gfx7_2d_thin_gl
As the enum entries dm_sw_gfx7_2d_thin_gl and dm_sw_gfx7_2d_thin_l_vp
are not used on the codebase, drop those entries from enum
dm_swizzle_mode.
Signed-off-by: Maíra Canal
---
v1 -> v2:
- Replace "enum" to "enum entries" (André Almeida).
- Describe changes in imperative mood (André Almeida).
---
.../dc/dml/dcn20/display_mode_vba_20.c| 26 +-
.../dc/dml/dcn20/display_mode_vba_20v2.c | 26 +-
.../dc/dml/dcn21/display_mode_vba_21.c| 27 +--
.../amd/display/dc/dml/display_mode_enums.h | 2 --
.../display/dc/dml/dml_wrapper_translation.c | 9 ---
5 files changed, 19 insertions(+), 71 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d3b5b6fedf04..4e4cb0927057 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -938,7 +938,7 @@ static unsigned int CalculateVMAndRowBytes(
*MetaRowByte = 0;
}
- if (SurfaceTiling == dm_sw_linear || SurfaceTiling ==
dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
+ if (SurfaceTiling == dm_sw_linear) {
MacroTileSizeBytes = 256;
MacroTileHeight = BlockHeight256Bytes;
} else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling ==
dm_sw_4kb_s_x
@@ -3347,26 +3347,12 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
== dm_420_8
||
mode_lib->vba.SourcePixelFormat[k]
== dm_420_10))
- || (((mode_lib->vba.SurfaceTiling[k] ==
dm_sw_gfx7_2d_thin_gl
- ||
mode_lib->vba.SurfaceTiling[k]
- ==
dm_sw_gfx7_2d_thin_l_vp)
- &&
!((mode_lib->vba.SourcePixelFormat[k]
- == dm_444_64
+ || (mode_lib->vba.DCCEnable[k] == true
+ &&
(mode_lib->vba.SurfaceTiling[k] == dm_sw_linear
||
mode_lib->vba.SourcePixelFormat[k]
-
== dm_444_32)
- &&
mode_lib->vba.SourceScan[k]
-
== dm_horz
- &&
mode_lib->vba.SupportGFX7CompatibleTilingIn32bppAnd64bpp
-
== true
- &&
mode_lib->vba.DCCEnable[k]
-
== false))
- || (mode_lib->vba.DCCEnable[k]
== true
- &&
(mode_lib->vba.SurfaceTiling[k]
-
== dm_sw_linear
-
|| mode_lib->vba.SourcePixelFormat[k]
-
== dm_420_8
-
|| mode_lib->vba.SourcePixelFormat[k]
-
== dm_420_10 {
+
== dm_420_8
+ ||
mode_lib->vba.SourcePixelFormat[k]
+
== dm_420_10))) {
mode_lib->vba.SourceFormatPixelAndScanSupport = false;
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 63bbdf8b8678..eaa0cdb599ba 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -998,7 +998,7 @@ static unsigned int CalculateVMAndRowBytes(
*MetaRowByte = 0;
}
- i
Re: [PATCH 1/4] drm/amd/display: Drop dm_sw_gfx7_2d_thin_l_vp and dm_sw_gfx7_2d_thin_gl
On 7/21/22 10:31, André Almeida wrote:
> Às 15:22 de 20/07/22, Maíra Canal escreveu:
>> As the enum dm_sw_gfx7_2d_thin_gl and dm_sw_gfx7_2d_thin_l_vp are not
>> used on the codebase, this commit drops those entries from enum
>> dm_swizzle_mode.
>>
>
> dm_sw_gfx7_2d_thin_gl and dm_sw_gfx7_2d_thin_l_vp are not enums, but
> rather enum items or enum entries.
>
> And, as per Linux documentation
>
> Describe your changes in imperative mood, e.g. “make xyzzy do frotz”
> instead of “[This patch] makes xyzzy do frotz”
>
> So replace /this commit drops/drop/
>
Thank you for the feedback, André! I will address them on a v2.
Best Regards,
- Maíra Canal
>> Signed-off-by: Maíra Canal
>> ---
>> .../dc/dml/dcn20/display_mode_vba_20.c| 26 +-
>> .../dc/dml/dcn20/display_mode_vba_20v2.c | 26 +-
>> .../dc/dml/dcn21/display_mode_vba_21.c| 27 +--
>> .../amd/display/dc/dml/display_mode_enums.h | 2 --
>> .../display/dc/dml/dml_wrapper_translation.c | 9 ---
>> 5 files changed, 19 insertions(+), 71 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
>> b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
>> index d3b5b6fedf04..4e4cb0927057 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
>> @@ -938,7 +938,7 @@ static unsigned int CalculateVMAndRowBytes(
>> *MetaRowByte = 0;
>> }
>>
>> -if (SurfaceTiling == dm_sw_linear || SurfaceTiling ==
>> dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
>> +if (SurfaceTiling == dm_sw_linear) {
>> MacroTileSizeBytes = 256;
>> MacroTileHeight = BlockHeight256Bytes;
>> } else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling ==
>> dm_sw_4kb_s_x
>> @@ -3347,26 +3347,12 @@ void
>> dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
>>
>> == dm_420_8
>> ||
>> mode_lib->vba.SourcePixelFormat[k]
>>
>> == dm_420_10))
>> -|| (((mode_lib->vba.SurfaceTiling[k] ==
>> dm_sw_gfx7_2d_thin_gl
>> -||
>> mode_lib->vba.SurfaceTiling[k]
>> -==
>> dm_sw_gfx7_2d_thin_l_vp)
>> -&&
>> !((mode_lib->vba.SourcePixelFormat[k]
>> -== dm_444_64
>> +|| (mode_lib->vba.DCCEnable[k] == true
>> +&&
>> (mode_lib->vba.SurfaceTiling[k] == dm_sw_linear
>> ||
>> mode_lib->vba.SourcePixelFormat[k]
>> -
>> == dm_444_32)
>> -&&
>> mode_lib->vba.SourceScan[k]
>> -
>> == dm_horz
>> -&&
>> mode_lib->vba.SupportGFX7CompatibleTilingIn32bppAnd64bpp
>> -
>> == true
>> -&&
>> mode_lib->vba.DCCEnable[k]
>> -
>> == false))
>> -|| (mode_lib->vba.DCCEnable[k]
>> == true
>> -&&
>> (mode_lib->vba.SurfaceTiling[k]
>> -
>> == dm_sw_linear
>> -
>> || mode_lib->vba.SourcePixelFormat[k]
>> -
>> == dm_420_8
>> -
>> || mode_lib->vba.SourcePixelFormat
Re: [PATCH 5/5] drm/amd/display: move FPU code from dcn301 clk mgr to DML folder
Hi Melissa,
On 7/20/22 16:32, Melissa Wen wrote:
> The -mno-gnu-attribute option in dcn301 clk mgr makefile hides a soft vs
> hard fp error for powerpc. After removing this flag, we can see some FPU
> code remains there:
>
> gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses
> hard float,
> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.o
> uses soft float
>
> Therefore, remove the -mno-gnu-attribute flag for dcn301/powerpc and
> move FPU-associated code to DML folder.
>
> Signed-off-by: Melissa Wen
> ---
> .../gpu/drm/amd/display/dc/clk_mgr/Makefile | 6 --
> .../display/dc/clk_mgr/dcn301/vg_clk_mgr.c| 86 ++-
> .../display/dc/clk_mgr/dcn301/vg_clk_mgr.h| 3 +
> .../amd/display/dc/dml/dcn301/dcn301_fpu.c| 74
> 4 files changed, 84 insertions(+), 85 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile
> b/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile
> index 15b660a951a5..271d8e573181 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile
> @@ -123,12 +123,6 @@ AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR_DCN30)
>
> ###
> CLK_MGR_DCN301 = vg_clk_mgr.o dcn301_smu.o
>
> -# prevent build errors regarding soft-float vs hard-float FP ABI tags
> -# this code is currently unused on ppc64, as it applies to VanGogh APUs only
> -ifdef CONFIG_PPC64
> -CFLAGS_$(AMDDALPATH)/dc/clk_mgr/dcn301/vg_clk_mgr.o := $(call
> cc-option,-mno-gnu-attribute)
> -endif
> -
> AMD_DAL_CLK_MGR_DCN301 = $(addprefix
> $(AMDDALPATH)/dc/clk_mgr/dcn301/,$(CLK_MGR_DCN301))
>
> AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR_DCN301)
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
> b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
> index f310b0d25a07..65f224af03c0 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
> @@ -32,6 +32,10 @@
> // For dcn20_update_clocks_update_dpp_dto
> #include "dcn20/dcn20_clk_mgr.h"
>
> +// For DML FPU code
> +#include "dml/dcn20/dcn20_fpu.h"
> +#include "dml/dcn301/dcn301_fpu.h"
> +
I guess the "dml/dcn301/dcn301_fpu.h" header is not needed, as you only
use dcn21_clk_mgr_set_bw_params_wm_table and the structs are on the
source file.
Besides that, to the whole series:
Reviewed-by: Maíra Canal
Best Regards,
- Maíra Canal
> #include "vg_clk_mgr.h"
> #include "dcn301_smu.h"
> #include "reg_helper.h"
> @@ -526,81 +530,6 @@ static struct clk_bw_params vg_bw_params = {
>
> };
>
> -static struct wm_table ddr4_wm_table = {
> - .entries = {
> - {
> - .wm_inst = WM_A,
> - .wm_type = WM_TYPE_PSTATE_CHG,
> - .pstate_latency_us = 11.72,
> - .sr_exit_time_us = 6.09,
> - .sr_enter_plus_exit_time_us = 7.14,
> - .valid = true,
> - },
> - {
> - .wm_inst = WM_B,
> - .wm_type = WM_TYPE_PSTATE_CHG,
> - .pstate_latency_us = 11.72,
> - .sr_exit_time_us = 10.12,
> - .sr_enter_plus_exit_time_us = 11.48,
> - .valid = true,
> - },
> - {
> - .wm_inst = WM_C,
> - .wm_type = WM_TYPE_PSTATE_CHG,
> - .pstate_latency_us = 11.72,
> - .sr_exit_time_us = 10.12,
> - .sr_enter_plus_exit_time_us = 11.48,
> - .valid = true,
> - },
> - {
> - .wm_inst = WM_D,
> - .wm_type = WM_TYPE_PSTATE_CHG,
> - .pstate_latency_us = 11.72,
> - .sr_exit_time_us = 10.12,
> - .sr_enter_plus_exit_time_us = 11.48,
> - .valid = true,
> - },
> - }
> -};
> -
> -static struct wm_table lpddr5_wm_table = {
> - .entries = {
> - {
> - .wm_inst = WM_A,
> - .wm_type = WM_TYPE_PSTATE_CHG,
> - .pstate_latency_us = 11.65333,
> - .sr_exit_time_us = 13.5,
> - .sr_enter_plus_exit_time_us = 16.5,
> - .valid = true,
> -
[PATCH 4/4] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function
Based on the dml30_CalculateWriteBackDISPCLK, it separates the
DISPCLK calculations on three variables, making no functional changes, in order
to make it more readable and better express that three values are being compared
on dml_max.
Signed-off-by: Maíra Canal
Reviewed-by: André Almeida
---
.../drm/amd/display/dc/dml/display_mode_vba.c | 29 ---
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index c5a0a3649e9a..53a6705b8320 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -1113,20 +1113,27 @@ double CalculateWriteBackDISPCLK(
unsigned int HTotal,
unsigned int WritebackChromaLineBufferWidth)
{
- double CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max(
- dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio,
- dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio,
1) * dml_ceil(WritebackDestinationWidth / 4.0, 1)
+ double DISPCLK_H, DISPCLK_V, DISPCLK_HB, CalculateWriteBackDISPCLK;
+
+ DISPCLK_H = dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio;
+ DISPCLK_V = (WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) *
dml_ceil(WritebackDestinationWidth / 4.0, 1)
+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) /
(double) HTotal + dml_ceil(1.0 / WritebackVRatio, 1)
- * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) /
(double) HTotal,
- dml_ceil(1.0 / WritebackVRatio, 1) *
WritebackDestinationWidth / (double) HTotal));
+ * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) /
(double) HTotal;
+ DISPCLK_HB = dml_ceil(1.0 / WritebackVRatio, 1) *
WritebackDestinationWidth / (double) HTotal;
+
+ CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max3(DISPCLK_H,
DISPCLK_V, DISPCLK_HB);
+
if (WritebackPixelFormat != dm_444_32) {
- CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
1.01 * PixelClock * dml_max(
- dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 *
WritebackHRatio),
- dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 *
WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / 2.0, 1)
- + dml_ceil(WritebackDestinationWidth / 2.0 /
WritebackChromaLineBufferWidth, 1)) / HTotal
- + dml_ceil(1 / (2 * WritebackVRatio), 1) *
(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal,
- dml_ceil(1.0 / (2 * WritebackVRatio), 1) *
WritebackDestinationWidth / 2.0 / HTotal)));
+ DISPCLK_H = dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 *
WritebackHRatio);
+ DISPCLK_V = (WritebackChromaVTaps * dml_ceil(1 / (2 *
WritebackVRatio), 1) *
+ dml_ceil(WritebackDestinationWidth / 4.0, 1) +
+ dml_ceil(WritebackDestinationWidth / 2.0 /
WritebackChromaLineBufferWidth, 1)) / HTotal +
+ dml_ceil(1 / (2 * WritebackVRatio), 1)
*(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal;
+ DISPCLK_HB = dml_ceil(1.0 / (2 * WritebackVRatio), 1) *
WritebackDestinationWidth / 2.0 / HTotal;
+ CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
+ 1.01 * PixelClock * dml_max3(DISPCLK_H,
DISPCLK_V, DISPCLK_HB));
}
+
return CalculateWriteBackDISPCLK;
}
--
2.36.1
[PATCH 3/4] drm/amd/display: Remove parameters from rq_dlg_get_dlg_reg
Across all DCN's (except DCN32, that has a separate
rq_dlg_get_dlg_reg), the parameters const bool vm_en, const bool
ignore_viewport_pos, and const bool immediate_flip_support are not used
on the function. Therefore, the rq_dlg_get_dlg_reg signature is changed
by deleting those parameters.
Signed-off-by: Maíra Canal
---
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 3 +--
.../dc/dml/dcn20/display_rq_dlg_calc_20.c | 5 +
.../dc/dml/dcn20/display_rq_dlg_calc_20.h | 5 +
.../dc/dml/dcn20/display_rq_dlg_calc_20v2.c | 5 +
.../dc/dml/dcn20/display_rq_dlg_calc_20v2.h | 5 +
.../dc/dml/dcn21/display_rq_dlg_calc_21.c | 5 +
.../dc/dml/dcn21/display_rq_dlg_calc_21.h | 5 +
.../dc/dml/dcn30/display_rq_dlg_calc_30.c | 18 +++---
.../dc/dml/dcn30/display_rq_dlg_calc_30.h | 5 +
.../dc/dml/dcn31/display_rq_dlg_calc_31.c | 19 +++
.../dc/dml/dcn31/display_rq_dlg_calc_31.h | 5 +
.../dc/dml/dcn314/display_rq_dlg_calc_314.c | 15 ++-
.../dc/dml/dcn314/display_rq_dlg_calc_314.h | 5 +
.../drm/amd/display/dc/dml/display_mode_lib.h | 5 +
.../gpu/drm/amd/display/dc/dml/dml_wrapper.c | 3 +--
15 files changed, 20 insertions(+), 88 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
index dc60b835e938..d9cfb29a2651 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
@@ -857,8 +857,7 @@ void dcn20_calculate_dlg_params(
pipe_cnt,
pipe_idx,
cstate_en,
-
context->bw_ctx.bw.dcn.clk.p_state_change_support,
- false, false, true);
+
context->bw_ctx.bw.dcn.clk.p_state_change_support);
context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg(>bw_ctx.dml,
>res_ctx.pipe_ctx[i].rq_regs,
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
index 548cdef8a8ad..d0a4c69b47c8 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
@@ -1553,10 +1553,7 @@ void dml20_rq_dlg_get_dlg_reg(struct display_mode_lib
*mode_lib,
const unsigned int num_pipes,
const unsigned int pipe_idx,
const bool cstate_en,
- const bool pstate_en,
- const bool vm_en,
- const bool ignore_viewport_pos,
- const bool immediate_flip_support)
+ const bool pstate_en)
{
display_rq_params_st rq_param = {0};
display_dlg_sys_params_st dlg_sys_param = {0};
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
index 8b23867e97c1..36c3692e53b8 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h
@@ -65,9 +65,6 @@ void dml20_rq_dlg_get_dlg_reg(
const unsigned int num_pipes,
const unsigned int pipe_idx,
const bool cstate_en,
- const bool pstate_en,
- const bool vm_en,
- const bool ignore_viewport_pos,
- const bool immediate_flip_support);
+ const bool pstate_en);
#endif
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
index 0fc9f3e3ffae..17df9d31c11f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
@@ -1554,10 +1554,7 @@ void dml20v2_rq_dlg_get_dlg_reg(struct display_mode_lib
*mode_lib,
const unsigned int num_pipes,
const unsigned int pipe_idx,
const bool cstate_en,
- const bool pstate_en,
- const bool vm_en,
- const bool ignore_viewport_pos,
- const bool immediate_flip_support)
+ const bool pstate_en)
{
display_rq_params_st rq_param = {0};
display_dlg_sys_params_st dlg_sys_param = {0};
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
index 2b4e46ea1c3d..f524f1ccfe41 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
@@ -65,9 +65,6 @@ void dml20v2_rq_dlg_get_dlg_reg(
con
[PATCH 2/4] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK
The functions dml30_CalculateWriteBackDISPCLK and
dml31_CalculateWriteBackDISPCLK are identical. Therefor, to avoid
code duplication, dml31_CalculateWriteBackDISPCLK is removed and
replaced by dml30_CalculateWriteBackDISPCLK.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn31/display_mode_vba_31.c| 24 ++-
.../dc/dml/dcn31/display_mode_vba_31.h| 11 -
2 files changed, 2 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index 3fab19134480..3bc529f0b0fc 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -2085,7 +2085,7 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
if (v->WritebackEnable[k]) {
v->WritebackDISPCLK = dml_max(
v->WritebackDISPCLK,
- dml31_CalculateWriteBackDISPCLK(
+ dml30_CalculateWriteBackDISPCLK(
v->WritebackPixelFormat[k],
v->PixelClock[k],
v->WritebackHRatio[k],
@@ -3470,26 +3470,6 @@ static double CalculateTWait(unsigned int PrefetchMode,
double DRAMClockChangeLa
}
}
-double dml31_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
- double PixelClock,
- double WritebackHRatio,
- double WritebackVRatio,
- unsigned int WritebackHTaps,
- unsigned int WritebackVTaps,
- long WritebackSourceWidth,
- long WritebackDestinationWidth,
- unsigned int HTotal,
- unsigned int WritebackLineBufferSize)
-{
- double DISPCLK_H, DISPCLK_V, DISPCLK_HB;
-
- DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) /
WritebackHRatio;
- DISPCLK_V = PixelClock * (WritebackVTaps *
dml_ceil(WritebackDestinationWidth / 6.0, 1) + 8.0) / HTotal;
- DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth *
WritebackVTaps - WritebackLineBufferSize / 57.0) / 6.0 / WritebackSourceWidth;
- return dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB);
-}
-
static double CalculateWriteBackDelay(
enum source_format_class WritebackPixelFormat,
double WritebackHRatio,
@@ -4055,7 +4035,7 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
if (v->WritebackEnable[k] == true) {
v->WritebackRequiredDISPCLK = dml_max(
v->WritebackRequiredDISPCLK,
- dml31_CalculateWriteBackDISPCLK(
+ dml30_CalculateWriteBackDISPCLK(
v->WritebackPixelFormat[k],
v->PixelClock[k],
v->WritebackHRatio[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
index 90be612f26b2..654362adcaa9 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
@@ -28,16 +28,5 @@
void dml31_recalculate(struct display_mode_lib *mode_lib);
void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
*mode_lib);
-double dml31_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
- double PixelClock,
- double WritebackHRatio,
- double WritebackVRatio,
- unsigned int WritebackHTaps,
- unsigned int WritebackVTaps,
- long WritebackSourceWidth,
- long WritebackDestinationWidth,
- unsigned int HTotal,
- unsigned int WritebackLineBufferSize);
#endif /* __DML31_DISPLAY_MODE_VBA_H__ */
--
2.36.1
[PATCH 1/4] drm/amd/display: Drop dm_sw_gfx7_2d_thin_l_vp and dm_sw_gfx7_2d_thin_gl
As the enum dm_sw_gfx7_2d_thin_gl and dm_sw_gfx7_2d_thin_l_vp are not
used on the codebase, this commit drops those entries from enum
dm_swizzle_mode.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn20/display_mode_vba_20.c| 26 +-
.../dc/dml/dcn20/display_mode_vba_20v2.c | 26 +-
.../dc/dml/dcn21/display_mode_vba_21.c| 27 +--
.../amd/display/dc/dml/display_mode_enums.h | 2 --
.../display/dc/dml/dml_wrapper_translation.c | 9 ---
5 files changed, 19 insertions(+), 71 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d3b5b6fedf04..4e4cb0927057 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -938,7 +938,7 @@ static unsigned int CalculateVMAndRowBytes(
*MetaRowByte = 0;
}
- if (SurfaceTiling == dm_sw_linear || SurfaceTiling ==
dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
+ if (SurfaceTiling == dm_sw_linear) {
MacroTileSizeBytes = 256;
MacroTileHeight = BlockHeight256Bytes;
} else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling ==
dm_sw_4kb_s_x
@@ -3347,26 +3347,12 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
== dm_420_8
||
mode_lib->vba.SourcePixelFormat[k]
== dm_420_10))
- || (((mode_lib->vba.SurfaceTiling[k] ==
dm_sw_gfx7_2d_thin_gl
- ||
mode_lib->vba.SurfaceTiling[k]
- ==
dm_sw_gfx7_2d_thin_l_vp)
- &&
!((mode_lib->vba.SourcePixelFormat[k]
- == dm_444_64
+ || (mode_lib->vba.DCCEnable[k] == true
+ &&
(mode_lib->vba.SurfaceTiling[k] == dm_sw_linear
||
mode_lib->vba.SourcePixelFormat[k]
-
== dm_444_32)
- &&
mode_lib->vba.SourceScan[k]
-
== dm_horz
- &&
mode_lib->vba.SupportGFX7CompatibleTilingIn32bppAnd64bpp
-
== true
- &&
mode_lib->vba.DCCEnable[k]
-
== false))
- || (mode_lib->vba.DCCEnable[k]
== true
- &&
(mode_lib->vba.SurfaceTiling[k]
-
== dm_sw_linear
-
|| mode_lib->vba.SourcePixelFormat[k]
-
== dm_420_8
-
|| mode_lib->vba.SourcePixelFormat[k]
-
== dm_420_10 {
+
== dm_420_8
+ ||
mode_lib->vba.SourcePixelFormat[k]
+
== dm_420_10))) {
mode_lib->vba.SourceFormatPixelAndScanSupport = false;
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 63bbdf8b8678..eaa0cdb599ba 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -998,7 +998,7 @@ static unsigned int CalculateVMAndRowBytes(
*MetaRowByte = 0;
}
- if (SurfaceTiling == dm_sw_linear || SurfaceTiling ==
dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
+ if (SurfaceTil
Re: [PATCH] drm/amd/display: reduce stack size in dcn32 dml
On 7/19/22 18:14, Alex Deucher wrote:
> Move additional dummy structures off the stack and into
> the dummy vars structure.
>
> Fixes the following:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c: In
> function
> 'DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation':
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1659:1:
> error: the frame size of 2144 bytes is larger than 2048 bytes
> [-Werror=frame-larger-than=]
> 1659 | }
> | ^
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c: In
> function 'dml32_ModeSupportAndSystemConfigurationFull':
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:3799:1:
> error: the frame size of 2464 bytes is larger than 2048 bytes
> [-Werror=frame-larger-than=]
> 3799 | } // ModeSupportAndSystemConfigurationFull
> | ^
>
> Signed-off-by: Alex Deucher
> Cc: Stephen Rothwell
> ---
Reviewed-by: Maíra Canal
I believe dcn20 could also receive the same treatment, as I'm still
getting a similar warning on display_mode_vba_20.c:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.c:1085:13:
warning: stack frame size (1356) exceeds limit (1024) in
'dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation'
[-Wframe-larger-than]
static void
dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.c:3286:6:
warning: stack frame size (1484) exceeds limit (1024) in
'dml20_ModeSupportAndSystemConfigurationFull' [-Wframe-larger-than]
void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
*mode_lib)
^
2 warnings generated.
To reproduce it on clang-14, you can run:
make -skj"$(nproc)" LLVM=1 LLVM_IAS=1 i386_defconfig
scripts/config -e DRM_AMDGPU
make -skj"$(nproc)" LLVM=1 LLVM_IAS=1 olddefconfig
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.o
I believe it is also reproducible on GCC.
Best regards,
- Maíra Canal
> .../dc/dml/dcn32/display_mode_vba_32.c| 214 --
> .../drm/amd/display/dc/dml/display_mode_vba.h | 3 +
> 2 files changed, 100 insertions(+), 117 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
> b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
> index 349e36ae9333..441311cb9a86 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
> @@ -67,6 +67,18 @@ static void
> DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
> int iteration;
> double MaxTotalRDBandwidth;
> unsigned int NextPrefetchMode;
> + double MaxTotalRDBandwidthNoUrgentBurst = 0.0;
> + bool DestinationLineTimesForPrefetchLessThan2 = false;
> + bool VRatioPrefetchMoreThanMax = false;
> + double dummy_unit_vector[DC__NUM_DPP__MAX];
> + double TWait;
> + double dummy_single[2];
> + bool dummy_boolean[1];
> + enum clock_change_support dummy_dramchange_support;
> + enum dm_fclock_change_support dummy_fclkchange_support;
> + bool dummy_USRRetrainingSupport;
> + double TotalWRBandwidth = 0;
> + double WRBandwidth = 0;
>
> #ifdef __DML_VBA_DEBUG__
> dml_print("DML::%s: --- START ---\n", __func__);
> @@ -702,11 +714,6 @@ static void
> DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
> NextPrefetchMode =
> mode_lib->vba.PrefetchModePerState[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb];
>
> do {
> - double MaxTotalRDBandwidthNoUrgentBurst = 0.0;
> - bool DestinationLineTimesForPrefetchLessThan2 = false;
> - bool VRatioPrefetchMoreThanMax = false;
> - double dummy_unit_vector[DC__NUM_DPP__MAX];
> -
> MaxTotalRDBandwidth = 0;
> #ifdef __DML_VBA_DEBUG__
> dml_print("DML::%s: Start loop: VStartup = %d\n", __func__,
> mode_lib->vba.VStartupLines);
> @@ -715,41 +722,39 @@ static void
> DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
> /* NOTE PerfetchMode variable is invalid in DAL as per
> the input received.
>* Hence the direction is to use PrefetchModePerState.
>*/
> - double TWait = dml32_CalculateTWait(
> -
> mode_lib->vba.PrefetchModePerState[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb],
> -
Re: [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK
On 7/18/22 16:02, Alex Deucher wrote:
> On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal wrote:
>>
>> The parameters WritebackPixelFormat and WritebackVRatio are removed as
>> they are not used on the function dml30_CalculateWriteBackDISPCLK.
>
> Maybe this is done for consistency with other dml code for other DCN blocks?
>
> Alex
This is reasonable. Anyway, the functions
dml30_CalculateWriteBackDISPCLK and dml31_CalculateWriteBackDISPCLK are
identical. May I send a v2 from PATCH 11/12 with the original function
signature?
Best Regards,
- Maíra Canal
>
>>
>> Signed-off-by: Maíra Canal
>> ---
>> drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c| 2 --
>> .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 6 --
>> .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h | 2 --
>> 3 files changed, 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
>> b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
>> index a8db1306750e..746bb93ade6c 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
>> @@ -322,10 +322,8 @@ void dcn30_fpu_populate_dml_writeback_from_context(
>> * parameters per pipe
>> */
>> writeback_dispclk =
>> dml30_CalculateWriteBackDISPCLK(
>> - dout_wb.wb_pixel_format,
>>
>> pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,
>> dout_wb.wb_hratio,
>> - dout_wb.wb_vratio,
>> dout_wb.wb_htaps_luma,
>> dout_wb.wb_vtaps_luma,
>> dout_wb.wb_src_width,
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
>> b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
>> index 876b321b30ca..37049daaab4c 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
>> @@ -1938,10 +1938,8 @@ static void
>> DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
>> if (v->WritebackEnable[k]) {
>> v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK,
>> dml30_CalculateWriteBackDISPCLK(
>> - v->WritebackPixelFormat[k],
>> v->PixelClock[k],
>> v->WritebackHRatio[k],
>> - v->WritebackVRatio[k],
>> v->WritebackHTaps[k],
>> v->WritebackVTaps[k],
>> v->WritebackSourceWidth[k],
>> @@ -3284,10 +3282,8 @@ static double CalculateTWait(
>> }
>>
>> double dml30_CalculateWriteBackDISPCLK(
>> - enum source_format_class WritebackPixelFormat,
>> double PixelClock,
>> double WritebackHRatio,
>> - double WritebackVRatio,
>> unsigned int WritebackHTaps,
>> unsigned int WritebackVTaps,
>> long WritebackSourceWidth,
>> @@ -3794,10 +3790,8 @@ void
>> dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
>> if (v->WritebackEnable[k] == true) {
>> v->WritebackRequiredDISPCLK =
>> dml_max(v->WritebackRequiredDISPCLK,
>> dml30_CalculateWriteBackDISPCLK(
>> -
>> v->WritebackPixelFormat[k],
>> v->PixelClock[k],
>>
>> v->WritebackHRatio[k],
>> -
>> v->WritebackVRatio[k],
>> v->WritebackHTaps[k],
>> v->WritebackVTaps[k],
>>
>> v->
[PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function
Based on the dml30_CalculateWriteBackDISPCLK, it separates the
DISPCLK calculations on three variables, making no functional changes, in order
to make it more readable and better express that three values are being compared
on dml_max.
Signed-off-by: Maíra Canal
---
.../drm/amd/display/dc/dml/display_mode_vba.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index c5a0a3649e9a..5fc1d16a2e15 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -1113,20 +1113,29 @@ double CalculateWriteBackDISPCLK(
unsigned int HTotal,
unsigned int WritebackChromaLineBufferWidth)
{
- double CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max(
- dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio,
- dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio,
1) * dml_ceil(WritebackDestinationWidth / 4.0, 1)
+
+ double DISPCLK_H = 0, DISPCLK_V = 0, DISPCLK_HB = 0;
+ double CalculateWriteBackDISPCLK = 0;
+
+ DISPCLK_H = dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio;
+ DISPCLK_V = (WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) *
dml_ceil(WritebackDestinationWidth / 4.0, 1)
+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) /
(double) HTotal + dml_ceil(1.0 / WritebackVRatio, 1)
- * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) /
(double) HTotal,
- dml_ceil(1.0 / WritebackVRatio, 1) *
WritebackDestinationWidth / (double) HTotal));
+ * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) /
(double) HTotal;
+ DISPCLK_HB = dml_ceil(1.0 / WritebackVRatio, 1) *
WritebackDestinationWidth / (double) HTotal;
+
+ CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max3(DISPCLK_H,
DISPCLK_V, DISPCLK_HB);
+
if (WritebackPixelFormat != dm_444_32) {
- CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
1.01 * PixelClock * dml_max(
- dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 *
WritebackHRatio),
- dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 *
WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / 2.0, 1)
- + dml_ceil(WritebackDestinationWidth / 2.0 /
WritebackChromaLineBufferWidth, 1)) / HTotal
- + dml_ceil(1 / (2 * WritebackVRatio), 1) *
(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal,
- dml_ceil(1.0 / (2 * WritebackVRatio), 1) *
WritebackDestinationWidth / 2.0 / HTotal)));
+ DISPCLK_H = dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 *
WritebackHRatio);
+ DISPCLK_V = (WritebackChromaVTaps * dml_ceil(1 / (2 *
WritebackVRatio), 1) *
+ dml_ceil(WritebackDestinationWidth / 4.0, 1) +
+ dml_ceil(WritebackDestinationWidth / 2.0 /
WritebackChromaLineBufferWidth, 1)) / HTotal +
+ dml_ceil(1 / (2 * WritebackVRatio), 1)
*(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal;
+ DISPCLK_HB = dml_ceil(1.0 / (2 * WritebackVRatio), 1) *
WritebackDestinationWidth / 2.0 / HTotal;
+ CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
+ 1.01 * PixelClock * dml_max3(DISPCLK_H,
DISPCLK_V, DISPCLK_HB));
}
+
return CalculateWriteBackDISPCLK;
}
--
2.36.1
[PATCH 11/12] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK
The functions dml30_CalculateWriteBackDISPCLK and
dml31_CalculateWriteBackDISPCLK are identical. Therefor, to avoid
code duplication, dml31_CalculateWriteBackDISPCLK is removed and
replaced by dml30_CalculateWriteBackDISPCLK.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn31/display_mode_vba_31.c| 28 ++-
.../dc/dml/dcn31/display_mode_vba_31.h| 11
2 files changed, 2 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index 3fab19134480..804e45e22693 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -2085,11 +2085,9 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
if (v->WritebackEnable[k]) {
v->WritebackDISPCLK = dml_max(
v->WritebackDISPCLK,
- dml31_CalculateWriteBackDISPCLK(
-
v->WritebackPixelFormat[k],
+ dml30_CalculateWriteBackDISPCLK(
v->PixelClock[k],
v->WritebackHRatio[k],
- v->WritebackVRatio[k],
v->WritebackHTaps[k],
v->WritebackVTaps[k],
v->WritebackSourceWidth[k],
@@ -3470,26 +3468,6 @@ static double CalculateTWait(unsigned int PrefetchMode,
double DRAMClockChangeLa
}
}
-double dml31_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
- double PixelClock,
- double WritebackHRatio,
- double WritebackVRatio,
- unsigned int WritebackHTaps,
- unsigned int WritebackVTaps,
- long WritebackSourceWidth,
- long WritebackDestinationWidth,
- unsigned int HTotal,
- unsigned int WritebackLineBufferSize)
-{
- double DISPCLK_H, DISPCLK_V, DISPCLK_HB;
-
- DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) /
WritebackHRatio;
- DISPCLK_V = PixelClock * (WritebackVTaps *
dml_ceil(WritebackDestinationWidth / 6.0, 1) + 8.0) / HTotal;
- DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth *
WritebackVTaps - WritebackLineBufferSize / 57.0) / 6.0 / WritebackSourceWidth;
- return dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB);
-}
-
static double CalculateWriteBackDelay(
enum source_format_class WritebackPixelFormat,
double WritebackHRatio,
@@ -4055,11 +4033,9 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
if (v->WritebackEnable[k] == true) {
v->WritebackRequiredDISPCLK = dml_max(
v->WritebackRequiredDISPCLK,
- dml31_CalculateWriteBackDISPCLK(
-
v->WritebackPixelFormat[k],
+ dml30_CalculateWriteBackDISPCLK(
v->PixelClock[k],
v->WritebackHRatio[k],
- v->WritebackVRatio[k],
v->WritebackHTaps[k],
v->WritebackVTaps[k],
v->WritebackSourceWidth[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
index 90be612f26b2..654362adcaa9 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
@@ -28,16 +28,5 @@
void dml31_recalculate(struct display_mode_lib *mode_lib);
void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
*mode_lib);
-double dml31_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
- double PixelClock,
- double WritebackHRatio,
- double WritebackVRatio,
- unsigned int WritebackHTaps,
- unsigned int WritebackVTaps,
- long WritebackSourceWidth,
- long WritebackDestinationWidth,
- unsigned int HTotal,
- unsigned int Writeba
[PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK
The parameters WritebackPixelFormat and WritebackVRatio are removed as
they are not used on the function dml30_CalculateWriteBackDISPCLK.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c| 2 --
.../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 6 --
.../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h | 2 --
3 files changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
index a8db1306750e..746bb93ade6c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
@@ -322,10 +322,8 @@ void dcn30_fpu_populate_dml_writeback_from_context(
* parameters per pipe
*/
writeback_dispclk =
dml30_CalculateWriteBackDISPCLK(
- dout_wb.wb_pixel_format,
pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,
dout_wb.wb_hratio,
- dout_wb.wb_vratio,
dout_wb.wb_htaps_luma,
dout_wb.wb_vtaps_luma,
dout_wb.wb_src_width,
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index 876b321b30ca..37049daaab4c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -1938,10 +1938,8 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
if (v->WritebackEnable[k]) {
v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK,
dml30_CalculateWriteBackDISPCLK(
- v->WritebackPixelFormat[k],
v->PixelClock[k],
v->WritebackHRatio[k],
- v->WritebackVRatio[k],
v->WritebackHTaps[k],
v->WritebackVTaps[k],
v->WritebackSourceWidth[k],
@@ -3284,10 +3282,8 @@ static double CalculateTWait(
}
double dml30_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
double PixelClock,
double WritebackHRatio,
- double WritebackVRatio,
unsigned int WritebackHTaps,
unsigned int WritebackVTaps,
long WritebackSourceWidth,
@@ -3794,10 +3790,8 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
if (v->WritebackEnable[k] == true) {
v->WritebackRequiredDISPCLK =
dml_max(v->WritebackRequiredDISPCLK,
dml30_CalculateWriteBackDISPCLK(
-
v->WritebackPixelFormat[k],
v->PixelClock[k],
v->WritebackHRatio[k],
- v->WritebackVRatio[k],
v->WritebackHTaps[k],
v->WritebackVTaps[k],
v->WritebackSourceWidth[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
index daaf0883b84d..12c070434eee 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
@@ -29,10 +29,8 @@
void dml30_recalculate(struct display_mode_lib *mode_lib);
void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib
*mode_lib);
double dml30_CalculateWriteBackDISPCLK(
- enum source_format_class WritebackPixelFormat,
double PixelClock,
double WritebackHRatio,
- double WritebackVRatio,
unsigned int WritebackHTaps,
unsigned int WritebackVTaps,
long WritebackSourceWidth,
--
2.36.1
[PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable
Remove the variable MaxUsedBW from the function
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.
As a side-effect, the variables MaxPerPlaneVActiveWRBandwidth and
WRBandwidth are also removed.
This was pointed by clang with the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3043:10:
warning: variable 'MaxUsedBW' set but not used [-Wunused-but-set-variable]
double MaxUsedBW = 0;
^
1 warning generated.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn30/display_mode_vba_30.c| 28 ---
1 file changed, 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index 842eb94ebe04..876b321b30ca 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -3037,40 +3037,12 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
{
//Maximum Bandwidth Used
- double TotalWRBandwidth = 0;
- double MaxPerPlaneVActiveWRBandwidth = 0;
- double WRBandwidth = 0;
- double MaxUsedBW = 0;
- for (k = 0; k < v->NumberOfActivePlanes; ++k) {
- if (v->WritebackEnable[k] == true
- && v->WritebackPixelFormat[k] ==
dm_444_32) {
- WRBandwidth = v->WritebackDestinationWidth[k] *
v->WritebackDestinationHeight[k]
- / (v->HTotal[k] *
v->WritebackSourceHeight[k] / v->PixelClock[k]) * 4;
- } else if (v->WritebackEnable[k] == true) {
- WRBandwidth = v->WritebackDestinationWidth[k] *
v->WritebackDestinationHeight[k]
- / (v->HTotal[k] *
v->WritebackSourceHeight[k] / v->PixelClock[k]) * 8;
- }
- TotalWRBandwidth = TotalWRBandwidth + WRBandwidth;
- MaxPerPlaneVActiveWRBandwidth =
dml_max(MaxPerPlaneVActiveWRBandwidth, WRBandwidth);
- }
-
v->TotalDataReadBandwidth = 0;
for (k = 0; k < v->NumberOfActivePlanes; ++k) {
v->TotalDataReadBandwidth = v->TotalDataReadBandwidth
+ v->ReadBandwidthPlaneLuma[k]
+ v->ReadBandwidthPlaneChroma[k];
}
-
- {
- double MaxPerPlaneVActiveRDBandwidth = 0;
- for (k = 0; k < v->NumberOfActivePlanes; ++k) {
- MaxPerPlaneVActiveRDBandwidth =
dml_max(MaxPerPlaneVActiveRDBandwidth,
- v->ReadBandwidthPlaneLuma[k] +
v->ReadBandwidthPlaneChroma[k]);
-
- }
- }
-
- MaxUsedBW = MaxTotalRDBandwidth + TotalWRBandwidth;
}
// VStartup Margin
--
2.36.1
[PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder
The variable regval from the function enc1_update_generic_info_packet
and the variables dynamic_range_rgb and dynamic_range_ycbcr from the
function enc1_stream_encoder_dp_set_stream_attribute are not currently
used.
This was pointed by clang with the following warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:62:11:
warning: variable 'regval' set but not used [-Wunused-but-set-variable]
uint32_t regval;
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:262:10:
warning: variable 'dynamic_range_rgb' set but not used
[-Wunused-but-set-variable]
uint8_t dynamic_range_rgb = 0; /*full range*/
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:263:10:
warning: variable 'dynamic_range_ycbcr' set but not used
[-Wunused-but-set-variable]
uint8_t dynamic_range_ycbcr = 1; /*bt709*/
^
3 warnings generated.
Signed-off-by: Maíra Canal
---
.../drm/amd/display/dc/dcn10/dcn10_stream_encoder.c| 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index c99c6fababa9..484e7cdf00b8 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -59,7 +59,6 @@ void enc1_update_generic_info_packet(
uint32_t packet_index,
const struct dc_info_packet *info_packet)
{
- uint32_t regval;
/* TODOFPGA Figure out a proper number for max_retries polling for lock
* use 50 for now.
*/
@@ -88,7 +87,6 @@ void enc1_update_generic_info_packet(
REG_UPDATE(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, 1);
/* choose which generic packet to use */
- regval = REG_READ(AFMT_VBI_PACKET_CONTROL);
REG_UPDATE(AFMT_VBI_PACKET_CONTROL,
AFMT_GENERIC_INDEX, packet_index);
@@ -259,8 +257,6 @@ void enc1_stream_encoder_dp_set_stream_attribute(
uint32_t h_back_porch;
uint8_t synchronous_clock = 0; /* asynchronous mode */
uint8_t colorimetry_bpc;
- uint8_t dynamic_range_rgb = 0; /*full range*/
- uint8_t dynamic_range_ycbcr = 1; /*bt709*/
uint8_t dp_pixel_encoding = 0;
uint8_t dp_component_depth = 0;
@@ -372,18 +368,15 @@ void enc1_stream_encoder_dp_set_stream_attribute(
switch (output_color_space) {
case COLOR_SPACE_SRGB:
misc1 = misc1 & ~0x80; /* bit7 = 0*/
- dynamic_range_rgb = 0; /*full range*/
break;
case COLOR_SPACE_SRGB_LIMITED:
misc0 = misc0 | 0x8; /* bit3=1 */
misc1 = misc1 & ~0x80; /* bit7 = 0*/
- dynamic_range_rgb = 1; /*limited range*/
break;
case COLOR_SPACE_YCBCR601:
case COLOR_SPACE_YCBCR601_LIMITED:
misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */
misc1 = misc1 & ~0x80; /* bit7 = 0*/
- dynamic_range_ycbcr = 0; /*bt601*/
if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */
else if (hw_crtc_timing.pixel_encoding ==
PIXEL_ENCODING_YCBCR444)
@@ -393,15 +386,12 @@ void enc1_stream_encoder_dp_set_stream_attribute(
case COLOR_SPACE_YCBCR709_LIMITED:
misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */
misc1 = misc1 & ~0x80; /* bit7 = 0*/
- dynamic_range_ycbcr = 1; /*bt709*/
if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */
else if (hw_crtc_timing.pixel_encoding ==
PIXEL_ENCODING_YCBCR444)
misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */
break;
case COLOR_SPACE_2020_RGB_LIMITEDRANGE:
- dynamic_range_rgb = 1; /*limited range*/
- break;
case COLOR_SPACE_2020_RGB_FULLRANGE:
case COLOR_SPACE_2020_YCBCR:
case COLOR_SPACE_XR_RGB:
--
2.36.1
[PATCH 07/12] drm/amd/display: Remove unused value0 variable
Remove the variable value0 from the function
dcn10_link_encoder_update_mst_stream_allocation_table.
This was pointed by clang with the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.c:1223:11:
warning: variable 'value0' set but not used [-Wunused-but-set-variable]
uint32_t value0 = 0;
^
1 warning generated.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
index fbccb7263ad2..ea7d89bc293f 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
@@ -1220,7 +1220,6 @@ void
dcn10_link_encoder_update_mst_stream_allocation_table(
const struct link_mst_stream_allocation_table *table)
{
struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
- uint32_t value0 = 0;
uint32_t value1 = 0;
uint32_t value2 = 0;
uint32_t slots = 0;
@@ -1322,8 +1321,6 @@ void
dcn10_link_encoder_update_mst_stream_allocation_table(
do {
udelay(10);
- value0 = REG_READ(DP_MSE_SAT_UPDATE);
-
REG_GET(DP_MSE_SAT_UPDATE,
DP_MSE_SAT_UPDATE, );
--
2.36.1
[PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params
Remove the variables dispclk_delay_subtotal and dppclk_delay_subtotal from
the function dml_rq_dlg_get_dlg_params.
This was pointed by clang with the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:920:15:
warning: variable 'dispclk_delay_subtotal' set but not used
[-Wunused-but-set-variable]
unsigned int dispclk_delay_subtotal;
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:919:15:
warning: variable 'dppclk_delay_subtotal' set but not used
[-Wunused-but-set-variable]
unsigned int dppclk_delay_subtotal;
^
2 warnings generated.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn31/display_rq_dlg_calc_31.c | 19 ---
1 file changed, 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
index c94cf6e01e25..66b82e4f05c6 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
@@ -866,7 +866,6 @@ static void dml_rq_dlg_get_dlg_params(
{
const display_pipe_source_params_st *src =
_pipe_param[pipe_idx].pipe.src;
const display_pipe_dest_params_st *dst =
_pipe_param[pipe_idx].pipe.dest;
- const display_output_params_st *dout = _pipe_param[pipe_idx].dout;
const display_clocks_and_cfg_st *clks =
_pipe_param[pipe_idx].clks_cfg;
const scaler_ratio_depth_st *scl =
_pipe_param[pipe_idx].pipe.scale_ratio_depth;
const scaler_taps_st *taps = _pipe_param[pipe_idx].pipe.scale_taps;
@@ -916,9 +915,6 @@ static void dml_rq_dlg_get_dlg_params(
unsigned int vupdate_width;
unsigned int vready_offset;
- unsigned int dppclk_delay_subtotal;
- unsigned int dispclk_delay_subtotal;
-
unsigned int vstartup_start;
unsigned int dst_x_after_scaler;
unsigned int dst_y_after_scaler;
@@ -1037,21 +1033,6 @@ static void dml_rq_dlg_get_dlg_params(
vupdate_width = dst->vupdate_width;
vready_offset = dst->vready_offset;
- dppclk_delay_subtotal = mode_lib->ip.dppclk_delay_subtotal;
- dispclk_delay_subtotal = mode_lib->ip.dispclk_delay_subtotal;
-
- if (scl_enable)
- dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl;
- else
- dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl_lb_only;
-
- dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_cnvc_formatter +
src->num_cursors * mode_lib->ip.dppclk_delay_cnvc_cursor;
-
- if (dout->dsc_enable) {
- double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param,
num_pipes, pipe_idx); // FROM VBA
- dispclk_delay_subtotal += dsc_delay;
- }
-
vstartup_start = dst->vstartup_start;
if (interlaced) {
if (vstartup_start / 2.0 - (double) (vready_offset +
vupdate_width + vupdate_offset) / htotal <= vblank_end / 2.0)
--
2.36.1
[PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable
Remove the unused unsigned int NumberOfStates from the file, which was declared but never hooked up. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:33:27: warning: unused variable 'NumberOfStates' [-Wunused-const-variable] static const unsigned int NumberOfStates = DC__VOLTAGE_STATES; ^ 1 warning generated. Signed-off-by: Maíra Canal --- drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index c6c3a9e6731a..dff8f8f27de4 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -30,8 +30,6 @@ #include "../dml_inline_defs.h" #include "display_mode_vba_util_32.h" -static const unsigned int NumberOfStates = DC__VOLTAGE_STATES; - void dml32_recalculate(struct display_mode_lib *mode_lib); static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation( struct display_mode_lib *mode_lib); -- 2.36.1
[PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function
Remove dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function, which is not
used in
the codebase.
This was pointed by clang with the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:6:
warning: no previous prototype for function
'dml32_CalculatedoublePipeDPPCLKAndSCLThroughput' [-Wmissing-prototypes]
void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:1:
note: declare 'static' if the function is not intended to be used outside of
this translation unit
void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
^
static
1 warning generated.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn32/display_mode_vba_util_32.c | 54 ---
1 file changed, 54 deletions(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 5a701d9df0f7..4d62ab0c1a78 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -390,60 +390,6 @@ void dml32_CalculateBytePerPixelAndBlockSizes(
#endif
} // CalculateBytePerPixelAndBlockSizes
-void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
- double HRatio,
- double HRatioChroma,
- double VRatio,
- double VRatioChroma,
- double MaxDCHUBToPSCLThroughput,
- double MaxPSCLToLBThroughput,
- double PixelClock,
- enum source_format_class SourcePixelFormat,
- unsigned int HTaps,
- unsigned int HTapsChroma,
- unsigned int VTaps,
- unsigned int VTapsChroma,
-
- /* output */
- double *PSCL_THROUGHPUT,
- double *PSCL_THROUGHPUT_CHROMA,
- double *DPPCLKUsingdoubleDPP)
-{
- double DPPCLKUsingdoubleDPPLuma;
- double DPPCLKUsingdoubleDPPChroma;
-
- if (HRatio > 1) {
- *PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput,
MaxPSCLToLBThroughput * HRatio /
- dml_ceil((double) HTaps / 6.0, 1.0));
- } else {
- *PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput,
MaxPSCLToLBThroughput);
- }
-
- DPPCLKUsingdoubleDPPLuma = PixelClock * dml_max3(VTaps / 6 * dml_min(1,
HRatio), HRatio * VRatio /
- *PSCL_THROUGHPUT, 1);
-
- if ((HTaps > 6 || VTaps > 6) && DPPCLKUsingdoubleDPPLuma < 2 *
PixelClock)
- DPPCLKUsingdoubleDPPLuma = 2 * PixelClock;
-
- if ((SourcePixelFormat != dm_420_8 && SourcePixelFormat != dm_420_10 &&
SourcePixelFormat != dm_420_12 &&
- SourcePixelFormat != dm_rgbe_alpha)) {
- *PSCL_THROUGHPUT_CHROMA = 0;
- *DPPCLKUsingdoubleDPP = DPPCLKUsingdoubleDPPLuma;
- } else {
- if (HRatioChroma > 1) {
- *PSCL_THROUGHPUT_CHROMA =
dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput *
- HRatioChroma / dml_ceil((double)
HTapsChroma / 6.0, 1.0));
- } else {
- *PSCL_THROUGHPUT_CHROMA =
dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput);
- }
- DPPCLKUsingdoubleDPPChroma = PixelClock * dml_max3(VTapsChroma
/ 6 * dml_min(1, HRatioChroma),
- HRatioChroma * VRatioChroma /
*PSCL_THROUGHPUT_CHROMA, 1);
- if ((HTapsChroma > 6 || VTapsChroma > 6) &&
DPPCLKUsingdoubleDPPChroma < 2 * PixelClock)
- DPPCLKUsingdoubleDPPChroma = 2 * PixelClock;
- *DPPCLKUsingdoubleDPP = dml_max(DPPCLKUsingdoubleDPPLuma,
DPPCLKUsingdoubleDPPChroma);
- }
-}
-
void dml32_CalculateSwathAndDETConfiguration(
unsigned int DETSizeOverride[],
enum dm_use_mall_for_pstate_change_mode
UseMALLForPStateChange[],
--
2.36.1
[PATCH 03/12] drm/amd/display: Remove unused clk_src variable
Remove the variable clk_src from the function dcn3_get_pix_clk_dividers.
This was pointed by clang with the following warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25:
warning:
variable 'clk_src' set but not used [-Wunused-but-set-variable]
struct dce110_clk_src *clk_src;
^
1 warning generated.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 5cc7cc0b2f2d..d55da1ab1ac2 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -1276,9 +1276,7 @@ static uint32_t dcn3_get_pix_clk_dividers(
struct pll_settings *pll_settings)
{
unsigned long long actual_pix_clk_100Hz = pix_clk_params ?
pix_clk_params->requested_pix_clk_100hz : 0;
- struct dce110_clk_src *clk_src;
- clk_src = TO_DCE110_CLK_SRC(cs);
DC_LOGGER_INIT();
if (pix_clk_params == NULL || pll_settings == NULL
--
2.36.1
[PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope
Turn previously global function into a static function as it is not used
outside the file.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 +-
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 39f93072b5e0..c5a0a3649e9a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -251,7 +251,7 @@ unsigned int get_total_surface_size_in_mall_bytes(
return size;
}
-unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int
plane_idx)
+static unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned
int plane_idx)
{
int pipe_idx = -1;
int i;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 47b149d4bfcf..6e61b5382361 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -165,7 +165,6 @@ unsigned int get_total_surface_size_in_mall_bytes(
struct display_mode_lib *mode_lib,
const display_e2e_pipe_params_st *pipes,
unsigned int num_pipes);
-unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int
plane_idx);
bool get_is_phantom_pipe(struct display_mode_lib *mode_lib,
const display_e2e_pipe_params_st *pipes,
--
2.36.1
[PATCH 01/12] drm/amdgpu: Write masked value to control register
On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
should be written into the control register instead of 0.
Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index f5a29526684d..0a7b1c002822 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -339,7 +339,7 @@ static void dce_v6_0_hpd_fini(struct amdgpu_device *adev)
tmp = RREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd]);
tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;
- WREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd], 0);
+ WREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd], tmp);
amdgpu_irq_put(adev, >hpd_irq, amdgpu_connector->hpd.hpd);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 780a8aa972fe..f57f4a25cf5a 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -333,7 +333,7 @@ static void dce_v8_0_hpd_fini(struct amdgpu_device *adev)
tmp = RREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd]);
tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;
- WREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd], 0);
+ WREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd], tmp);
amdgpu_irq_put(adev, >hpd_irq, amdgpu_connector->hpd.hpd);
}
--
2.36.1
[PATCH] drm/amd/display: Drop dm_sw_gfx7_2d_thin_l_vp and dm_sw_gfx7_2d_thin_gl
As the enum dm_sw_gfx7_2d_thin_gl and dm_sw_gfx7_2d_thin_l_vp are not
used on the codebase, this commit drops those entries from enum
dm_swizzle_mode.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn20/display_mode_vba_20.c| 26 +-
.../dc/dml/dcn20/display_mode_vba_20v2.c | 26 +-
.../dc/dml/dcn21/display_mode_vba_21.c| 27 +--
.../amd/display/dc/dml/display_mode_enums.h | 2 --
.../display/dc/dml/dml_wrapper_translation.c | 9 ---
5 files changed, 19 insertions(+), 71 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d3b5b6fedf04..4e4cb0927057 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -938,7 +938,7 @@ static unsigned int CalculateVMAndRowBytes(
*MetaRowByte = 0;
}
- if (SurfaceTiling == dm_sw_linear || SurfaceTiling ==
dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
+ if (SurfaceTiling == dm_sw_linear) {
MacroTileSizeBytes = 256;
MacroTileHeight = BlockHeight256Bytes;
} else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling ==
dm_sw_4kb_s_x
@@ -3347,26 +3347,12 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
== dm_420_8
||
mode_lib->vba.SourcePixelFormat[k]
== dm_420_10))
- || (((mode_lib->vba.SurfaceTiling[k] ==
dm_sw_gfx7_2d_thin_gl
- ||
mode_lib->vba.SurfaceTiling[k]
- ==
dm_sw_gfx7_2d_thin_l_vp)
- &&
!((mode_lib->vba.SourcePixelFormat[k]
- == dm_444_64
+ || (mode_lib->vba.DCCEnable[k] == true
+ &&
(mode_lib->vba.SurfaceTiling[k] == dm_sw_linear
||
mode_lib->vba.SourcePixelFormat[k]
-
== dm_444_32)
- &&
mode_lib->vba.SourceScan[k]
-
== dm_horz
- &&
mode_lib->vba.SupportGFX7CompatibleTilingIn32bppAnd64bpp
-
== true
- &&
mode_lib->vba.DCCEnable[k]
-
== false))
- || (mode_lib->vba.DCCEnable[k]
== true
- &&
(mode_lib->vba.SurfaceTiling[k]
-
== dm_sw_linear
-
|| mode_lib->vba.SourcePixelFormat[k]
-
== dm_420_8
-
|| mode_lib->vba.SourcePixelFormat[k]
-
== dm_420_10 {
+
== dm_420_8
+ ||
mode_lib->vba.SourcePixelFormat[k]
+
== dm_420_10))) {
mode_lib->vba.SourceFormatPixelAndScanSupport = false;
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 63bbdf8b8678..eaa0cdb599ba 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -998,7 +998,7 @@ static unsigned int CalculateVMAndRowBytes(
*MetaRowByte = 0;
}
- if (SurfaceTiling == dm_sw_linear || SurfaceTiling ==
dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) {
+ if (SurfaceTil
Re: [PATCH] drm/amdkfd: Fix warnings from static analyzer Smatch
On 7/5/22 15:43, Errabolu, Ramesh wrote:
> [AMD Official Use Only - General]
>
> Maira,
>
> Thanks for taking time to review. I understand the request to tag the patch
> as version 2. However I don't follow your comments on "Fixes" block. Looking
> at the git log of the branch I see many "Fixes" block that precede the
> "Signed-off-by" statement.
>
Hi Ramesh,
The canonical patch format is basically, as described by [1]:
...
Signed-off-by: Author
---
V2 -> V3: Removed redundant helper function
V1 -> V2: Cleaned up coding style and addressed review comments
path/to/file | 5+++--
...
So, on your case, we have the commit message describing the warning
reported by Smatch and the error log, then we got the tags. The tags
should be in chronological order, so your tags should be:
Fixes: 40d6aa758b13 ("drm/amdkfd: Extend KFD device topology to surface
peer-to-peer links")
Reported-by: Dan Carpenter
Signed-off-by: Ramesh Errabolu
See that this canonical format reflects the chronological history of the
patch insofar as possible. After the ---, you describe the changes
between v1 and v2 in a small changelog.
The documentation linked in [1] explains this in details. So, some
examples are exposed in [2], [3] and [4].
[1] https://docs.kernel.org/process/submitting-patches.html
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1db88c5343712e411a2dd45375f27c477e33dc07
[3]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=34ad61514c4c3657df21a058f9961c3bb2f84ff2
[4]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d3f2a14b8906df913cb04a706367b012db94a6e8
Best Regards,
- Maíra Canal
> Could you provide an example.
>
> Regards,
> Ramesh
>
> -Original Message-
> From: Maíra Canal
> Sent: Wednesday, June 29, 2022 6:25 PM
> To: Errabolu, Ramesh ;
> amd-gfx@lists.freedesktop.org; dan.carpen...@oracle.com
> Subject: Re: [PATCH] drm/amdkfd: Fix warnings from static analyzer Smatch
>
> [CAUTION: External Email]
>
> Hi Ramesh,
>
> On 6/29/22 14:04, Ramesh Errabolu wrote:
>> The patch fixes couple of warnings, as reported by Smatch a static
>> analyzer.
>>
>> Fixes: 40d6aa758b13 ("drm/amdkfd: Extend KFD device topology to
>> surface peer-to-peer links")>
>> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1428
>> kfd_create_indirect_link_prop() warn: iterator used outside loop: 'cpu_link'
>> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1462
>> kfd_create_indirect_link_prop() error: we previously assumed 'cpu_dev'
>> could be null (see line 1420)
>> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1516 kfd_add_peer_prop()
>> warn: iterator used outside loop: 'iolink3'
>>
>
> Usually, the Fixes tag would go here, after the commit message.
>
>> Signed-off-by: Ramesh Errabolu
>> Reported-by: Dan Carpenter
>> ---
>
> As this is a v2 PATCH, it would be nice to have a small changelog here,
> describing what has changed between the v1 and v2 versions of the patch.
> Also, you can mark the patch as v2 with git send-email by adding the flag
> -v2. More on the canonical patch format can be seen in [1].
>
> [1]
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdocs.kernel.org%2Fprocess%2Fsubmitting-patches.html%23the-canonical-patch-formatdata=05%7C01%7CRamesh.Errabolu%40amd.com%7Cc54753a9471843cc9d1f08da5a26898d%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637921418813227961%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7Csdata=PAc5A8z2EvJAOUiY378K9XyVBCKewQNsSNCr9pB3Ias%3Dreserved=0
>
> Best Regards,
> - Maíra Canal
>
>> drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 34
>> +++
>> 1 file changed, 17 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>> b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>> index 25990bec600d..ca4825e555b7 100644
>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
>> @@ -1417,15 +1417,15 @@ static int
>> kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int g
>>
>> /* find CPU <--> CPU links */
>> cpu_dev = kfd_topology_device_by_proximity_domain(i);
>> - if (cpu_dev) {
>> - list_for_each_entry(cpu_link,
>> - _dev->io_link_props, list) {
>> - if (cpu_link->node_to == gpu_link->node_to)
>> - break;
>>
[PATCH] drm/amd/display: Remove unused variables from vba_vars_st
Some variables from the struct vba_vars_st are not referenced in any
other place on the codebase. As they are not used, this commit removes
those variables.
Signed-off-by: Maíra Canal
---
Unused variables from structs are not warned by compilers, so they are a bit
harder to find. In order to find these unused variables, I used git grep and
checked if they were used anywhere else.
Any feedback or suggestion (maybe a tool to check unused variables from structs)
is welcomed!
Best Regards,
- Maíra Canal
---
.../drm/amd/display/dc/dml/display_mode_vba.c | 1 -
.../drm/amd/display/dc/dml/display_mode_vba.h | 33 ---
2 files changed, 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index ed23c7c79d86..6b3918609d26 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -346,7 +346,6 @@ static void fetch_socbb_params(struct display_mode_lib
*mode_lib)
mode_lib->vba.DRAMClockChangeRequirementFinal = 1;
mode_lib->vba.FCLKChangeRequirementFinal = 1;
mode_lib->vba.USRRetrainingRequiredFinal = 1;
- mode_lib->vba.ConfigurableDETSizeEnFinal = 0;
mode_lib->vba.AllowForPStateChangeOrStutterInVBlankFinal =
soc->allow_for_pstate_or_stutter_in_vblank_final;
mode_lib->vba.DRAMClockChangeLatency =
soc->dram_clock_change_latency_us;
mode_lib->vba.DummyPStateCheck = soc->dram_clock_change_latency_us ==
soc->dummy_pstate_latency_us;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 25a9a606ab6f..e95b2199d85a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -232,7 +232,6 @@ struct vba_vars_st {
double DISPCLKWithRampingRoundedToDFSGranularity;
double DISPCLKWithoutRampingRoundedToDFSGranularity;
double MaxDispclkRoundedToDFSGranularity;
- double MaxDppclkRoundedToDFSGranularity;
bool DCCEnabledAnyPlane;
double ReturnBandwidthToDCN;
unsigned int TotalActiveDPP;
@@ -249,7 +248,6 @@ struct vba_vars_st {
double VBlankTime;
double SmallestVBlank;
enum dm_prefetch_modes AllowForPStateChangeOrStutterInVBlankFinal; //
Mode Support only
- double DCFCLKDeepSleepPerSurface[DC__NUM_DPP__MAX];
double DCFCLKDeepSleepPerPlane[DC__NUM_DPP__MAX];
double EffectiveDETPlusLBLinesLuma;
double EffectiveDETPlusLBLinesChroma;
@@ -297,7 +295,6 @@ struct vba_vars_st {
double SMNLatency;
double FCLKChangeLatency;
unsigned int MALLAllocatedForDCNFinal;
- double DefaultGPUVMMinPageSizeKBytes; // Default for the project
double
MaxAveragePercentOfIdealFabricBWDisplayCanUseInNormalSystemOperation;
double
MaxAveragePercentOfIdealDRAMBWDisplayCanUseInNormalSystemOperationSTROBE;
double PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE;
@@ -819,8 +816,6 @@ struct vba_vars_st {
double dummy8[DC__NUM_DPP__MAX];
double dummy13[DC__NUM_DPP__MAX];
double dummy_double_array[2][DC__NUM_DPP__MAX];
- unsigned intdummyinteger1ms[DC__NUM_DPP__MAX];
- doubledummyinteger2ms[DC__NUM_DPP__MAX];
unsigned intdummyinteger3[DC__NUM_DPP__MAX];
unsigned intdummyinteger4[DC__NUM_DPP__MAX];
unsigned intdummyinteger5;
@@ -830,16 +825,7 @@ struct vba_vars_st {
unsigned intdummyinteger9;
unsigned intdummyinteger10;
unsigned intdummyinteger11;
- unsigned intdummyinteger12;
- unsigned intdummyinteger30;
- unsigned intdummyinteger31;
- unsigned intdummyinteger32;
- unsigned intdummyintegerarr1[DC__NUM_DPP__MAX];
- unsigned intdummyintegerarr2[DC__NUM_DPP__MAX];
- unsigned intdummyintegerarr3[DC__NUM_DPP__MAX];
- unsigned intdummyintegerarr4[DC__NUM_DPP__MAX];
unsigned intdummy_integer_array[8][DC__NUM_DPP__MAX];
- unsigned intdummy_integer_array22[22][DC__NUM_DPP__MAX];
bool dummysinglestring;
bool SingleDPPViewportSizeSupportPerPlane[DC__NUM_DPP__MAX];
@@ -980,7 +966,6 @@ struct vba_vars_st {
double TimePerChromaMetaChunkFlip[DC__NUM_DPP__MAX];
unsigned int DCCCMaxUncompressedBlock[DC__NUM_DPP__MAX];
unsigned int DCCCMaxCompressedBlock[DC__NUM_DPP__MAX];
- unsigned int DCCCIndependent64ByteBlock[DC__NUM_DPP__MAX];
double VStartupMargin;
bool NotEnoughTimeForDynamicMetadata[DC__NUM_DPP__MAX];
@@ -1085,8 +1070,6 @@ struct vba_vars_st {
double WritebackDelayTime[DC__NUM_DPP__MAX];
[PATCH] drm/amd/display: Remove duplicate code across dcn30 and dcn31
The function CalculateBytePerPixelAnd256BBlockSizes was defined four
times: on display_mode_vba_30.c, display_rq_dlg_calc_30.c,
display_mode_vba_31.c and display_rq_dlg_calc_31.c. In order to avoid
code duplication, the CalculateBytePerPixelAnd256BBlockSizes is defined
on display_mode_vba_30.h and used across dcn30 and dcn31.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn30/display_mode_vba_30.c| 21 +---
.../dc/dml/dcn30/display_mode_vba_30.h| 11 ++
.../dc/dml/dcn30/display_rq_dlg_calc_30.c | 93 +--
.../dc/dml/dcn31/display_mode_vba_31.c| 106 +-
.../dc/dml/dcn31/display_rq_dlg_calc_31.c | 91 +--
5 files changed, 23 insertions(+), 299 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index fb4aa4c800bf..842eb94ebe04 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -712,18 +712,6 @@ static double CalculateUrgentLatency(
double UrgentLatencyAdjustmentFabricClockReference,
double FabricClockSingle);
-static bool CalculateBytePerPixelAnd256BBlockSizes(
- enum source_format_class SourcePixelFormat,
- enum dm_swizzle_mode SurfaceTiling,
- unsigned int *BytePerPixelY,
- unsigned int *BytePerPixelC,
- double *BytePerPixelDETY,
- double *BytePerPixelDETC,
- unsigned int *BlockHeight256BytesY,
- unsigned int *BlockHeight256BytesC,
- unsigned int *BlockWidth256BytesY,
- unsigned int *BlockWidth256BytesC);
-
void dml30_recalculate(struct display_mode_lib *mode_lib)
{
ModeSupportAndSystemConfiguration(mode_lib);
@@ -2095,7 +2083,7 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
DTRACE(" return_bus_bw = %f", v->ReturnBW);
for (k = 0; k < v->NumberOfActivePlanes; ++k) {
- CalculateBytePerPixelAnd256BBlockSizes(
+ dml30_CalculateBytePerPixelAnd256BBlockSizes(
v->SourcePixelFormat[k],
v->SurfaceTiling[k],
>BytePerPixelY[k],
@@ -3165,7 +3153,7 @@ static void DisplayPipeConfiguration(struct
display_mode_lib *mode_lib)
for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
- CalculateBytePerPixelAnd256BBlockSizes(
+ dml30_CalculateBytePerPixelAnd256BBlockSizes(
mode_lib->vba.SourcePixelFormat[k],
mode_lib->vba.SurfaceTiling[k],
[k],
@@ -3218,7 +3206,7 @@ static void DisplayPipeConfiguration(struct
display_mode_lib *mode_lib)
);
}
-static bool CalculateBytePerPixelAnd256BBlockSizes(
+void dml30_CalculateBytePerPixelAnd256BBlockSizes(
enum source_format_class SourcePixelFormat,
enum dm_swizzle_mode SurfaceTiling,
unsigned int *BytePerPixelY,
@@ -3305,7 +3293,6 @@ static bool CalculateBytePerPixelAnd256BBlockSizes(
*BlockWidth256BytesY = 256U / *BytePerPixelY /
*BlockHeight256BytesY;
*BlockWidth256BytesC = 256U / *BytePerPixelC /
*BlockHeight256BytesC;
}
- return true;
}
static double CalculateTWait(
@@ -3709,7 +3696,7 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
/*Bandwidth Support Check*/
for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
- CalculateBytePerPixelAnd256BBlockSizes(
+ dml30_CalculateBytePerPixelAnd256BBlockSizes(
v->SourcePixelFormat[k],
v->SurfaceTiling[k],
>BytePerPixelY[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
index 4e249eaabfdb..daaf0883b84d 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
@@ -39,5 +39,16 @@ double dml30_CalculateWriteBackDISPCLK(
long WritebackDestinationWidth,
unsigned int HTotal,
unsigned int WritebackLineBufferSize);
+void dml30_CalculateBytePerPixelAnd256BBlockSizes(
+ enum source_format_class SourcePixelFormat,
+ enum dm_swizzle_mode SurfaceTiling,
+ unsigned int *BytePerPixelY,
+ unsigned int *BytePerPixelC,
+ double *BytePerPixelDETY,
+ double *BytePerPixelDETC,
+ unsigned
[PATCH] drm/amd/display: Remove return value of Calculate256BBlockSizes
The function Calculate256BBlockSizes always returns true, regardless of the parameters. As any file checks the return of the function, this commit changes the return value to void. Signed-off-by: Maíra Canal --- drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 3 +-- drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c index 2676710a5f2b..ed23c7c79d86 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -957,7 +957,7 @@ static void recalculate_params( } } -bool Calculate256BBlockSizes( +void Calculate256BBlockSizes( enum source_format_class SourcePixelFormat, enum dm_swizzle_mode SurfaceTiling, unsigned int BytePerPixelY, @@ -995,7 +995,6 @@ bool Calculate256BBlockSizes( *BlockWidth256BytesY = 256 / BytePerPixelY / *BlockHeight256BytesY; *BlockWidth256BytesC = 256 / BytePerPixelC / *BlockHeight256BytesC; } - return true; } bool CalculateMinAndMaxPrefetchMode( diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h index 10ff536ef2a4..25a9a606ab6f 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h @@ -169,7 +169,7 @@ bool get_is_phantom_pipe(struct display_mode_lib *mode_lib, unsigned int pipe_idx); void PixelClockAdjustmentForProgressiveToInterlaceUnit(struct display_mode_lib *mode_lib); -bool Calculate256BBlockSizes( +void Calculate256BBlockSizes( enum source_format_class SourcePixelFormat, enum dm_swizzle_mode SurfaceTiling, unsigned int BytePerPixelY, -- 2.36.1
Re: [PATCH] drm/amdkfd: Fix warnings from static analyzer Smatch
Hi Ramesh,
On 6/29/22 14:04, Ramesh Errabolu wrote:
> The patch fixes couple of warnings, as reported by Smatch
> a static analyzer.
>
> Fixes: 40d6aa758b13 ("drm/amdkfd: Extend KFD device topology to surface
> peer-to-peer links")>
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1428
> kfd_create_indirect_link_prop() warn: iterator used outside loop: 'cpu_link'
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1462
> kfd_create_indirect_link_prop() error: we previously assumed 'cpu_dev' could
> be null (see line 1420)
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1516 kfd_add_peer_prop()
> warn: iterator used outside loop: 'iolink3'
>
Usually, the Fixes tag would go here, after the commit message.
> Signed-off-by: Ramesh Errabolu
> Reported-by: Dan Carpenter
> ---
As this is a v2 PATCH, it would be nice to have a small changelog here,
describing what has changed between the v1 and v2 versions of the patch.
Also, you can mark the patch as v2 with git send-email by adding the
flag -v2. More on the canonical patch format can be seen in [1].
[1]
https://docs.kernel.org/process/submitting-patches.html#the-canonical-patch-format
Best Regards,
- Maíra Canal
> drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 34 +++
> 1 file changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> index 25990bec600d..ca4825e555b7 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> @@ -1417,15 +1417,15 @@ static int kfd_create_indirect_link_prop(struct
> kfd_topology_device *kdev, int g
>
> /* find CPU <--> CPU links */
> cpu_dev = kfd_topology_device_by_proximity_domain(i);
> - if (cpu_dev) {
> - list_for_each_entry(cpu_link,
> - _dev->io_link_props, list) {
> - if (cpu_link->node_to == gpu_link->node_to)
> - break;
> - }
> - }
> + if (!cpu_dev)
> + continue;
> +
> + list_for_each_entry(cpu_link, _dev->io_link_props, list)
> + if (cpu_link->node_to == gpu_link->node_to)
> + break;
>
> - if (cpu_link->node_to != gpu_link->node_to)
> + /* Ensures we didn't exit from list search with no hits */
> + if (list_entry_is_head(cpu_link, _dev->io_link_props, list))
> return -ENOMEM;
>
> /* CPU <--> CPU <--> GPU, GPU node*/
> @@ -1510,16 +1510,16 @@ static int kfd_add_peer_prop(struct
> kfd_topology_device *kdev,
> cpu_dev =
> kfd_topology_device_by_proximity_domain(iolink1->node_to);
> if (cpu_dev) {
> list_for_each_entry(iolink3, _dev->io_link_props,
> list)
> - if (iolink3->node_to == iolink2->node_to)
> + if (iolink3->node_to == iolink2->node_to) {
> + props->weight += iolink3->weight;
> + props->min_latency +=
> iolink3->min_latency;
> + props->max_latency +=
> iolink3->max_latency;
> + props->min_bandwidth =
> min(props->min_bandwidth,
> +
> iolink3->min_bandwidth);
> + props->max_bandwidth =
> min(props->max_bandwidth,
> +
> iolink3->max_bandwidth);
> break;
> -
> - props->weight += iolink3->weight;
> - props->min_latency += iolink3->min_latency;
> - props->max_latency += iolink3->max_latency;
> - props->min_bandwidth = min(props->min_bandwidth,
> - iolink3->min_bandwidth);
> - props->max_bandwidth = min(props->max_bandwidth,
> - iolink3->max_bandwidth);
> + }
> } else {
> WARN(1, "CPU node not found");
> }
Re: [RFC 0/3] drm/amd/display: Introduce KUnit to Display Mode Library
On 6/17/22 04:55, David Gow wrote:
> On Fri, Jun 17, 2022 at 6:41 AM Maíra Canal wrote:
>>
>> Hi David,
>>
>> Thank you for your feedback!
>>
>> On 6/16/22 11:39, David Gow wrote:
>>> On Wed, Jun 8, 2022 at 9:08 AM Maíra Canal wrote:
>>
>>>>
>>>> As kunit_test_suites() defines itself as an init_module(), it conflicts
>>>> with
>>>> the existing one at amdgpu_drv. So, if we use kunit_test_suites(), we won't
>>>> be able to compile the tests as modules and, therefore, won't be able to
>>>> use
>>>> IGT to run the tests. This problem with kunit_test_suites() was already
>>>> discussed in the KUnit mailing list, as can be seen in [7].
>>>
>>> I'm not sure I fully understand why these tests need to be part of the
>>> amdgpu module, though admittedly I've not played with IGT much. Would
>>> it be possible to compile these tests as separate modules, which could
>>> depend on amdgpu (or maybe include the DML stuff directly), and
>>> therefore not have this conflict? I definitely was able to get these
>>> tests working under kunit_tool (albeit as built-ins) by using
>>> kunit_test_suites(). If each suite were built as a separate module (or
>>> indeed, even if all the tests were in one module, with one list of
>>> suites), then it should be possible to avoid the init_module()
>>> conflict. That'd also make it possible to run these tests without
>>> actually needing the driver to initialise, which seems like it might
>>> require actual hardware(?)
>>
>> Initially, we tried the kunit_test_suites() approach. And it did work pretty
>> well for the kunit_tool (although we didn't test any hardware-specific unit
>> test). But when compiling the test as a module, we would get a linking
>> error, pointing out multiple definitions of 'init_module'/'cleanup_module'
>> at kunit_test_suites().
>>
>> At this point, we thought about a couple of options to resolve this problem:
>> - Add EXPORT_SYMBOL to the functions we would test. But, this doesn't scale
>> pretty well, because it would pollute AMDGPU code as the tests expand.
>> - Take the Thunderbolt path and add the tests to the driver stack.
>>
>> We end up taking the Thunderbolt path as it would be more maintainable.
>>
>> Compiling the tests as a module is essential to make the tests run at IGT,
>> as IGT essentially loads the module, runs it, and parses the output (a very
>> very simplified explanation of what IGT does). IGT is a very known tool for
>> DRI developers, so we believe that IGT support is crucial for this project.
>>
>> If you have any other options on how to make the module compilation viable
>> without using the 'thunderbolt'-style, we would be glad to hear your
>> suggestions.
>
> As you point out, there are really two separate problems with
> splitting the tests out totally:
> - It's ugly and pollutes the symbol namespace to have EXPORT_SYMBOL()
> everywhere.
> - It's impossible to have multiple init_module() "calls" in the same module.
>
> The first of these is, I think, the harder to solve generally. (There
> are some ways to mitigate the namespace pollution part of it by either
> hiding the EXPORT_SYMBOL() directives behind #ifdef CONFIG_KUNIT or
> similar, or by using symbol namespaces:
> https://www.kernel.org/doc/html/latest/core-api/symbol-namespaces.html
> -- or both -- but they don't solve the issue entirely.)
>
> That being said, it's as much a matter of taste as anything, so if
> keeping things in the amdgpu module works well, don't let me stop you.
> Either way should work, and have their own advantages and
> disadvantages.
>
> The latter is just a quirk of the current KUnit implementation of
> kunit_test_suites(). This multiple-definition issue will go away in
> the not-too-distant future.
>
> So my suggestion here would be to make sure any changes you make to
> work around the issue with multiple init_module definitions are easy
> to remove. I suspect you could probably significantly simplify the
> whole dml_test.{c,h} bit to just directly export the kunit_suites and
> maybe throw them all in one array to pass to
> __kunit_test_suites_init(). Then, when the improved modules work
> lands, they could be deleted entirely and replaced with one or more
> calls to kunit_test_suite().
>
>>>
>>> There are two other reasons the 'thunderbolt'-style technique is one
>>> we want to avoid:
>>> 1. It makes it much more difficult to run tests using kunit_tool and
>>> KUnit-based CI tools: thes
Re: [RFC 0/3] drm/amd/display: Introduce KUnit to Display Mode Library
Hi David, Thank you for your feedback! On 6/16/22 11:39, David Gow wrote: > On Wed, Jun 8, 2022 at 9:08 AM Maíra Canal wrote: >> >> As kunit_test_suites() defines itself as an init_module(), it conflicts with >> the existing one at amdgpu_drv. So, if we use kunit_test_suites(), we won't >> be able to compile the tests as modules and, therefore, won't be able to use >> IGT to run the tests. This problem with kunit_test_suites() was already >> discussed in the KUnit mailing list, as can be seen in [7]. > > I'm not sure I fully understand why these tests need to be part of the > amdgpu module, though admittedly I've not played with IGT much. Would > it be possible to compile these tests as separate modules, which could > depend on amdgpu (or maybe include the DML stuff directly), and > therefore not have this conflict? I definitely was able to get these > tests working under kunit_tool (albeit as built-ins) by using > kunit_test_suites(). If each suite were built as a separate module (or > indeed, even if all the tests were in one module, with one list of > suites), then it should be possible to avoid the init_module() > conflict. That'd also make it possible to run these tests without > actually needing the driver to initialise, which seems like it might > require actual hardware(?) Initially, we tried the kunit_test_suites() approach. And it did work pretty well for the kunit_tool (although we didn't test any hardware-specific unit test). But when compiling the test as a module, we would get a linking error, pointing out multiple definitions of 'init_module'/'cleanup_module' at kunit_test_suites(). At this point, we thought about a couple of options to resolve this problem: - Add EXPORT_SYMBOL to the functions we would test. But, this doesn't scale pretty well, because it would pollute AMDGPU code as the tests expand. - Take the Thunderbolt path and add the tests to the driver stack. We end up taking the Thunderbolt path as it would be more maintainable. Compiling the tests as a module is essential to make the tests run at IGT, as IGT essentially loads the module, runs it, and parses the output (a very very simplified explanation of what IGT does). IGT is a very known tool for DRI developers, so we believe that IGT support is crucial for this project. If you have any other options on how to make the module compilation viable without using the 'thunderbolt'-style, we would be glad to hear your suggestions. > > There are two other reasons the 'thunderbolt'-style technique is one > we want to avoid: > 1. It makes it much more difficult to run tests using kunit_tool and > KUnit-based CI tools: these tests would not run automatically, and if > they were built-in as-is, they'd need to be > 2. We're planning to improve module support to replace the > init_module()-based implementation of kunit_test_suites() with one > which won't have these conflicts, so the need for this should be > short-lived. > > If you're curious, an early version of the improved module support can > be found here, though it's out-of-date enough it won't apply or work > as-is: > https://lore.kernel.org/all/101d12fc9250b7a445ff50a9e7a25cd74d0e16eb.ca...@codeconstruct.com.au/ > > Now, that's unlikely to be ready very soon, but I'd be hesitant to > implement too extensive a system for avoiding kunit_test_suites() > given at some point it should work and we'll need to migrate back to > it. We hope to see in the near future the improved module support from KUnit as it would make the addition of tests much more simple and clean. Could you explain more about what is missing to make this improved module support come upstream? > > At the very least, having the dependency on KUNIT=m is a very bad > idea: it should be possible to have tests built as modules, even if > KUnit itself isn't, and ideally (even if this sort-of implementation > is required), it _should_ be possible to have these tests be built-in > if all their dependencies (KUnit, amdgpu) are, which would make it > possible to run the tests without a userland. > Thank you for the suggestion! We will change the KUNIT dependency. - Maíra Canal
