[PATCH] readline: make ctrl-u to work like linux console

2019-10-15 Thread sendpatch
From: DU HUANPENG 

currtly, the ctrl-u discards the whole line, in most linux
boxes, ctrl-u just erase characters before cursor to the
begginning of the line. this patch make ctrl-u to do this.

Signed-off-by: DU HUANPENG 
---
 lib/readline.c | 34 +++---
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/lib/readline.c b/lib/readline.c
index d026af1..c0b194c 100644
--- a/lib/readline.c
+++ b/lib/readline.c
@@ -188,9 +188,10 @@ int readline(const char *prompt, char *buf, int len)
unsigned wlen;
int ichar;
int insert = 1;
+   int i;
 #ifdef CONFIG_AUTO_COMPLETE
char tmp;
-   int reprint, i;
+   int reprint;
char *completestr;
 
complete_reset();
@@ -291,8 +292,35 @@ int readline(const char *prompt, char *buf, int len)
break;
case BB_KEY_ERASE_LINE:
case CTL_CH('u'):
-   BEGINNING_OF_LINE();
-   ERASE_TO_EOL();
+   if(num >= eol_num) {
+   BEGINNING_OF_LINE();
+   ERASE_TO_EOL();
+   } else {
+   for(i=num; ihttp://lists.infradead.org/mailman/listinfo/barebox


Re: [PATCH] readline: make ctrl-u to work like linux console

2019-10-15 Thread duhuanpeng
> currtly, the ctrl-u discards the whole line, in most linux
> boxes, ctrl-u just remove character before cursor.
> this patch make ctrl-u to do this.

Hello, sorry for the typo, it should be characters.

Regards,
duhuanpeng



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[PATCH v2] MIPS: init cache before using it

2019-10-15 Thread Oleksij Rempel
flush_cache_all() uses 'struct cpuinfo_mips current_cpu_data' data
fields. These data fields are initialized in r4k_cache_init().

However in the current implementation the r4k_cache_init() function
is called __AFTER__ relocate_code().

Suggested-by: Antony Pavlov 
Signed-off-by: Oleksij Rempel 
---
 arch/mips/lib/reloc.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 9a9e404f7e..14195d6f96 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -31,6 +31,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -40,6 +41,7 @@
 #include 
 #include 
 
+extern void r4k_cache_init(void);
 void main_entry(void *fdt, u32 fdt_size);
 void relocate_code(void *fdt, u32 fdt_size, u32 relocaddr);
 
@@ -146,8 +148,14 @@ void relocate_code(void *fdt, u32 fdt_size, u32 ram_size)
apply_reloc(type, (void *)addr, off);
}
 
-   /* Ensure the icache is coherent */
-   flush_cache_all();
+   memset(__bss_start, 0, bss_len);
+
+   cpu_probe();
+   if (cpu_has_4k_cache) {
+   r4k_cache_init();
+   /* Ensure the icache is coherent */
+   flush_cache_all();
+   }
 
/* Clear the .bss section */
bss_start = (uint8_t *)((unsigned long)__bss_start + off);
-- 
2.23.0


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[PATCH] kbuild: remove ar-option

2019-10-15 Thread Masahiro Yamada
Linux commit 13dc8c029cab ("kbuild: remove ar-option and KBUILD_ARFLAGS")
removed this already.

Barebox has never used this macro.

Signed-off-by: Masahiro Yamada 
---

 scripts/Kbuild.include | 5 -
 1 file changed, 5 deletions(-)

diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index a2dbbd8a0084..077ad8319ff3 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -134,11 +134,6 @@ cc-ifversion = $(shell [ $(call cc-version, $(CC)) $(1) 
$(2) ] && echo $(3))
 ld-option = $(call try-run,\
$(CC) -x c /dev/null -c -o "$$TMPO" ; $(LD) $(1) "$$TMPO" -o 
"$$TMP",$(1),$(2))
 
-# ar-option
-# Usage: KBUILD_ARFLAGS := $(call ar-option,D)
-# Important: no spaces around options
-ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2))
-
 ##
 
 ###
-- 
2.17.1


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Re: [PATCH] MIPS: init cache before flashing it

2019-10-15 Thread Oleksij Rempel
On Tue, Oct 15, 2019 at 11:41:06PM +0300, Antony Pavlov wrote:
> On Tue, 15 Oct 2019 18:09:45 +0200
> Oleksij Rempel  wrote:
> 
> Hi!
> 
> Please review this thread 
> http://lists.infradead.org/pipermail/barebox/2019-June/038530.html
> AFAIR we have to clear BSS before calling r4k_cache_init().

Hm... your patch need some rework as well. I'll send updated version.

> -- 
> Best regards,
>   Antony Pavlov
> 
> > Cache information was not initialized on flush_cache_all(). This was the
> > reason for relatively slow boot speed on MIPS.
> > 
> > Signed-off-by: Oleksij Rempel 
> > ---
> >  arch/mips/lib/reloc.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
> > index 9a9e404f7e..3d05ff1381 100644
> > --- a/arch/mips/lib/reloc.c
> > +++ b/arch/mips/lib/reloc.c
> > @@ -40,6 +40,7 @@
> >  #include 
> >  #include 
> >  
> > +void r4k_cache_init(void);
> >  void main_entry(void *fdt, u32 fdt_size);
> >  void relocate_code(void *fdt, u32 fdt_size, u32 relocaddr);
> >  
> > @@ -146,6 +147,7 @@ void relocate_code(void *fdt, u32 fdt_size, u32 
> > ram_size)
> > apply_reloc(type, (void *)addr, off);
> > }
> >  
> > +   r4k_cache_init();
> > /* Ensure the icache is coherent */
> > flush_cache_all();
> >  
> > -- 
> > 2.23.0
> > 
> > 
> > ___
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Re: [PATCH] MIPS: init cache before flashing it

2019-10-15 Thread Oleksij Rempel
Hi Antony,

On Tue, Oct 15, 2019 at 11:41:06PM +0300, Antony Pavlov wrote:
> On Tue, 15 Oct 2019 18:09:45 +0200
> Oleksij Rempel  wrote:
> 
> Hi!
> 
> Please review this thread 
> http://lists.infradead.org/pipermail/barebox/2019-June/038530.html
> AFAIR we have to clear BSS before calling r4k_cache_init().

Ah... you right! Can you please resend your patch?

Best regards,
Oleksij

> -- 
> Best regards,
>   Antony Pavlov
> 
> > Cache information was not initialized on flush_cache_all(). This was the
> > reason for relatively slow boot speed on MIPS.
> > 
> > Signed-off-by: Oleksij Rempel 
> > ---
> >  arch/mips/lib/reloc.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
> > index 9a9e404f7e..3d05ff1381 100644
> > --- a/arch/mips/lib/reloc.c
> > +++ b/arch/mips/lib/reloc.c
> > @@ -40,6 +40,7 @@
> >  #include 
> >  #include 
> >  
> > +void r4k_cache_init(void);
> >  void main_entry(void *fdt, u32 fdt_size);
> >  void relocate_code(void *fdt, u32 fdt_size, u32 relocaddr);
> >  
> > @@ -146,6 +147,7 @@ void relocate_code(void *fdt, u32 fdt_size, u32 
> > ram_size)
> > apply_reloc(type, (void *)addr, off);
> > }
> >  
> > +   r4k_cache_init();
> > /* Ensure the icache is coherent */
> > flush_cache_all();
> >  
> > -- 
> > 2.23.0
> > 
> > 
> > ___
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> > barebox@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> 

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[PATCH] readline: make ctrl-u to work like linux console

2019-10-15 Thread sendpatch
From: DU HUANPENG 

currtly, the ctrl-u discards the whole line, in most linux
boxes, ctrl-u just remove character before cursor.
this patch make ctrl-u to do this.

Signed-off-by: DU HUANPENG 
---
 lib/readline.c | 34 +++---
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/lib/readline.c b/lib/readline.c
index d026af1..c0b194c 100644
--- a/lib/readline.c
+++ b/lib/readline.c
@@ -188,9 +188,10 @@ int readline(const char *prompt, char *buf, int len)
unsigned wlen;
int ichar;
int insert = 1;
+   int i;
 #ifdef CONFIG_AUTO_COMPLETE
char tmp;
-   int reprint, i;
+   int reprint;
char *completestr;
 
complete_reset();
@@ -291,8 +292,35 @@ int readline(const char *prompt, char *buf, int len)
break;
case BB_KEY_ERASE_LINE:
case CTL_CH('u'):
-   BEGINNING_OF_LINE();
-   ERASE_TO_EOL();
+   if(num >= eol_num) {
+   BEGINNING_OF_LINE();
+   ERASE_TO_EOL();
+   } else {
+   for(i=num; ihttp://lists.infradead.org/mailman/listinfo/barebox


[PATCH] readline: make ctrl-u to work like linux console

2019-10-15 Thread sendpatch
From: DU HUANPENG 

currtly, the ctrl-u discards the whole line, in most linux
boxes, ctrl-u just remove character before cursor.
this patch make ctrl-u to do this.

Signed-off-by: DU HUANPENG 
---
 lib/readline.c | 34 +++---
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/lib/readline.c b/lib/readline.c
index d026af1..c0b194c 100644
--- a/lib/readline.c
+++ b/lib/readline.c
@@ -188,9 +188,10 @@ int readline(const char *prompt, char *buf, int len)
unsigned wlen;
int ichar;
int insert = 1;
+   int i;
 #ifdef CONFIG_AUTO_COMPLETE
char tmp;
-   int reprint, i;
+   int reprint;
char *completestr;
 
complete_reset();
@@ -291,8 +292,35 @@ int readline(const char *prompt, char *buf, int len)
break;
case BB_KEY_ERASE_LINE:
case CTL_CH('u'):
-   BEGINNING_OF_LINE();
-   ERASE_TO_EOL();
+   if(num >= eol_num) {
+   BEGINNING_OF_LINE();
+   ERASE_TO_EOL();
+   } else {
+   for(i=num; ihttp://lists.infradead.org/mailman/listinfo/barebox


readling, ctrl-u is not working like linux console

2019-10-15 Thread duhuanpeng
Hi,

I find it the barebox console's ctrl-u is not working like my
linux host.
for now, the barebox's ctrl-u discard the whole line. but the
linux consle just remove characters before cursor.
is the barebox ctrl-u follows any standard, if not, how about
make it just works like linux(ah, it is gnu readline) does.

Regards,
duhuanpeng

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[PATCH] readline: make ctrl-u to work like linux console

2019-10-15 Thread sendpatch
From: DU HUANPENG 

currtly, the ctrl-u discards the whole line, in most linux
boxes, ctrl-u just remove character before cursor.
this patch make ctrl-u to do this.

Signed-off-by: DU HUANPENG 
---
 lib/readline.c | 31 +--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/lib/readline.c b/lib/readline.c
index d026af1..eba3da4 100644
--- a/lib/readline.c
+++ b/lib/readline.c
@@ -291,8 +291,35 @@ int readline(const char *prompt, char *buf, int len)
break;
case BB_KEY_ERASE_LINE:
case CTL_CH('u'):
-   BEGINNING_OF_LINE();
-   ERASE_TO_EOL();
+   if(num >= eol_num) {
+   BEGINNING_OF_LINE();
+   ERASE_TO_EOL();
+   } else {
+   for(i=num; ihttp://lists.infradead.org/mailman/listinfo/barebox


Re: setup for a working framebuffer in qemu

2019-10-15 Thread Antony Pavlov
On Tue, 15 Oct 2019 17:08:42 +0200
Denis Roio  wrote:

> 
> hi all! noob question here, hope you don't mind
> 
> is there a recommended, matching configuration to run barebox in qemu
> with a working /dev/fb0 ?
> 
> 
> I have made some tries already with no success:
> 
> - qemu emulated mips-malta boots, but no fb0

Sorry, mips-malta does not support fb0.

Use sandbox (you have to install libsdl development package):

$ wget https://www.barebox.org/download/barebox-2019.10.0.tar.bz2
$ tar vfx barebox-2019.10.0.tar.bz2
$ cd barebox-2019.10.0
$ make sandbox_defconfig
$ echo CONFIG_DRIVER_VIDEO_SDL=y >> .config
$ make oldconfig
$ make

$ ./barebox


Enable framebuffer console from barebox command line:

barebox@barebox sandbox:/ fbconsole0.active=oe

or you can enable only framebuffer (without console):

barebox@barebox sandbox:/ fb0.enable=1

use 'splash /logo/barebox-logo-240.png' to test picture output.

-- 
Best regards,
  Antony Pavlov

> - qemu emulated vexpress boots, but no fb0
> - qemu emulated sabrelite can't even get it to boot
> 
> I'm a bit out of ideas. Would really appreciate guidance, this is
> mostly for fun while poking around this wonderful project.
> 
> 
> Thanks!
> 
> 
> -- 
>   Denis "Jaromil" Roio  https://Dyne.org think  tank
>   Ph.D, CTO & co-foundersoftware to empower communities
>   ✉ Haparandadam 7-A1, 1013AK Amsterdam, The Netherlands
>   턞 crypto κρυπτο крипто गुप्त् 加密 האנוסים المشفره
>   ⚷ 6113D89C A825C5CE DD02C872 73B35DA5 4ACB7D10
> 
> 
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Re: [PATCH] MIPS: init cache before flashing it

2019-10-15 Thread Antony Pavlov
On Tue, 15 Oct 2019 18:09:45 +0200
Oleksij Rempel  wrote:

Hi!

Please review this thread 
http://lists.infradead.org/pipermail/barebox/2019-June/038530.html
AFAIR we have to clear BSS before calling r4k_cache_init().

-- 
Best regards,
  Antony Pavlov

> Cache information was not initialized on flush_cache_all(). This was the
> reason for relatively slow boot speed on MIPS.
> 
> Signed-off-by: Oleksij Rempel 
> ---
>  arch/mips/lib/reloc.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
> index 9a9e404f7e..3d05ff1381 100644
> --- a/arch/mips/lib/reloc.c
> +++ b/arch/mips/lib/reloc.c
> @@ -40,6 +40,7 @@
>  #include 
>  #include 
>  
> +void r4k_cache_init(void);
>  void main_entry(void *fdt, u32 fdt_size);
>  void relocate_code(void *fdt, u32 fdt_size, u32 relocaddr);
>  
> @@ -146,6 +147,7 @@ void relocate_code(void *fdt, u32 fdt_size, u32 ram_size)
>   apply_reloc(type, (void *)addr, off);
>   }
>  
> + r4k_cache_init();
>   /* Ensure the icache is coherent */
>   flush_cache_all();
>  
> -- 
> 2.23.0
> 
> 
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[PATCH] console_simple: fix linking error when ARCH_HAS_CTRLC enabled

2019-10-15 Thread iu87m888m
From: DU HUANPENG 

this error happens in sandbox with simple console, sandbox
has ARCH_HAS_CTRLC enabled by default

$ make sandbox_defconfig
$ make menuconfig
(select CONFIG_SHELL_SIMPLE)
$ make

LD  barebox
common/built-in.o: In function `__pr_memory_display':
/home/du/source/barebox/common/memory_display.c:117: undefined reference to 
`ctrlc'
common/built-in.o: In function `run_init':
/home/du/source/barebox/common/startup.c:317: undefined reference to 
`console_ctrlc_allow'
common/built-in.o: In function `parse_stream_outer':
/home/du/source/barebox/common/hush.c:1742: undefined reference to `ctrlc'
common/built-in.o: In function `run_list_real':
/home/du/source/barebox/common/hush.c:895: undefined reference to `ctrlc'
common/built-in.o: In function `run_shell':
/home/du/source/barebox/common/hush.c:1940: undefined reference to 
`ctrlc_handled'

Signed-off-by: DU HUANPENG 
---
 common/console_simple.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/common/console_simple.c b/common/console_simple.c
index 010e0b3..6d293b2 100644
--- a/common/console_simple.c
+++ b/common/console_simple.c
@@ -64,16 +64,20 @@ void console_flush(void)
 }
 EXPORT_SYMBOL(console_flush);
 
-#ifndef ARCH_HAS_CTRLC
 void ctrlc_handled(void)
 {
 }
 /* test if ctrl-c was pressed */
 int ctrlc (void)
 {
+   int ret = 0;
+#ifdef ARCH_HAS_CTRLC
+   ret = arch_ctrlc();
+#else
if (tstc() && getchar() == 3)
-   return 1;
-   return 0;
+   ret = 1;
+#endif
+   return ret;
 }
 EXPORT_SYMBOL(ctrlc);
 
@@ -85,8 +89,6 @@ void console_ctrlc_forbid(void)
 {
 }
 
-#endif /* ARCH_HAS_CTRC */
-
 int console_register(struct console_device *newcdev)
 {
if (console)
-- 
2.7.4


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Re: [PATCH] fix compile error when set CONFIG_CONSOLE_SIMPLE=y

2019-10-15 Thread duhuanpeng
Hi, my patch didn't work with sanbox. maybe I missed understand
the macro
ARCH_HAS_CTRLC
I will fix it and send a new patch soon.

sorry.
du huanpeng




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[PATCH] MIPS: init cache before flashing it

2019-10-15 Thread Oleksij Rempel
Cache information was not initialized on flush_cache_all(). This was the
reason for relatively slow boot speed on MIPS.

Signed-off-by: Oleksij Rempel 
---
 arch/mips/lib/reloc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 9a9e404f7e..3d05ff1381 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -40,6 +40,7 @@
 #include 
 #include 
 
+void r4k_cache_init(void);
 void main_entry(void *fdt, u32 fdt_size);
 void relocate_code(void *fdt, u32 fdt_size, u32 relocaddr);
 
@@ -146,6 +147,7 @@ void relocate_code(void *fdt, u32 fdt_size, u32 ram_size)
apply_reloc(type, (void *)addr, off);
}
 
+   r4k_cache_init();
/* Ensure the icache is coherent */
flush_cache_all();
 
-- 
2.23.0


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[PATCH] libfile: copy_file: prevent spurious error message

2019-10-15 Thread Robert Karszniewicz
Signed-off-by: Robert Karszniewicz 
---
 lib/libfile.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/libfile.c b/lib/libfile.c
index 3f3ec21..319e66b 100644
--- a/lib/libfile.c
+++ b/lib/libfile.c
@@ -349,6 +349,7 @@ int copy_file(const char *src, const char *dst, int verbose)
ret = stat(dst, );
if (ret && ret != -ENOENT)
goto out;
+   ret = 0;
 
/* Set O_TRUNC only if file exist and is a regular file */
if (!ret && S_ISREG(dststat.st_mode))
-- 
2.7.4


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Re: setup for a working framebuffer in qemu

2019-10-15 Thread Ahmad Fatoum
Hello Denis,

On 10/15/19 5:08 PM, Denis Roio wrote:
> 
> hi all! noob question here, hope you don't mind
> 
> is there a recommended, matching configuration to run barebox in qemu
> with a working /dev/fb0 ?

Easiest way is to use barebox sandbox. It has a SDL fb driver.

> 
> 
> I have made some tries already with no success:
> 
> - qemu emulated mips-malta boots, but no fb0
> - qemu emulated vexpress boots, but no fb0

Could be that they don't have driver support in barebox.
Check under drivers/fb.

> - qemu emulated sabrelite can't even get it to boot

There's a CONFIG_BOARD_ARM_GENERIC_DT option that yields a barebox image
that boots like Linux does and can be passed to qemu's -kernel
option. The commit introducing it has some extra info on how to use
it with QEMU + sabrelite.
https://www.spinics.net/lists/u-boot-v2/msg38795.html

> 
> I'm a bit out of ideas. Would really appreciate guidance, this is
> mostly for fun while poking around this wonderful project.
> 
> 
> Thanks!
> 
> 


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setup for a working framebuffer in qemu

2019-10-15 Thread Denis Roio

hi all! noob question here, hope you don't mind

is there a recommended, matching configuration to run barebox in qemu
with a working /dev/fb0 ?


I have made some tries already with no success:

- qemu emulated mips-malta boots, but no fb0
- qemu emulated vexpress boots, but no fb0
- qemu emulated sabrelite can't even get it to boot

I'm a bit out of ideas. Would really appreciate guidance, this is
mostly for fun while poking around this wonderful project.


Thanks!


-- 
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  Ph.D, CTO & co-foundersoftware to empower communities
  ✉ Haparandadam 7-A1, 1013AK Amsterdam, The Netherlands
  턞 crypto κρυπτο крипто गुप्त् 加密 האנוסים المشفره
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Re: MFGTools from NXP

2019-10-15 Thread Ahmad Fatoum
On 10/15/19 4:41 PM, Mihaita Ivascu wrote:
> barebox@Phytec phyCORE-i.MX6 Ultra Lite SOM:/ fastboot devices -l
That's what you run on your host system, not on the target.
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Re: MFGTools from NXP

2019-10-15 Thread Mihaita Ivascu
Hello,

   Thanks for your link. I have tried and got to the step shown in the
attachment.
   Looked here:
https://www.barebox.org/doc/latest/user/usb.html#usb-gadget-autostart-support
  did not understand how to create and execute a script from the host.
  For me the imx6ul board must be in peripheral mode. I wish to flash
the barebox from a windows/Linux workstation, not using usb stick.

barebox@Phytec phyCORE-i.MX6 Ultra Lite SOM:/ otg.mode=peripheral
barebox@Phytec phyCORE-i.MX6 Ultra Lite SOM:/
barebox@Phytec phyCORE-i.MX6 Ultra Lite SOM:/
barebox@Phytec phyCORE-i.MX6 Ultra Lite SOM:/ usbgadget -A
/kernel(kernel)c,/initrd(initrd)c,/devicetree(devicetree)c
udc0: registering UDC driver [g_multi]
multi_bind: creating Fastboot function
g_multi usbgadget: Multifunction Composite Gadget
g_multi usbgadget: userspace failed to provide iSerialNumber
g_multi usbgadget: g_multi ready
barebox@Phytec phyCORE-i.MX6 Ultra Lite SOM:/ fastboot devices -l
fastboot: No such file or directory
barebox@Phytec phyCORE-i.MX6 Ultra Lite SOM:/

thanks,
 Mihaita


On Tue, Oct 15, 2019 at 4:17 PM Ahmad Fatoum  wrote:
>
> Hello,
>
> On 10/15/19 4:07 PM, Mihaita Ivascu wrote:
> > Hello,
> >
> >does anyone have experience with using imx_usb_loader to flash the
> > barebox on a NAND(mtd partition)? If yes some reference scripts would
> > be helpful for me. Or where should I look for an example?
>
> Check out this thread:
> https://www.spinics.net/lists/u-boot-v2/msg37199.html
>
> TL;DR: imx_usb_loader to get barebox into SDRAM, then Android Fastboot for 
> flashing
>
> >
> > Thanks,
> >   Mihaita Ivascu
> >
> >
>
>
>
> --
> Pengutronix e.K.   | |
> Industrial Linux Solutions | http://www.pengutronix.de/  |
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> Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |
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Re: MFGTools from NXP

2019-10-15 Thread Ahmad Fatoum
Hello,

On 10/15/19 4:07 PM, Mihaita Ivascu wrote:
> Hello,
> 
>does anyone have experience with using imx_usb_loader to flash the
> barebox on a NAND(mtd partition)? If yes some reference scripts would
> be helpful for me. Or where should I look for an example?

Check out this thread:
https://www.spinics.net/lists/u-boot-v2/msg37199.html

TL;DR: imx_usb_loader to get barebox into SDRAM, then Android Fastboot for 
flashing

> 
> Thanks,
>   Mihaita Ivascu
> 
> 



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Re: MFGTools from NXP

2019-10-15 Thread Mihaita Ivascu
Hello,

   does anyone have experience with using imx_usb_loader to flash the
barebox on a NAND(mtd partition)? If yes some reference scripts would
be helpful for me. Or where should I look for an example?

Thanks,
  Mihaita Ivascu


On Mon, Oct 14, 2019 at 3:07 PM Mihaita Ivascu
 wrote:
>
> Hello all,
>
> Can I use imx-usb-loader tool from a windows host? I don't think
> so. If that is the case then I am stuck with MFGTools
>
> Thanks,
>Mihaita
>
>
> On Fri, Oct 11, 2019 at 11:47 AM Mihaita Ivascu
>  wrote:
> >
> > Hello Marco,
> >
> >Thanks to your reply. I am not keen to use specifically MFGTool but
> > I do need a method to load flash new barebox and kernel images from
> > windows side.
> >I have tried with MFGTools but was not successfully when using
> > kobs-ng to flash the barebox.  I have attached a log that I send to
> > NXP.
> >
> >If there is more knowledge on how to use imx-usb-loader than I
> > would give it a try.
> >
> > Thanks,
> >   Mihaita
> >
> > On Fri, Oct 11, 2019 at 9:21 AM Marco Felsch  
> > wrote:
> > >
> > > Hi Mihaita,
> > >
> > > On 19-10-10 15:03, Mihaita Ivascu wrote:
> > > > Hello all,
> > > >
> > > > Does anybody have experience with using MFGTools to flash the
> > > > barebox and kernel in NAND for imx6ul platforms?
> > >
> > > Hm.. I think the most of us are using the imx-usb-loader tool ;) I
> > > used it a long time ago but let's try if I can help you. So what is your
> > > question?
> > >
> > > Regards,
> > >   Marco
> > >
> > > > Thanks,
> > > >Mihaita
> > > >
> > > > ___
> > > > barebox mailing list
> > > > barebox@lists.infradead.org
> > > > http://lists.infradead.org/mailman/listinfo/barebox
> > > >
> > >
> > > --
> > > Pengutronix e.K.   | |
> > > Industrial Linux Solutions | http://www.pengutronix.de/  |
> > > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
> > > Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

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Re: [PATCH 2/5] scripts: Add rsatoc tool

2019-10-15 Thread Ahmad Fatoum
On 10/15/19 3:15 PM, Sascha Hauer wrote:
> On Tue, Oct 15, 2019 at 12:21:31PM +0200, Ahmad Fatoum wrote:
>> Hello Sascha,
>>
>> On 10/15/19 9:55 AM, Sascha Hauer wrote:
>>> The rsatoc tool converts rsa public keys into C structs suitable to
>>> compile with barebox. Most of the openssl rsa related stuff has been
>>> taken from the U-Boot mkimage tool.
>>
>> I don't have any FIT image or RSA options enabled, yet my build fails now 
>> with:
>>
>>   RSAKEY  crypto/rsa-keys.h  
>>
>> /bin/sh: 1: ./scripts/rsatoc: not found   
>> ./crypto/Makefile:27: recipe for target 'crypto/rsa-keys.h' failed
>> make[2]: *** [crypto/rsa-keys.h] Error 127   
>>
>> ./Makefile:802: recipe for target 'crypto' failed 
>> make[1]: *** [crypto] Error 2
>>   
> 
> Try again.

Works, thanks.

> 
> Sascha
> 


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Re: [PATCH 2/5] scripts: Add rsatoc tool

2019-10-15 Thread Sascha Hauer
On Tue, Oct 15, 2019 at 12:21:31PM +0200, Ahmad Fatoum wrote:
> Hello Sascha,
> 
> On 10/15/19 9:55 AM, Sascha Hauer wrote:
> > The rsatoc tool converts rsa public keys into C structs suitable to
> > compile with barebox. Most of the openssl rsa related stuff has been
> > taken from the U-Boot mkimage tool.
> 
> I don't have any FIT image or RSA options enabled, yet my build fails now 
> with:
> 
>   RSAKEY  crypto/rsa-keys.h   
>   
> /bin/sh: 1: ./scripts/rsatoc: not found   
> ./crypto/Makefile:27: recipe for target 'crypto/rsa-keys.h' failed
> make[2]: *** [crypto/rsa-keys.h] Error 127
>   
> ./Makefile:802: recipe for target 'crypto' failed 
> make[1]: *** [crypto] Error 2 
>  

Try again.

Sascha

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Re: imx7d enable second core

2019-10-15 Thread Ahmad Fatoum
Hello Giorgio,

On 10/15/19 2:11 PM, Giorgio Dal Molin wrote:
> Hi Ahmad,
> 
> thanks for answering,
> 
> actually I've already done some tests with the 'smc' DEBUG command but I think
> and the results I got are not the expected ones.
> 
> (I must admit I'm not really an expert upon this PSCI subsystem of the imx7, 
> so
> I could be making some trivial errors...)
> 
> For example, if I directly execute 'smc -c' or a 'smc -i' just after barebox
> booted up I get a crash:
> 
> imx7: / smc -c
> prefetch abort
> pc : [<10fc388c>]lr : []
> sp : bffefe10  ip : bffefe20  fp : 
> r10:   r9 : bfe4a55c  r8 : bfe5a0f0
> r7 :   r6 :   r5 :   r4 : 
> r3 :   r2 : bfe4a55c  r1 : 0001  r0 : 8403
> Flags: nZCv  IRQs off  FIQs off  Mode UK6_32
> 
> no stack data available
> 
> I think this is OK because the secure monitor is still not installed.

Ye, that's expected.

> 
> Executing first a 'smc -n' I have:
> 
> Hit any key to stop autoboot:4
> imx7: / smc -n
> imx7: / smc -i
> found psci version 1.0
> imx7: / 
> 
> That's OK, I think.
> 
> Now I can try a 'smc -c' to enable the second core:
> 
> imx7: / smc -c
> imx7: / 
> 
> at this point I would expect to see the debug line generated by the
> 'psci_printf("2nd CPU online, now turn off again\n");' present in the funtion
> 'second_entry(void)'. Instead I just don't see anything.
> Is this the expected behavior of 'smc -c' ?

If ARM_PSCI_DEBUG=y, you should see something, yes.
You could git-bisect and see when it broke.


> 
> giorgio
> 
>> On October 15, 2019 at 1:37 PM Ahmad Fatoum  wrote:
>>
>>
>> On 10/15/19 1:29 PM, Giorgio Dal Molin wrote:
>>> Hi,
>>>
>>> can anyone please confirm that a recent barebox version (v2019.10 or 
>>> v2019.09)
>>> is able to boot a linux kernel so that it can enable the second cpu core ?
>>
>> If you #define DEBUG in arch/arm/cpu/psci.c, a smc command is enabled that 
>> can
>> be used to test ARM_PSCI_0_2_CPU_ON. This might aid you in your debug effort.
>>
>> Cheers
>> Ahmad
>>
>>> It actually used to work in the past but now I only get one core running:
>>>
>>> Loading ARM Linux zImage '/mnt/boot/kernel.img'
>>> Loading devicetree from '/mnt/boot/devtree.dtb'
>>> commandline: console=ttymxc0,115200n8 
>>> ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
>>> root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
>>> video=HDMI-A-1:1024x768M@60 console=tty1
>>> Starting kernel in nonsecure mode
>>> [0.00] 000: Booting Linux on physical CPU 0x0
>>> [0.00] 000: Linux version 5.2.19-rt11-00268-g0308d71d8410-dirty 
>>> (giorgio@BVblfs) (gcc version 9.2.1 20190813 (OSELAS.Toolchain 9.2.1)) #1 
>>> SMP PREEMPT RT Thu Oct 10 07:50:01 CEST 2019
>>> [0.00] 000: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), 
>>> cr=10c5387d
>>> [0.00] 000: CPU: div instructions available: patching division code
>>> [0.00] 000: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
>>> instruction cache
>>> [0.00] 000: OF: fdt: Machine model: Freescale i.MX7 SabreSD Board
>>> [0.00] 000: Memory policy: Data cache writealloc
>>> [0.00] 000: cma: Reserved 64 MiB at 0xac00
>>> [0.00] 000: percpu: Embedded 10 pages/cpu s19296 r0 d21664 u40960
>>> [0.00] 000: Built 1 zonelists, mobility grouping on.  Total pages: 
>>> 260608
>>> [0.00] 000: Kernel command line: console=ttymxc0,115200n8 
>>> ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
>>> root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
>>> video=HDMI-A-1:1024x768M@60 console=tty1
>>> [0.00] 000: Dentry cache hash table entries: 131072 (order: 8, 
>>> 1048576 bytes)
>>> [0.00] 000: Inode-cache hash table entries: 65536 (order: 6, 262144 
>>> bytes)
>>> [0.00] 000: Memory: 958252K/1048576K available (9216K kernel code, 
>>> 403K rwdata, 2308K rodata, 1024K init, 719K bss, 24788K reserved, 65536K 
>>> cma-reserved, 261700K highmem)
>>> [0.00] 000: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, 
>>> Nodes=1
>>> [0.00] 000: rcu: Preemptible hierarchical RCU implementation.
>>> [0.00] 000: rcu:RCU priority boosting: priority 1 delay 500 
>>> ms.
>>> [0.00] 000: rcu:RCU_SOFTIRQ processing moved to rcuc 
>>> kthreads.
>>> [0.00] 000: No expedited grace period (rcu_normal_after_boot).
>>> [0.00] 000: Tasks RCU enabled.
>>> [0.00] 000: rcu: RCU calculated value of scheduler-enlistment delay 
>>> is 10 jiffies.
>>> [0.00] 000: NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
>>> [0.00] 000: rcu:Offload RCU callbacks from CPUs: (none).
>>> [0.00] 000: arch_timer: cp15 timer(s) running at 8.00MHz (virt).
>>> [0.00] 000: clocksource: arch_sys_counter: mask: 0xff 
>>> max_cycles: 0x1d854df40, max_idle_ns: 440795202120 ns
>>> [0.01] 000: sched_clock: 56 bits at 8MHz, resolution 125ns, 

Re: imx7d enable second core

2019-10-15 Thread Giorgio Dal Molin
Hi Ahmad,

thanks for answering,

actually I've already done some tests with the 'smc' DEBUG command but I think
and the results I got are not the expected ones.

(I must admit I'm not really an expert upon this PSCI subsystem of the imx7, so
I could be making some trivial errors...)

For example, if I directly execute 'smc -c' or a 'smc -i' just after barebox
booted up I get a crash:

imx7: / smc -c
prefetch abort
pc : [<10fc388c>]lr : []
sp : bffefe10  ip : bffefe20  fp : 
r10:   r9 : bfe4a55c  r8 : bfe5a0f0
r7 :   r6 :   r5 :   r4 : 
r3 :   r2 : bfe4a55c  r1 : 0001  r0 : 8403
Flags: nZCv  IRQs off  FIQs off  Mode UK6_32

no stack data available

I think this is OK because the secure monitor is still not installed.

Executing first a 'smc -n' I have:

Hit any key to stop autoboot:4
imx7: / smc -n
imx7: / smc -i
found psci version 1.0
imx7: / 

That's OK, I think.

Now I can try a 'smc -c' to enable the second core:

imx7: / smc -c
imx7: / 

at this point I would expect to see the debug line generated by the
'psci_printf("2nd CPU online, now turn off again\n");' present in the funtion
'second_entry(void)'. Instead I just don't see anything.
Is this the expected behavior of 'smc -c' ?

giorgio

> On October 15, 2019 at 1:37 PM Ahmad Fatoum  wrote:
> 
> 
> On 10/15/19 1:29 PM, Giorgio Dal Molin wrote:
> > Hi,
> > 
> > can anyone please confirm that a recent barebox version (v2019.10 or 
> > v2019.09)
> > is able to boot a linux kernel so that it can enable the second cpu core ?
> 
> If you #define DEBUG in arch/arm/cpu/psci.c, a smc command is enabled that can
> be used to test ARM_PSCI_0_2_CPU_ON. This might aid you in your debug effort.
> 
> Cheers
> Ahmad
> 
> > It actually used to work in the past but now I only get one core running:
> > 
> > Loading ARM Linux zImage '/mnt/boot/kernel.img'
> > Loading devicetree from '/mnt/boot/devtree.dtb'
> > commandline: console=ttymxc0,115200n8 
> > ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
> > root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
> > video=HDMI-A-1:1024x768M@60 console=tty1
> > Starting kernel in nonsecure mode
> > [0.00] 000: Booting Linux on physical CPU 0x0
> > [0.00] 000: Linux version 5.2.19-rt11-00268-g0308d71d8410-dirty 
> > (giorgio@BVblfs) (gcc version 9.2.1 20190813 (OSELAS.Toolchain 9.2.1)) #1 
> > SMP PREEMPT RT Thu Oct 10 07:50:01 CEST 2019
> > [0.00] 000: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), 
> > cr=10c5387d
> > [0.00] 000: CPU: div instructions available: patching division code
> > [0.00] 000: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
> > instruction cache
> > [0.00] 000: OF: fdt: Machine model: Freescale i.MX7 SabreSD Board
> > [0.00] 000: Memory policy: Data cache writealloc
> > [0.00] 000: cma: Reserved 64 MiB at 0xac00
> > [0.00] 000: percpu: Embedded 10 pages/cpu s19296 r0 d21664 u40960
> > [0.00] 000: Built 1 zonelists, mobility grouping on.  Total pages: 
> > 260608
> > [0.00] 000: Kernel command line: console=ttymxc0,115200n8 
> > ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
> > root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
> > video=HDMI-A-1:1024x768M@60 console=tty1
> > [0.00] 000: Dentry cache hash table entries: 131072 (order: 8, 
> > 1048576 bytes)
> > [0.00] 000: Inode-cache hash table entries: 65536 (order: 6, 262144 
> > bytes)
> > [0.00] 000: Memory: 958252K/1048576K available (9216K kernel code, 
> > 403K rwdata, 2308K rodata, 1024K init, 719K bss, 24788K reserved, 65536K 
> > cma-reserved, 261700K highmem)
> > [0.00] 000: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, 
> > Nodes=1
> > [0.00] 000: rcu: Preemptible hierarchical RCU implementation.
> > [0.00] 000: rcu:RCU priority boosting: priority 1 delay 500 
> > ms.
> > [0.00] 000: rcu:RCU_SOFTIRQ processing moved to rcuc 
> > kthreads.
> > [0.00] 000: No expedited grace period (rcu_normal_after_boot).
> > [0.00] 000: Tasks RCU enabled.
> > [0.00] 000: rcu: RCU calculated value of scheduler-enlistment delay 
> > is 10 jiffies.
> > [0.00] 000: NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
> > [0.00] 000: rcu:Offload RCU callbacks from CPUs: (none).
> > [0.00] 000: arch_timer: cp15 timer(s) running at 8.00MHz (virt).
> > [0.00] 000: clocksource: arch_sys_counter: mask: 0xff 
> > max_cycles: 0x1d854df40, max_idle_ns: 440795202120 ns
> > [0.01] 000: sched_clock: 56 bits at 8MHz, resolution 125ns, wraps 
> > every 2199023255500ns
> > [0.12] 000: Switching to timer-based delay loop, resolution 125ns
> > [0.000433] 000: Switching to timer-based delay loop, resolution 41ns
> > [0.000445] 000: sched_clock: 32 bits at 24MHz, resolution 41ns, wraps 
> > every 89478484971ns
> 

Re: imx7d enable second core

2019-10-15 Thread Ahmad Fatoum
On 10/15/19 1:37 PM, Ahmad Fatoum wrote:
> If you #define DEBUG in arch/arm/cpu/psci.c, a smc command is enabled that can
> be used to test ARM_PSCI_0_2_CPU_ON. This might aid you in your debug effort.

Should've added that I don't have an answer for your original question,
just figured I should note this as it may be helpful.

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Re: imx7d enable second core

2019-10-15 Thread Ahmad Fatoum
On 10/15/19 1:29 PM, Giorgio Dal Molin wrote:
> Hi,
> 
> can anyone please confirm that a recent barebox version (v2019.10 or v2019.09)
> is able to boot a linux kernel so that it can enable the second cpu core ?

If you #define DEBUG in arch/arm/cpu/psci.c, a smc command is enabled that can
be used to test ARM_PSCI_0_2_CPU_ON. This might aid you in your debug effort.

Cheers
Ahmad

> It actually used to work in the past but now I only get one core running:
> 
> Loading ARM Linux zImage '/mnt/boot/kernel.img'
> Loading devicetree from '/mnt/boot/devtree.dtb'
> commandline: console=ttymxc0,115200n8 
> ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
> root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
> video=HDMI-A-1:1024x768M@60 console=tty1
> Starting kernel in nonsecure mode
> [0.00] 000: Booting Linux on physical CPU 0x0
> [0.00] 000: Linux version 5.2.19-rt11-00268-g0308d71d8410-dirty 
> (giorgio@BVblfs) (gcc version 9.2.1 20190813 (OSELAS.Toolchain 9.2.1)) #1 SMP 
> PREEMPT RT Thu Oct 10 07:50:01 CEST 2019
> [0.00] 000: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), 
> cr=10c5387d
> [0.00] 000: CPU: div instructions available: patching division code
> [0.00] 000: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
> instruction cache
> [0.00] 000: OF: fdt: Machine model: Freescale i.MX7 SabreSD Board
> [0.00] 000: Memory policy: Data cache writealloc
> [0.00] 000: cma: Reserved 64 MiB at 0xac00
> [0.00] 000: percpu: Embedded 10 pages/cpu s19296 r0 d21664 u40960
> [0.00] 000: Built 1 zonelists, mobility grouping on.  Total pages: 
> 260608
> [0.00] 000: Kernel command line: console=ttymxc0,115200n8 
> ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
> root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
> video=HDMI-A-1:1024x768M@60 console=tty1
> [0.00] 000: Dentry cache hash table entries: 131072 (order: 8, 
> 1048576 bytes)
> [0.00] 000: Inode-cache hash table entries: 65536 (order: 6, 262144 
> bytes)
> [0.00] 000: Memory: 958252K/1048576K available (9216K kernel code, 
> 403K rwdata, 2308K rodata, 1024K init, 719K bss, 24788K reserved, 65536K 
> cma-reserved, 261700K highmem)
> [0.00] 000: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
> [0.00] 000: rcu: Preemptible hierarchical RCU implementation.
> [0.00] 000: rcu:RCU priority boosting: priority 1 delay 500 
> ms.
> [0.00] 000: rcu:RCU_SOFTIRQ processing moved to rcuc kthreads.
> [0.00] 000: No expedited grace period (rcu_normal_after_boot).
> [0.00] 000: Tasks RCU enabled.
> [0.00] 000: rcu: RCU calculated value of scheduler-enlistment delay 
> is 10 jiffies.
> [0.00] 000: NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
> [0.00] 000: rcu:Offload RCU callbacks from CPUs: (none).
> [0.00] 000: arch_timer: cp15 timer(s) running at 8.00MHz (virt).
> [0.00] 000: clocksource: arch_sys_counter: mask: 0xff 
> max_cycles: 0x1d854df40, max_idle_ns: 440795202120 ns
> [0.01] 000: sched_clock: 56 bits at 8MHz, resolution 125ns, wraps 
> every 2199023255500ns
> [0.12] 000: Switching to timer-based delay loop, resolution 125ns
> [0.000433] 000: Switching to timer-based delay loop, resolution 41ns
> [0.000445] 000: sched_clock: 32 bits at 24MHz, resolution 41ns, wraps 
> every 89478484971ns
> [0.000456] 000: clocksource: mxc_timer1: mask: 0x max_cycles: 
> 0x, max_idle_ns: 79635851949 ns
> [0.001625] 000: Console: colour dummy device 80x30
> [0.001638] 000: printk: console [tty1] enabled
> [0.001673] 000: Calibrating delay loop (skipped), value calculated using 
> timer frequency.. 48.00 BogoMIPS (lpj=24)
> [0.001680] 000: pid_max: default: 32768 minimum: 301
> [0.001816] 000: Mount-cache hash table entries: 2048 (order: 1, 8192 
> bytes)
> [0.001833] 000: Mountpoint-cache hash table entries: 2048 (order: 1, 8192 
> bytes)
> [0.002543] 000: CPU: Testing write buffer coherency: ok
> [0.002896] 000: CPU0: update cpu_capacity 1024
> [0.002908] 000: CPU0: thread -1, cpu 0, socket 0, mpidr 8000
> [0.06] 000: Setting up static identity map for 0x8010 - 0x8010003c
> [0.079971] 000: rcu: Hierarchical SRCU implementation.
> [0.160105] 000: smp: Bringing up secondary CPUs ...
> [0.280352] 000: smp: Brought up 1 node, 1 CPU
> [0.280362] 000: SMP: Total of 1 processors activated (48.00 BogoMIPS).
> [0.280370] 000: CPU: All CPU(s) started in SVC mode.
> [0.281280] 000: devtmpfs: initialized
> 
> giorgio
> 
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Pengutronix e.K.   | |
Industrial Linux Solutions  

imx7d enable second core

2019-10-15 Thread Giorgio Dal Molin
Hi,

can anyone please confirm that a recent barebox version (v2019.10 or v2019.09)
is able to boot a linux kernel so that it can enable the second cpu core ?
It actually used to work in the past but now I only get one core running:

Loading ARM Linux zImage '/mnt/boot/kernel.img'
Loading devicetree from '/mnt/boot/devtree.dtb'
commandline: console=ttymxc0,115200n8 
ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
video=HDMI-A-1:1024x768M@60 console=tty1
Starting kernel in nonsecure mode
[0.00] 000: Booting Linux on physical CPU 0x0
[0.00] 000: Linux version 5.2.19-rt11-00268-g0308d71d8410-dirty 
(giorgio@BVblfs) (gcc version 9.2.1 20190813 (OSELAS.Toolchain 9.2.1)) #1 SMP 
PREEMPT RT Thu Oct 10 07:50:01 CEST 2019
[0.00] 000: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), 
cr=10c5387d
[0.00] 000: CPU: div instructions available: patching division code
[0.00] 000: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
instruction cache
[0.00] 000: OF: fdt: Machine model: Freescale i.MX7 SabreSD Board
[0.00] 000: Memory policy: Data cache writealloc
[0.00] 000: cma: Reserved 64 MiB at 0xac00
[0.00] 000: percpu: Embedded 10 pages/cpu s19296 r0 d21664 u40960
[0.00] 000: Built 1 zonelists, mobility grouping on.  Total pages: 
260608
[0.00] 000: Kernel command line: console=ttymxc0,115200n8 
ip=11.0.0.4::11.0.0.2:255.0.0.0:armgdm:eth0: 
root=PARTUUID=abd2f9f6-88e5-4657-a5fb-aeb2cc6fde7e rootwait 
video=HDMI-A-1:1024x768M@60 console=tty1
[0.00] 000: Dentry cache hash table entries: 131072 (order: 8, 1048576 
bytes)
[0.00] 000: Inode-cache hash table entries: 65536 (order: 6, 262144 
bytes)
[0.00] 000: Memory: 958252K/1048576K available (9216K kernel code, 403K 
rwdata, 2308K rodata, 1024K init, 719K bss, 24788K reserved, 65536K 
cma-reserved, 261700K highmem)
[0.00] 000: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[0.00] 000: rcu: Preemptible hierarchical RCU implementation.
[0.00] 000: rcu:RCU priority boosting: priority 1 delay 500 ms.
[0.00] 000: rcu:RCU_SOFTIRQ processing moved to rcuc kthreads.
[0.00] 000: No expedited grace period (rcu_normal_after_boot).
[0.00] 000: Tasks RCU enabled.
[0.00] 000: rcu: RCU calculated value of scheduler-enlistment delay is 
10 jiffies.
[0.00] 000: NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[0.00] 000: rcu:Offload RCU callbacks from CPUs: (none).
[0.00] 000: arch_timer: cp15 timer(s) running at 8.00MHz (virt).
[0.00] 000: clocksource: arch_sys_counter: mask: 0xff 
max_cycles: 0x1d854df40, max_idle_ns: 440795202120 ns
[0.01] 000: sched_clock: 56 bits at 8MHz, resolution 125ns, wraps every 
2199023255500ns
[0.12] 000: Switching to timer-based delay loop, resolution 125ns
[0.000433] 000: Switching to timer-based delay loop, resolution 41ns
[0.000445] 000: sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 
89478484971ns
[0.000456] 000: clocksource: mxc_timer1: mask: 0x max_cycles: 
0x, max_idle_ns: 79635851949 ns
[0.001625] 000: Console: colour dummy device 80x30
[0.001638] 000: printk: console [tty1] enabled
[0.001673] 000: Calibrating delay loop (skipped), value calculated using 
timer frequency.. 48.00 BogoMIPS (lpj=24)
[0.001680] 000: pid_max: default: 32768 minimum: 301
[0.001816] 000: Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[0.001833] 000: Mountpoint-cache hash table entries: 2048 (order: 1, 8192 
bytes)
[0.002543] 000: CPU: Testing write buffer coherency: ok
[0.002896] 000: CPU0: update cpu_capacity 1024
[0.002908] 000: CPU0: thread -1, cpu 0, socket 0, mpidr 8000
[0.06] 000: Setting up static identity map for 0x8010 - 0x8010003c
[0.079971] 000: rcu: Hierarchical SRCU implementation.
[0.160105] 000: smp: Bringing up secondary CPUs ...
[0.280352] 000: smp: Brought up 1 node, 1 CPU
[0.280362] 000: SMP: Total of 1 processors activated (48.00 BogoMIPS).
[0.280370] 000: CPU: All CPU(s) started in SVC mode.
[0.281280] 000: devtmpfs: initialized

giorgio

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Re: [PATCH 2/5] scripts: Add rsatoc tool

2019-10-15 Thread Ahmad Fatoum
Hello Sascha,

On 10/15/19 9:55 AM, Sascha Hauer wrote:
> The rsatoc tool converts rsa public keys into C structs suitable to
> compile with barebox. Most of the openssl rsa related stuff has been
> taken from the U-Boot mkimage tool.

I don't have any FIT image or RSA options enabled, yet my build fails now with:

  RSAKEY  crypto/rsa-keys.h 

/bin/sh: 1: ./scripts/rsatoc: not found   
./crypto/Makefile:27: recipe for target 'crypto/rsa-keys.h' failed
make[2]: *** [crypto/rsa-keys.h] Error 127  

./Makefile:802: recipe for target 'crypto' failed 
make[1]: *** [crypto] Error 2   


Cheers
Ahmad

> 
> Signed-off-by: Sascha Hauer 
> ---
>  scripts/.gitignore |   1 +
>  scripts/Makefile   |   3 +
>  scripts/rsatoc.c   | 445 +
>  3 files changed, 449 insertions(+)
>  create mode 100644 scripts/rsatoc.c
> 
> diff --git a/scripts/.gitignore b/scripts/.gitignore
> index 45c81bf8f4..76ea271abb 100644
> --- a/scripts/.gitignore
> +++ b/scripts/.gitignore
> @@ -29,3 +29,4 @@ mxs-usb-loader
>  omap4_usbboot
>  omap3-usb-loader
>  mips-relocs
> +rsatoc
> diff --git a/scripts/Makefile b/scripts/Makefile
> index dffab53c73..81d1a501b0 100644
> --- a/scripts/Makefile
> +++ b/scripts/Makefile
> @@ -10,6 +10,9 @@ hostprogs-y  += fix_size
>  hostprogs-y  += bareboxenv
>  hostprogs-y  += bareboxcrc32
>  hostprogs-y  += kernel-install
> +hostprogs-$(CONFIG_CRYPTO_RSA_BUILTIN_KEYS) += rsatoc
> +HOSTCFLAGS_rsatoc = `pkg-config --cflags openssl`
> +HOSTLDLIBS_rsatoc = `pkg-config --libs openssl`
>  hostprogs-$(CONFIG_IMD)  += bareboximd
>  hostprogs-$(CONFIG_KALLSYMS) += kallsyms
>  hostprogs-$(CONFIG_MIPS) += mips-relocs
> diff --git a/scripts/rsatoc.c b/scripts/rsatoc.c
> new file mode 100644
> index 00..f853691908
> --- /dev/null
> +++ b/scripts/rsatoc.c
> @@ -0,0 +1,445 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * rsatoc - utility to convert an RSA key to a C struct
> + *
> + * This tool converts an RSA key given as file or PKCS#11
> + * URI to a C struct suitable to compile with barebox.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static int rsa_err(const char *msg)
> +{
> + unsigned long sslErr = ERR_get_error();
> +
> + fprintf(stderr, "%s", msg);
> + fprintf(stderr, ": %s\n",
> + ERR_error_string(sslErr, 0));
> +
> + return -1;
> +}
> +
> +/**
> + * rsa_pem_get_pub_key() - read a public key from a .crt file
> + *
> + * @keydir:  Directory containins the key
> + * @name Name of key file (will have a .crt extension)
> + * @rsap Returns RSA object, or NULL on failure
> + * @return 0 if ok, -ve on error (in which case *rsap will be set to NULL)
> + */
> +static int rsa_pem_get_pub_key(const char *path, RSA **rsap)
> +{
> + EVP_PKEY *key;
> + X509 *cert;
> + RSA *rsa;
> + FILE *f;
> + int ret;
> +
> + *rsap = NULL;
> + f = fopen(path, "r");
> + if (!f) {
> + fprintf(stderr, "Couldn't open RSA certificate: '%s': %s\n",
> + path, strerror(errno));
> + return -EACCES;
> + }
> +
> + /* Read the certificate */
> + cert = NULL;
> + if (!PEM_read_X509(f, , NULL, NULL)) {
> + rsa_err("Couldn't read certificate");
> + ret = -EINVAL;
> + goto err_cert;
> + }
> +
> + /* Get the public key from the certificate. */
> + key = X509_get_pubkey(cert);
> + if (!key) {
> + rsa_err("Couldn't read public key\n");
> + ret = -EINVAL;
> + goto err_pubkey;
> + }
> +
> + /* Convert to a RSA_style key. */
> + rsa = EVP_PKEY_get1_RSA(key);
> + if (!rsa) {
> + rsa_err("Couldn't convert to a RSA style key");
> + ret = -EINVAL;
> + goto err_rsa;
> + }
> + fclose(f);
> + EVP_PKEY_free(key);
> + X509_free(cert);
> + *rsap = rsa;
> +
> + return 0;
> +
> +err_rsa:
> + EVP_PKEY_free(key);
> +err_pubkey:
> + X509_free(cert);
> +err_cert:
> + fclose(f);
> + return ret;
> +}
> +
> +/**
> + * rsa_engine_get_pub_key() - read a public key from given engine
> + *
> + * @keydir:  Key prefix
> + * @name Name of key
> + * @engine   Engine to use
> + * @rsap Returns RSA object, or NULL on failure
> + * @return 0 if ok, -ve on error (in which case *rsap will be set to NULL)
> + */
> +static int rsa_engine_get_pub_key(const char *key_id,
> +   ENGINE *engine, RSA **rsap)
> +{
> + EVP_PKEY *key;
> + RSA 

[PATCH v2 2/3] mci: add support for stm32mp sd/mmc controller

2019-10-15 Thread Oleksij Rempel
This driver was ported from u-boot v2019.10.
Instead of devicetree compatible it is using ARM AMBA id. So, there is
no need to patch devicetree with different compatible as it was
implemented in u-boot.

Signed-off-by: Oleksij Rempel 
---
 drivers/mci/Kconfig|   8 +
 drivers/mci/Makefile   |   1 +
 drivers/mci/stm32_sdmmc2.c | 665 +
 3 files changed, 674 insertions(+)
 create mode 100644 drivers/mci/stm32_sdmmc2.c

diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index 08c8c84e8c..5b56031013 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -153,4 +153,12 @@ config MMC_SPI_CRC_ON
help
  Enable CRC protection for transfers
 
+config MCI_STM32_SDMMC2
+   bool "STMicroelectronics STM32H7 SD/MMC Host Controller support"
+   depends on ARM_AMBA
+   help
+ This selects support for the SD/MMC controller on STM32H7 SoCs.
+ If you have a board based on such a SoC and with a SD/MMC slot,
+ say Y or M here.
+
 endif
diff --git a/drivers/mci/Makefile b/drivers/mci/Makefile
index 25a1d073dc..04c1287fee 100644
--- a/drivers/mci/Makefile
+++ b/drivers/mci/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_MCI_TEGRA)   += tegra-sdmmc.o
 obj-$(CONFIG_MCI_SPI)  += mci_spi.o
 obj-$(CONFIG_MCI_DW)   += dw_mmc.o
 obj-$(CONFIG_MCI_MMCI) += mmci.o
+obj-$(CONFIG_MCI_STM32_SDMMC2) += stm32_sdmmc2.o
diff --git a/drivers/mci/stm32_sdmmc2.c b/drivers/mci/stm32_sdmmc2.c
new file mode 100644
index 00..7346c8a3f5
--- /dev/null
+++ b/drivers/mci/stm32_sdmmc2.c
@@ -0,0 +1,665 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard,  for STMicroelectronics.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRIVER_NAME "stm32_sdmmc"
+
+/* SDMMC REGISTERS OFFSET */
+#define SDMMC_POWER0x00/* SDMMC power control */
+#define SDMMC_CLKCR0x04/* SDMMC clock control */
+#define SDMMC_ARG  0x08/* SDMMC argument  */
+#define SDMMC_CMD  0x0C/* SDMMC command   */
+#define SDMMC_RESP10x14/* SDMMC response 1*/
+#define SDMMC_RESP20x18/* SDMMC response 2*/
+#define SDMMC_RESP30x1C/* SDMMC response 3*/
+#define SDMMC_RESP40x20/* SDMMC response 4*/
+#define SDMMC_DTIMER   0x24/* SDMMC data timer*/
+#define SDMMC_DLEN 0x28/* SDMMC data length   */
+#define SDMMC_DCTRL0x2C/* SDMMC data control  */
+#define SDMMC_DCOUNT   0x30/* SDMMC data counter  */
+#define SDMMC_STA  0x34/* SDMMC status*/
+#define SDMMC_ICR  0x38/* SDMMC interrupt clear   */
+#define SDMMC_MASK 0x3C/* SDMMC mask  */
+#define SDMMC_IDMACTRL 0x50/* SDMMC DMA control   */
+#define SDMMC_IDMABASE00x58/* SDMMC DMA buffer 0 base 
address */
+
+/* SDMMC_POWER register */
+#define SDMMC_POWER_PWRCTRL_MASK   GENMASK(1, 0)
+#define SDMMC_POWER_PWRCTRL_OFF0
+#define SDMMC_POWER_PWRCTRL_CYCLE  2
+#define SDMMC_POWER_PWRCTRL_ON 3
+#define SDMMC_POWER_VSWITCHBIT(2)
+#define SDMMC_POWER_VSWITCHEN  BIT(3)
+#define SDMMC_POWER_DIRPOL BIT(4)
+
+/* SDMMC_CLKCR register */
+#define SDMMC_CLKCR_CLKDIV GENMASK(9, 0)
+#define SDMMC_CLKCR_CLKDIV_MAX SDMMC_CLKCR_CLKDIV
+#define SDMMC_CLKCR_PWRSAV BIT(12)
+#define SDMMC_CLKCR_WIDBUS_4   BIT(14)
+#define SDMMC_CLKCR_WIDBUS_8   BIT(15)
+#define SDMMC_CLKCR_NEGEDGEBIT(16)
+#define SDMMC_CLKCR_HWFC_ENBIT(17)
+#define SDMMC_CLKCR_DDRBIT(18)
+#define SDMMC_CLKCR_BUSSPEED   BIT(19)
+#define SDMMC_CLKCR_SELCLKRX_MASK  GENMASK(21, 20)
+#define SDMMC_CLKCR_SELCLKRX_CK0
+#define SDMMC_CLKCR_SELCLKRX_CKIN  BIT(20)
+#define SDMMC_CLKCR_SELCLKRX_FBCK  BIT(21)
+
+/* SDMMC_CMD register */
+#define SDMMC_CMD_CMDINDEX GENMASK(5, 0)
+#define SDMMC_CMD_CMDTRANS BIT(6)
+#define SDMMC_CMD_CMDSTOP  BIT(7)
+#define SDMMC_CMD_WAITRESP GENMASK(9, 8)
+#define SDMMC_CMD_WAITRESP_0   BIT(8)
+#define SDMMC_CMD_WAITRESP_1   BIT(9)
+#define SDMMC_CMD_WAITINT  BIT(10)
+#define SDMMC_CMD_WAITPEND BIT(11)
+#define SDMMC_CMD_CPSMEN   BIT(12)
+#define SDMMC_CMD_DTHOLD   BIT(13)
+#define SDMMC_CMD_BOOTMODE BIT(14)
+#define SDMMC_CMD_BOOTEN   BIT(15)
+#define SDMMC_CMD_CMDSUSPEND   

[PATCH v2 1/3] ARM: stm32mp: enable ARM_AMBA

2019-10-15 Thread Oleksij Rempel
It is needed for mci/sd/mmc driver.

Signed-off-by: Oleksij Rempel 
---
 arch/arm/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 30a380f2f2..5e110bfff7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -199,6 +199,7 @@ config ARCH_STM32MP
select HAS_DEBUG_LL
select HAVE_CLK
select GPIOLIB
+   select ARM_AMBA
 
 config ARCH_VERSATILE
bool "ARM Versatile boards (ARM926EJ-S)"
-- 
2.23.0


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[PATCH v2 3/3] ARM: dts: stm32mp157a-dk1: overwrite regulator for sdmmc node

2019-10-15 Thread Oleksij Rempel
There is currently no driver for the STPMIC1, which supplies the 3v3
rail into the SDMMC2. The regulator is on on boot though, so lets
replace it with a fixed regulator till we have a regulator driver for
the STPMIC1.

Signed-off-by: Oleksij Rempel 
[afa: replaced /delete-node/ with fixed-regulator]
Signed-off-by: Ahmad Fatoum 
---
 arch/arm/dts/stm32mp157a-dk1.dtsi | 13 +
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi 
b/arch/arm/dts/stm32mp157a-dk1.dtsi
index cd3d614d46..460637450a 100644
--- a/arch/arm/dts/stm32mp157a-dk1.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1.dtsi
@@ -33,4 +33,17 @@
pool;
};
};
+
+   reg_vmmc: regulator-vmmc {
+   compatible = "regulator-fixed";
+   regulator-name = "vmmc";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   };
+};
+
+ {
+   /* regulator driver not yet ported to barebox, but always on */
+   vmmc-supply = <_vmmc>;
 };
-- 
2.23.0


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v2019.10.0

2019-10-15 Thread Sascha Hauer
Hi All,

I just released our October Release barebox-2019.10.0. The STM32MP1
support continues to evolve, this time we have I2C, watchdog and PMIC
drivers. The OMAP Nand driver gained BCH16 support and with it support
for the Error Location Module (ELM). One bug fixed that someone might
have stumbled upon is that TFTP files no longer get cached which means
that if you exchange a file on a TFTP server and load it again in
barebox you actually get the new version of the file and no longer the
outdated version. As usual, a for a full list of changes see below.

Have fun!
 Sascha


Ahmad Fatoum (48):
  net: macb: extend support to Microchip SAMA5D2
  serial: stm32: set linux_console_name
  fs: tftp: remove duplicate header
  fs: provide no_revalidate_d_ops for network file systems
  fs: tftp: don't maintain tftp dentries in dcache
  sandbox: include header to provide missing prototype
  sandbox: remove unused ARCH_LINUX Kconfig symbol
  sandbox: redefine optarg and optind to avoid collisions
  sandbox: compile with symbol -fvisibility=hidden
  ratp: fix use of %hu for printing int
  complete: remove unused variable
  ata: fix mismatched header guards
  i2c-mux-pca954x: remove use of uninitialized variable
  net: phy: mv88e6xxx: remove duplicate member in struct initializer
  smc911x: fix inverted poll-for-ready
  nvme: use 64 bit types for timeouts even on 32 bit systems
  usb: gadget: fsl_udc: remove always-true null pointer checks
  commands: mmc_extcsd: describe missing bit
  gui: png_lode: fix freeing of uninitialized pointer
  fs: fat: fix use of wrong enumeration type
  libfile: have write_full return a descriptive error code
  ARM: i.MX: bbu: early exit when partition too small
  fs: omap4_usbbootfs: remove commented out code
  startup: allow ctrl+c abort during boot sequence
  Kconfig: create Kconfig symbol for ARCH_HAS_STACK_DUMP
  Kconfig: create Kconfig symbol for ARCH_HAS_DATA_ABORT_MASK
  blackfin: delete unused  definitions
  Kconfig: retire empty 
  lib: add HAVE_EFFICIENT_UNALIGNED_ACCESS Kconfig option
  console: fix out-of-bounds read in dputc(/dev/*, ...)
  Documentation: efi: fix typos
  gpio: iopoll: implement gpio_poll_timeout_us
  param: make dev_add_param_string_fixed value parameter const
  input: add handler for reset and power key input events
  edit: replace ASCII codes by symbolic names
  common: add generic CONFIG_UBSAN plumbing
  commands: add intentionally UB triggering ubsan command
  common: add generic CONFIG_KASAN option
  sandbox: use sanitizer unwind for dump_stack if available
  sandbox: support Address and UndefinedBehavior sanitizers
  sandbox: hostfile: allow probing from device tree
  sandbox: dts: add example for barebox, hostfile backed state
  hwrng: add sandbox driver interface to host /dev/random
  i2c: port Linux i2c_parse_fw_timings
  i2c: add stm32f7 I2C adapter driver
  mfd: add support for STPMIC1
  watchdog: add support for STPMIC1 integrated watchdog
  input: specialkeys: remove unused printk argument

Andrey Smirnov (13):
  mfd: rave-sp: Emulate firmware/bootloader mode reporting on RDU2
  mtd: spi-nor: Import missing Micron devices
  i2c/pca954x: Initialize the mux to disconnected state
  Documentation: Provide default values for version/release
  ARM: dts: vf610-zii-dev-rev-b: Fix SPI flash node name
  ARM: dts: vf610-zii-dev-rev-c: Fix DSPI flash node name
  ARM: dts: vf610-zii-cfu1: Configure "STATUS" LED as heartbeat
  ARM: dts: vf610-zii-cfu1: Expose fiber optic module EEPROM
  ARM: dts: vf610-zii-scu4-aib: Expose fiber EEPROM modules
  ARM: dts: imx8mq-zii-ultra: Add switch EEPROM alias
  ARM: zii-vf610-dev: Re-align SCU4's hostname with upstream kernel
  mci: imx-esdhc-pbl: Fix watermark level value for i.MX
  Documentation: zii-vf610-dev: Fix bogus DDR configuration values

Clement Leger (2):
  elf: add 64 bits elf loading support
  mips: bootm: Cast elf entry into unsigned long

Cory Tusar (4):
  Documentation: zii-vf610-dev: Fix 'halt' in openocd configuration script
  ARM: dts: vf610-zii-cfu1: Fix indentation
  ARM: zii-vf610-dev: Use CTRL-C as autoboot abort
  Documentation: zii-imx7d-dev: Fix errors with openocd configuration script

DU HUANPENG (2):
  mtd: spi-nor: Add support for s25fl128s0 s25fl128s1 flashes from Linux
  fix compile error when set CONFIG_CONSOLE_SIMPLE=y

David Dgien (1):
  console: set default console_device devname

Ladislav Michl (1):
  startup: Fix typo in comment

Michael Tretter (2):
  libfile: fix typos
  clk: zynqmp: rename driver specific CLK_MUX_READ_ONLY

Oleksij Rempel (8):
  net: macb: init multiple dummy TX queues
  serial: atmel: set 

Re: [PATCH 4/5] ARM: stm32mp: dk2: add barebox SD-Card update handler

2019-10-15 Thread Ahmad Fatoum
On 10/15/19 9:59 AM, Sascha Hauer wrote:
> On Tue, Oct 15, 2019 at 08:58:23AM +0200, Ahmad Fatoum wrote:
>> Hello,
>>
>> On 10/14/19 2:51 PM, Sascha Hauer wrote:
>>> On Mon, Oct 14, 2019 at 08:39:21AM +0200, Ahmad Fatoum wrote:
 Now with the SD/MMC controller supported, lets add a bbu handler, so we
 can use it to update the second stage boot loader partition.

 Signed-off-by: Ahmad Fatoum 
 ---
  arch/arm/boards/stm32mp157c-dk2/board.c  | 14 ++
  arch/arm/mach-stm32mp/include/mach/bbu.h | 14 ++
  2 files changed, 28 insertions(+)
  create mode 100644 arch/arm/mach-stm32mp/include/mach/bbu.h

 diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c 
 b/arch/arm/boards/stm32mp157c-dk2/board.c
 index 9cb861af85d8..23eb6728b15a 100644
 --- a/arch/arm/boards/stm32mp157c-dk2/board.c
 +++ b/arch/arm/boards/stm32mp157c-dk2/board.c
 @@ -4,6 +4,7 @@
  #include 
  #include 
  #include 
 +#include 
  
  static int dk2_mem_init(void)
  {
 @@ -15,3 +16,16 @@ static int dk2_mem_init(void)
return 0;
  }
  mem_initcall(dk2_mem_init);
 +
 +static int dk2_postcore_init(void)
 +{
 +  if (!of_machine_is_compatible("st,stm32mp157c-dk2"))
 +  return 0;
 +
 +  stm32mp_bbu_mmc_register_handler("sd", "/dev/disk0.ssbl",
 +   BBU_HANDLER_FLAG_DEFAULT);
>>>
>>> You should create an alias in dt for the sd device node (might exist
>>> already, don't know) and use mci_of_parse_node() in the SD driver. With
>>> this you get consistent names. "disk0" will be different devices
>>> depending on probe order.
>>
>> Ah, ok. I'll resend when Oleksij resends his.
>> The first patch would be useful to have for other boards as well.
>> Could you apply it seperately?
> 
> I applied all other patches except this one. Environment on SD cards
> doesn't obviously work as long as the driver is not there, but that
> should be a reason to not apply this series, right?

Great, thanks
Ahmad

> 
> Sascha
> 


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[PATCH] fixup! ARM: at91: build for all SoCs when AT91_MULTI_BOARDS is selected

2019-10-15 Thread Ahmad Fatoum
This reverts a hunk I missed after a rebase:
A previous commit restricts ARCH_BAREBOX_MAX_BARE_INIT to only
non-multi-image boards, so no need to touch it to be compatible
with the new multi-image changes.

---
 arch/arm/mach-at91/Kconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index ef00e32e380d..5ad1f62c8d67 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -245,13 +245,13 @@ config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
hex
default 0x1000 if ARCH_AT91SAM9260
default 0x27000 if ARCH_AT91SAM9261
+   default 0x12000 if ARCH_AT91SAM9263
default 0x4000 if ARCH_AT91SAM9G20
default 0x3000 if ARCH_AT91SAM9G10
default 0xF000 if ARCH_AT91SAM9G45
+   default 0x6000 if ARCH_AT91SAM9X5
default 0x6000 if ARCH_AT91SAM9N12
-   default 0x12000 if SOC_AT91SAM9263
-   default 0x6000 if SOC_AT91SAM9X5
-   default 0x6000 if SOC_SAMA5D3
+   default 0x6000 if ARCH_SAMA5D3
default 0x
 
 if ARCH_AT91RM9200
-- 
2.23.0


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Re: [PATCH 4/5] ARM: stm32mp: dk2: add barebox SD-Card update handler

2019-10-15 Thread Sascha Hauer
On Tue, Oct 15, 2019 at 08:58:23AM +0200, Ahmad Fatoum wrote:
> Hello,
> 
> On 10/14/19 2:51 PM, Sascha Hauer wrote:
> > On Mon, Oct 14, 2019 at 08:39:21AM +0200, Ahmad Fatoum wrote:
> >> Now with the SD/MMC controller supported, lets add a bbu handler, so we
> >> can use it to update the second stage boot loader partition.
> >>
> >> Signed-off-by: Ahmad Fatoum 
> >> ---
> >>  arch/arm/boards/stm32mp157c-dk2/board.c  | 14 ++
> >>  arch/arm/mach-stm32mp/include/mach/bbu.h | 14 ++
> >>  2 files changed, 28 insertions(+)
> >>  create mode 100644 arch/arm/mach-stm32mp/include/mach/bbu.h
> >>
> >> diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c 
> >> b/arch/arm/boards/stm32mp157c-dk2/board.c
> >> index 9cb861af85d8..23eb6728b15a 100644
> >> --- a/arch/arm/boards/stm32mp157c-dk2/board.c
> >> +++ b/arch/arm/boards/stm32mp157c-dk2/board.c
> >> @@ -4,6 +4,7 @@
> >>  #include 
> >>  #include 
> >>  #include 
> >> +#include 
> >>  
> >>  static int dk2_mem_init(void)
> >>  {
> >> @@ -15,3 +16,16 @@ static int dk2_mem_init(void)
> >>return 0;
> >>  }
> >>  mem_initcall(dk2_mem_init);
> >> +
> >> +static int dk2_postcore_init(void)
> >> +{
> >> +  if (!of_machine_is_compatible("st,stm32mp157c-dk2"))
> >> +  return 0;
> >> +
> >> +  stm32mp_bbu_mmc_register_handler("sd", "/dev/disk0.ssbl",
> >> +   BBU_HANDLER_FLAG_DEFAULT);
> > 
> > You should create an alias in dt for the sd device node (might exist
> > already, don't know) and use mci_of_parse_node() in the SD driver. With
> > this you get consistent names. "disk0" will be different devices
> > depending on probe order.
> 
> Ah, ok. I'll resend when Oleksij resends his.
> The first patch would be useful to have for other boards as well.
> Could you apply it seperately?

I applied all other patches except this one. Environment on SD cards
doesn't obviously work as long as the driver is not there, but that
should be a reason to not apply this series, right?

Sascha

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[PATCH 4/5] rsa: Allow to directly compile in rsa public keys

2019-10-15 Thread Sascha Hauer
So far we relied on the U-Boot mkimage tool to generate us device tree
snippets containing rsa public keys which we then compiled into barebox.
Make this easier and allow to directly specify a filename or PKCS#11 URI
in Kconfig. With this we no longer need the U-Boot mkimage tool here and
no more external steps to prepare device tree snippets.

With this rsa public keys can be directly compiled as C structs into
barebox which is much more direct than putting it into the device tree.

Signed-off-by: Sascha Hauer 
---
 crypto/.gitignore |  2 ++
 crypto/Kconfig| 19 ++
 crypto/Makefile   | 10 ++
 crypto/rsa.c  | 33 +++
 include/asm-generic/barebox.lds.h |  6 ++
 include/rsa.h |  2 ++
 scripts/Makefile.lib  | 18 +
 7 files changed, 90 insertions(+)
 create mode 100644 crypto/.gitignore

diff --git a/crypto/.gitignore b/crypto/.gitignore
new file mode 100644
index 00..92d8af3cf4
--- /dev/null
+++ b/crypto/.gitignore
@@ -0,0 +1,2 @@
+rsa-keys.h
+rsa-keys.h.tmp
diff --git a/crypto/Kconfig b/crypto/Kconfig
index c06d3c054e..42b018b296 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -94,6 +94,25 @@ config CRYPTO_PBKDF2
 config CRYPTO_RSA
bool
 
+config CRYPTO_RSA_BUILTIN_KEYS
+   bool
+   default y if CRYPTO_RSA_KEYS != ""
+
+config CRYPTO_RSA_KEY
+   depends on CRYPTO_RSA
+   string "RSA key to compile in"
+   help
+ This option should be a filename of a PEM-formatted file containing
+ X.509 certificates to be included into barebox. If the string starts
+ with "pkcs11:" it is interpreted as a PKCS#11 URI rather than a file.
+
+config CRYPTO_RSA_KEY_NAME_HINT
+   depends on CRYPTO_RSA
+   string "FIT image key name hint"
+   help
+ In FIT images keys are identified by a key name hint string. Provide
+ the key name hint here.
+
 config CRYPTO_KEYSTORE
bool "Keystore"
help
diff --git a/crypto/Makefile b/crypto/Makefile
index d6fb74aad9..018f85e253 100644
--- a/crypto/Makefile
+++ b/crypto/Makefile
@@ -16,3 +16,13 @@ obj-$(CONFIG_DIGEST_SHA512_GENERIC)  += sha4.o
 obj-$(CONFIG_CRYPTO_PBKDF2)+= pbkdf2.o
 obj-$(CONFIG_CRYPTO_RSA)   += rsa.o
 obj-$(CONFIG_CRYPTO_KEYSTORE)  += keystore.o
+
+extra-y += rsa-keys.h
+
+ifdef CONFIG_CRYPTO_RSA_BUILTIN_KEYS
+
+$(obj)/rsa.o: $(obj)/rsa-keys.h
+$(eval $(call config_filename,CRYPTO_RSA_KEY))
+$(obj)/rsa-keys.h: FORCE
+   $(call 
cmd,rsa_keys,$(CONFIG_CRYPTO_RSA_KEY_NAME_HINT):$(CRYPTO_RSA_KEY_SRCPREFIX)$(CRYPTO_RSA_KEY_FILENAME))
+endif
diff --git a/crypto/rsa.c b/crypto/rsa.c
index 2e70c8127d..64241854c8 100644
--- a/crypto/rsa.c
+++ b/crypto/rsa.c
@@ -438,3 +438,36 @@ void rsa_key_free(struct rsa_public_key *key)
free(key->rr);
free(key);
 }
+
+#ifdef CONFIG_CRYPTO_RSA_BUILTIN_KEYS
+#include "rsa-keys.h"
+
+extern const struct rsa_public_key * const __rsa_keys_start;
+extern const struct rsa_public_key * const __rsa_keys_end;
+
+struct rsa_public_key *rsa_get_key(const char *name)
+{
+   const struct rsa_public_key *key;
+   struct rsa_public_key *new;
+   const struct rsa_public_key * const *iter;
+
+   for (iter = &__rsa_keys_start; iter != &__rsa_keys_end; iter++) {
+   key = *iter;
+   if (!strcmp(name, key->key_name_hint))
+   goto found;
+   }
+
+   return ERR_PTR(-ENOENT);
+found:
+   new = xmemdup(key, sizeof(*key));
+   new->modulus = xmemdup(key->modulus, key->len * sizeof(uint32_t));
+   new->rr = xmemdup(key->rr, key->len  * sizeof(uint32_t));
+
+   return new;
+}
+#else
+struct rsa_public_key *rsa_get_key(const char *name)
+{
+   return ERR_PTR(-ENOENT);
+}
+#endif
diff --git a/include/asm-generic/barebox.lds.h 
b/include/asm-generic/barebox.lds.h
index 8e8ae183db..b6ca8eb2be 100644
--- a/include/asm-generic/barebox.lds.h
+++ b/include/asm-generic/barebox.lds.h
@@ -98,6 +98,11 @@
 #define BAREBOX_PCI_FIXUP
 #endif
 
+#define BAREBOX_RSA_KEYS   \
+   __rsa_keys_start = .;   \
+   KEEP(*(.rsa_keys.rodata.*));\
+   __rsa_keys_end = .; \
+
 #define RO_DATA_SECTION\
BAREBOX_INITCALLS   \
BAREBOX_EXITCALLS   \
@@ -107,6 +112,7 @@
BAREBOX_MAGICVARS   \
BAREBOX_CLK_TABLE   \
BAREBOX_DTB \
+   BAREBOX_RSA_KEYS\
BAREBOX_PCI_FIXUP
 
 #if defined(CONFIG_ARCH_BAREBOX_MAX_BARE_INIT_SIZE) && \
diff --git a/include/rsa.h b/include/rsa.h
index cf2e6c7e08..803660d19a 100644
--- a/include/rsa.h
+++ b/include/rsa.h
@@ -28,6 +28,7 @@ struct rsa_public_key {
uint32_t *modulus;  /* modulus as 

[PATCH 1/5] Kbuild: Add config_filename macro from kernel

2019-10-15 Thread Sascha Hauer
The config_filename allows to extract a filename from a Kconfig string
option.

Signed-off-by: Sascha Hauer 
---
 scripts/Kbuild.include | 49 ++
 1 file changed, 49 insertions(+)

diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index a2dbbd8a00..c08b9a824d 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -268,6 +268,55 @@ why =  
  \
 echo-why = $(call escsq, $(strip $(why)))
 endif
 
+###
+#
+# When a Kconfig string contains a filename, it is suitable for
+# passing to shell commands. It is surrounded by double-quotes, and
+# any double-quotes or backslashes within it are escaped by
+# backslashes.
+#
+# This is no use for dependencies or $(wildcard). We need to strip the
+# surrounding quotes and the escaping from quotes and backslashes, and
+# we *do* need to escape any spaces in the string. So, for example:
+#
+# Usage: $(eval $(call config_filename,FOO))
+#
+# Defines FOO_FILENAME based on the contents of the CONFIG_FOO option,
+# transformed as described above to be suitable for use within the
+# makefile.
+#
+# Also, if the filename is a relative filename and exists in the source
+# tree but not the build tree, define FOO_SRCPREFIX as $(srctree)/ to
+# be prefixed to *both* command invocation and dependencies.
+#
+# Note: We also print the filenames in the quiet_cmd_foo text, and
+# perhaps ought to have a version specially escaped for that purpose.
+# But it's only cosmetic, and $(patsubst "%",%,$(CONFIG_FOO)) is good
+# enough.  It'll strip the quotes in the common case where there's no
+# space and it's a simple filename, and it'll retain the quotes when
+# there's a space. There are some esoteric cases in which it'll print
+# the wrong thing, but we don't really care. The actual dependencies
+# and commands *do* get it right, with various combinations of single
+# and double quotes, backslashes and spaces in the filenames.
+#
+###
+#
+define config_filename
+ifneq ($$(CONFIG_$(1)),"")
+$(1)_FILENAME := $$(subst \\,\,$$(subst \$$(quote),$$(quote),$$(subst 
$$(space_escape),\$$(space),$$(patsubst "%",%,$$(subst 
$$(space),$$(space_escape),$$(CONFIG_$(1)))
+ifneq ($$(patsubst /%,%,$$(firstword $$($(1)_FILENAME))),$$(firstword 
$$($(1)_FILENAME)))
+else
+ifeq ($$(wildcard $$($(1)_FILENAME)),)
+ifneq ($$(wildcard $$(srctree)/$$($(1)_FILENAME)),)
+$(1)_SRCPREFIX := $(srctree)/
+endif
+endif
+endif
+endif
+endef
+#
+###
+
 # delete partially updated (i.e. corrupted) files on error
 .DELETE_ON_ERROR:
 
-- 
2.23.0


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[PATCH 5/5] fit-image: Use compiled-in keys

2019-10-15 Thread Sascha Hauer
The compiled-in keys can be retrieved with rsa_get_key(). Try to use
them first before falling back to looking up the keys in the device
tree.

Signed-off-by: Sascha Hauer 
---
 common/image-fit.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/common/image-fit.c b/common/image-fit.c
index 71053fbef5..ca4d9ca10c 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -287,16 +287,21 @@ static int fit_check_rsa_signature(struct device_node 
*sig_node,
pr_err("key name not found in %s\n", sig_node->full_name);
return -EINVAL;
}
-   key_path = xasprintf("/signature/key-%s", key_name);
-   key_node = of_find_node_by_path(key_path);
-   if (!key_node) {
-   pr_info("failed to find key node %s\n", key_path);
+
+   key = rsa_get_key(key_name);
+   if (IS_ERR(key)) {
+   key_path = xasprintf("/signature/key-%s", key_name);
+   key_node = of_find_node_by_path(key_path);
+   if (!key_node) {
+   pr_info("failed to find key node %s\n", key_path);
+   free(key_path);
+   return -ENOENT;
+   }
free(key_path);
-   return -ENOENT;
+
+   key = rsa_of_read_key(key_node);
}
-   free(key_path);
 
-   key = rsa_of_read_key(key_node);
if (IS_ERR(key)) {
pr_info("failed to read key in %s\n", key_node->full_name);
return -ENOENT;
-- 
2.23.0


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[PATCH 3/5] rsa: let rsa_of_read_key() return a fully allocated key

2019-10-15 Thread Sascha Hauer
Until now rsa_of_read_key() took a pointer to a key and filled the
struct rsa_public_key members with allocated values. So far we have
never freed these values. Change rsa_of_read_key() to always return
a fully allocated key and provide rsa_key_free() to free it. Let the
FIT image code free the key after usage.

Signed-off-by: Sascha Hauer 
---
 common/image-fit.c | 10 ++
 crypto/rsa.c   | 26 ++
 include/rsa.h  |  3 ++-
 3 files changed, 30 insertions(+), 9 deletions(-)

diff --git a/common/image-fit.c b/common/image-fit.c
index 6ac4644686..71053fbef5 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -269,7 +269,7 @@ static struct digest *fit_alloc_digest(struct device_node 
*sig_node,
 static int fit_check_rsa_signature(struct device_node *sig_node,
   enum hash_algo algo, void *hash)
 {
-   struct rsa_public_key key = {};
+   struct rsa_public_key *key;
const char *key_name;
char *key_path;
struct device_node *key_node;
@@ -296,18 +296,20 @@ static int fit_check_rsa_signature(struct device_node 
*sig_node,
}
free(key_path);
 
-   ret = rsa_of_read_key(key_node, );
-   if (ret) {
+   key = rsa_of_read_key(key_node);
+   if (IS_ERR(key)) {
pr_info("failed to read key in %s\n", key_node->full_name);
return -ENOENT;
}
 
-   ret = rsa_verify(, sig_value, sig_len, hash, algo);
+   ret = rsa_verify(key, sig_value, sig_len, hash, algo);
if (ret)
pr_err("image signature BAD\n");
else
pr_info("image signature OK\n");
 
+   rsa_key_free(key);
+
return ret;
 }
 
diff --git a/crypto/rsa.c b/crypto/rsa.c
index 591d15c415..2e70c8127d 100644
--- a/crypto/rsa.c
+++ b/crypto/rsa.c
@@ -380,11 +380,15 @@ static void rsa_convert_big_endian(uint32_t *dst, const 
uint32_t *src, int len)
dst[i] = fdt32_to_cpu(src[len - 1 - i]);
 }
 
-int rsa_of_read_key(struct device_node *node, struct rsa_public_key *key)
+struct rsa_public_key *rsa_of_read_key(struct device_node *node)
 {
const void *modulus, *rr;
const uint64_t *public_exponent;
int length;
+   struct rsa_public_key *key;
+   int err;
+
+   key = xzalloc(sizeof(*key));
 
of_property_read_u32(node, "rsa,num-bits", >len);
of_property_read_u32(node, "rsa,n0-inverse", >n0inv);
@@ -400,14 +404,16 @@ int rsa_of_read_key(struct device_node *node, struct 
rsa_public_key *key)
 
if (!key->len || !modulus || !rr) {
debug("%s: Missing RSA key info", __func__);
-   return -EFAULT;
+   err = -EFAULT;
+   goto out;
}
 
/* Sanity check for stack size */
if (key->len > RSA_MAX_KEY_BITS || key->len < RSA_MIN_KEY_BITS) {
debug("RSA key bits %u outside allowed range %d..%d\n",
  key->len, RSA_MIN_KEY_BITS, RSA_MAX_KEY_BITS);
-   return -EFAULT;
+   err = -EFAULT;
+   goto out;
}
 
key->len /= sizeof(uint32_t) * 8;
@@ -418,5 +424,17 @@ int rsa_of_read_key(struct device_node *node, struct 
rsa_public_key *key)
rsa_convert_big_endian(key->modulus, modulus, key->len);
rsa_convert_big_endian(key->rr, rr, key->len);
 
-   return 0;
+   err = 0;
+out:
+   if (err)
+   free(key);
+
+   return err ? ERR_PTR(err) : key;
+}
+
+void rsa_key_free(struct rsa_public_key *key)
+{
+   free(key->modulus);
+   free(key->rr);
+   free(key);
 }
diff --git a/include/rsa.h b/include/rsa.h
index feb8c31200..cf2e6c7e08 100644
--- a/include/rsa.h
+++ b/include/rsa.h
@@ -49,6 +49,7 @@ int rsa_verify(const struct rsa_public_key *key, const 
uint8_t *sig,
 /* This is the maximum signature length that we support, in bits */
 #define RSA_MAX_SIG_BITS   4096
 
-int rsa_of_read_key(struct device_node *node, struct rsa_public_key *key);
+struct rsa_public_key *rsa_of_read_key(struct device_node *node);
+void rsa_key_free(struct rsa_public_key *key);
 
 #endif
-- 
2.23.0


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[PATCH 0/5] Allow to compile in rsa public keys directly

2019-10-15 Thread Sascha Hauer
So far we relied on U-Boots mkimage tool to generate dts snippets from
RSA public keys which are then compiled into barebox. This series
simplifies this by allowing to compile in RSA public keys directly into
barebox. Keys are retrieved from certificate files in PEM format or from
PKCS#11 URIs.

Sascha Hauer (5):
  Kbuild: Add config_filename macro from kernel
  scripts: Add rsatoc tool
  rsa: let rsa_of_read_key() return a fully allocated key
  rsa: Allow to directly compile in rsa public keys
  fit-image: Use compiled-in keys

 common/image-fit.c|  27 +-
 crypto/.gitignore |   2 +
 crypto/Kconfig|  19 ++
 crypto/Makefile   |  10 +
 crypto/rsa.c  |  59 +++-
 include/asm-generic/barebox.lds.h |   6 +
 include/rsa.h |   5 +-
 scripts/.gitignore|   1 +
 scripts/Kbuild.include|  49 
 scripts/Makefile  |   3 +
 scripts/Makefile.lib  |  18 ++
 scripts/rsatoc.c  | 445 ++
 12 files changed, 629 insertions(+), 15 deletions(-)
 create mode 100644 crypto/.gitignore
 create mode 100644 scripts/rsatoc.c

-- 
2.23.0


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Re: [PATCH 4/5] ARM: stm32mp: dk2: add barebox SD-Card update handler

2019-10-15 Thread Ahmad Fatoum
Hello,

On 10/14/19 2:51 PM, Sascha Hauer wrote:
> On Mon, Oct 14, 2019 at 08:39:21AM +0200, Ahmad Fatoum wrote:
>> Now with the SD/MMC controller supported, lets add a bbu handler, so we
>> can use it to update the second stage boot loader partition.
>>
>> Signed-off-by: Ahmad Fatoum 
>> ---
>>  arch/arm/boards/stm32mp157c-dk2/board.c  | 14 ++
>>  arch/arm/mach-stm32mp/include/mach/bbu.h | 14 ++
>>  2 files changed, 28 insertions(+)
>>  create mode 100644 arch/arm/mach-stm32mp/include/mach/bbu.h
>>
>> diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c 
>> b/arch/arm/boards/stm32mp157c-dk2/board.c
>> index 9cb861af85d8..23eb6728b15a 100644
>> --- a/arch/arm/boards/stm32mp157c-dk2/board.c
>> +++ b/arch/arm/boards/stm32mp157c-dk2/board.c
>> @@ -4,6 +4,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  
>>  static int dk2_mem_init(void)
>>  {
>> @@ -15,3 +16,16 @@ static int dk2_mem_init(void)
>>  return 0;
>>  }
>>  mem_initcall(dk2_mem_init);
>> +
>> +static int dk2_postcore_init(void)
>> +{
>> +if (!of_machine_is_compatible("st,stm32mp157c-dk2"))
>> +return 0;
>> +
>> +stm32mp_bbu_mmc_register_handler("sd", "/dev/disk0.ssbl",
>> + BBU_HANDLER_FLAG_DEFAULT);
> 
> You should create an alias in dt for the sd device node (might exist
> already, don't know) and use mci_of_parse_node() in the SD driver. With
> this you get consistent names. "disk0" will be different devices
> depending on probe order.

Ah, ok. I'll resend when Oleksij resends his.
The first patch would be useful to have for other boards as well.
Could you apply it seperately?

Thanks
Ahmad

> 
> Sascha
> 

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