[beagleboard] Using DMtimer pins to measure pulse width

2014-11-08 Thread robjsstewart
I'm trying to use the timer pins (gpio2[2...5]) to measure pulse with on a 
BBB with the 25 MHz clock. The pin mud mode is correctly set to 2 and pull 
up/down are disabled and capture mode is set on the timers. When I connect 
a push button attached to 3.3v to one of the four timer pins I correctly 
get capture interreupts on low to high and high to low transitions and I 
can measure the timer difference between them without issue. 

However, if I set up a signal generator for 50 Hz 3.3v square wave and 
attach it to a timer pin, I get no interrupts at all. Looking on a 'scope 
at the timer pin, the pulse train amplitude has drop from 3.3 volts to 
about 1.3v. Does anyone have any ideas on what would cause such a drop in 
amplitude?

Thanks for any suggestions.

Bob Stewart

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[beagleboard] Using DMTimer pins to measure pulse width.

2014-11-08 Thread robjsstewart
I'm trying to use the DMTimer pins (gpio2[2...5]) to measure pulse width 
using the 25MHz clock. I've successfully tested the software using a button 
connected to the 3.3v rail. The pinmux is set to mode 2 forcthose pins and 
pull up/down are disabled. The timers are set up in capture mode with 
interrupts enabled on the edge transitions. Using the button the interrupts 
occur and the time between the edges is derived from the captured timer 
values.

However, when I connect a signal generator outputting a 3.3v amplitude 
square wave at 50Hz to a timer pin, no interrupts occur. Looking on a 
'scope at the input to the timer pin the pulse train amplitude has dropped 
to about 1 volt. Can anyone suggest possible cause for this drop in 
amplitude?

Thanks for any suggestions.

Bob Stewart

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Re: [beagleboard] PWM Subsystem Time Base input clock frequency?

2014-02-03 Thread robjsstewart
On Friday, January 31, 2014 5:57:32 PM UTC-5, Charles Steinkuehler wrote:
 On 1/31/2014 12:38 PM, robjsstew...@gmail.com wrote:
 
  According to the TRM, the Time Base module on each of the PWM
 
  subsystems is clocked directly from the cpu clock. That is, its being
 
  clocked at a period of 1 nsec. 
 
 
 
 Where exactly are you seeing this?  Virtually nothing on the chip but
 
 the ARM cores and directly connected caches will be running at 1 GHz.
 
 
 
 I show the PWMSS to be clocked by the L4 interconnect clock (see section
 
 15.1.2.2) with a maximum functional clock frequency of 100 MHz (15.1.2.3).
 
 
 
 The L4_PER domain the PWM units are all connected to is for slow
 
 peripherals.  The L4_Fast domain used for the PRU is only 200 MHz, and
 
 I'd be surprised if you could configure the L4_PER clock to be over 100
 
 MHz (but I haven't crawled through all the clock routing and power
 
 management logic to prove this).
 
 
 
  It can be prescaled down to 1/128,for
 
  a period of 128 nsecs. The period and the counter compare registers
 
  are only 16 bits wide so the minimum PWM frequency is about 120 MHz.
 
  Is that correct?
 
 
 
 Take all your GHz numbers and divide by 10 for the actual 100 Mhz clock
 
 frequency.
 
 
 
 -- 
 
 Charles Steinkuehler
 
 char...@steinkuehler.net

Thanks for the reply, Charles. That makes sense.

Table 15-12 on page 2006 of the TRM refers to TBCLK being a prescaled version 
of SYSCLKOUT which is, later in that section, mentioned to be the cpu clock, or 
so I remembered.

Thanks very much.

Bob Stewart

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[beagleboard] PWM Subsystem Time Base input clock frequency?

2014-01-31 Thread robjsstewart
According to the TRM, the Time Base module on each of the PWM subsystems is 
clocked directly from the cpu clock. That is, its being clocked at a period of 
1 nsec. It can be prescaled down to 1/128,for a period of 128 nsecs. The period 
and the counter compare registers are only 16 bits wide so the minimum PWM 
frequency is about 120 MHz. Is that correct?

Bob Stewart

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[beagleboard] Re: PWM Subsystem Time Base input clock frequency?

2014-01-31 Thread robjsstewart
On Friday, January 31, 2014 1:38:32 PM UTC-5, robjss...@gmail.com wrote:
 According to the TRM, the Time Base module on each of the PWM subsystems is 
 clocked directly from the cpu clock. That is, its being clocked at a period 
 of 1 nsec. It can be prescaled down to 1/128,for a period of 128 nsecs. The 
 period and the counter compare registers are only 16 bits wide so the minimum 
 PWM frequency is about 120 MHz. Is that correct?
 
 Bob Stewart

sigh...thanks, you are correct. But, it is fast than I would have expected.

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[beagleboard] Re: PWM Subsystem Time Base input clock frequency?

2014-01-31 Thread robjsstewart
On Friday, January 31, 2014 1:48:09 PM UTC-5, Peter Baltus wrote:
 I guess I would argue that with 16 bits the counter can count up to 65535 and 
 wrap around after 65536 counts of 128ns max. That gives a max period of the 
 PWM of 8.39ms and a min frequency of 119Hz - I think. But it has been a long 
 day, so I might very well be very wrong ;-)
 
Peter

Sigh...you are correct! But it's still a higher frequency than I expected for 
the slowest PWM signal. I thought that the input clock might not be at the cpu 
frequency.
Thanks.

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Re: [beagleboard] Cortex-A8 version supported on the AM3358?

2013-11-16 Thread robjsstewart
Thanks.

Bob

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[beagleboard] Cortex-A8 version supported on the AM3358?

2013-11-15 Thread robjsstewart
I'm running the Genode OS on a BBB and am having issues with the MMU. What 
version of the Cortex-A8 processor is the BBB based on?  The current version is 
r3p2.

Thanks,

Bob Stewart

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