Re: [casper] Report of experience with KatADC
hi laura,Nimish From my own experience: - KatADC works fine with the Roach1 library platform (there is no glitches on my time domain data).I use an old ska-sa library(commited in june 2012). You need to make your KatADC glitch test under the Roach1 platform. the KATADC library issued under Roach1 is stable. It is better to qualify your KatADC with your Roach1. - KatADC doesn't works fine with the Roach2 library platform with the commit that I used in august 2013. The trouble comes from the second RF channel which is sometimes disable. The I2c register sometimes doesnt enable the second RF channel. and sometimes we need to try several times before seeing the 2nd channel enable. I used to see some spike also but I need to check again. During the casper 2013 workshop I explained it to Jason, and he told me that he will have a look in depth on it in few weeks. Thus an update of the KatADC under the Roach2 library is needed, may be it has been done. May be I'm wrong, and by the next week I'll have to check again what happens with the september2013 commit, and I'll let you know.. -From my design experience, I'll advice you to keep two development platform. one with the 11.4 xilinx + mtalab toolflow, and a new one with the 14.x xilinx + matlab toolflow. And also you need to keep your previous working library commited earlier. regards,
[casper] MUSIC ADC/DAC 4x interface
hi Glen I just copy/paste my early advices, it will help you,(you don't need to change your ucf file, do'nt change your timing constraint) . The currrent yellow block has been setup to work with a 400Mhz clock. If you want to use a lower clock rate you wil have to modify by hand(if you know VHDL) the adc2x14_400_interface.vhd file (its directory is explained below). Especially the DCM parameters ! you can justneed to modify the DCM phase shift parameters of your ADC yellow block sampling clock by modifying the line 345 (adc2x14_400_interface.vhd ) PHASE_SHIFT = 0, - you can set here the appropriate value: they are explained in the DCM_userguide.pdf of the virtex5, for example: if you set the value 32, it will sample your adc zdock data bus with a phase shift of 45 degree. try several value until you get rid of spike in your plot. for each value you need to generate a new boffile. once you get it, keep it for the rest of your future design. Of course if you change your adc sampling clock you will have to make sure that the adc data are still good. adc2x14_400_interface.vhd (if you are using the adc2x14_400 yellow block ) located in your casper xps library : /home/roach/mlib_git/mlib_devel/xps_base/XPS_ROACH_base/pcores/adc2x14_400_interface_v1_00_a/hdl/vhdl regards, I hope this trick will help also someone else. Guy,
Re: [casper] problems with adc2x400-14 (re-send with attachments)
hi Ryan, another solution for you(if you don't want to change your ucf file): you can just modify the DCM phase shift parameters of your ADC yellow block sampling clock by modifying the line 345 (adc2x14_400_interface.vhd ) PHASE_SHIFT = 0, - you can set here the appropriate value: they are explained in the DCM userguide of the virtex5, for example: if you set the value 32, it will sample your adc zdock data bus with a phase shift of 45 degree. try several value until you get rid of spike in your plot. for each value you need to generate a new boffile. once you get it, keep it for the rest of your future design. Of course if you change your adc sampling clock you will have to make sure that the adc data are still good. adc2x14_400_interface.vhd (if you are using the adc2x14_400 yellow block ) located in your casper xps library : /home/roach/mlib_git/mlib_devel/xps_base/XPS_ROACH_base/pcores/adc2x14_400_interface_v1_00_a/hdl/vhdl regards, I hope this trick will help also someone else.
Re: [casper] unable to load my boffiles and to configure my roach2
Hi Marc, thank you for answer. Now I have another question from my 1st email, I did'nt have an answer. it is about the process to generate a boffile compatible with roach2 and tcpborph3 using the 11.5 toolflow. I'd like to know if there is a trick , which can be used to generate a boffile with the current casper_astro_mlib or the old ska_sa_lib , which will be compatible with the roach2. regards, Roach2s which run tcpborphserver3 do not execute bof files, they use tcpborphserver3 to program the FPGA using a device file. So this is not an error. Use progdev to program the fpga, or if you wish to use the commandline ~ # kcpcmd progdev r2_tut1_2013_Mar_07_0837.bof regards marc
[casper] unable to load my boffiles and to configure my roach2
Good morning, I'm still trying to run properly the tut1 on my roach2. Alec,Andrew ,folowing your advises: http://www.mail-archive.com/casper@lists.berkeley.edu/msg03729.html we received our roach2 from digicom and we made the update for for the roach2_nfs_uboot, and we followed your advises: from ROACH2 Test machine set-up instructions: https://docs.google.com/a/ska.ac.za/documentd/1tqw4C6uZ6EULl1OykTFL_vQTnK52UBr0aYqTg44E5wg/edit ) we used the tftp server and we launched the latest romfs: https://github.com/ska-sa/roach2_nfs_uboot.git version used: commit c872c714e2 myRoach2 startup boot message : dmesg.txt with the zip files here: https://ftp.obs-nancay.fr/x3y8 now we run the telnet to check everything: telnet 192.168.0.2 7147 #version memcpy-14-g0f74f6b #build-state 2013-02-12T17:00:21 Then we tried to launch the tutorial1 : (here is my boffile, and my mdl file) ?listbof (to see my boffiles, it was possible to have the list of my boffiles, it was not possible with the previous romfs from the factory) Now I laucnhed my boffile: ?progdev roach2_tut1_2013_Mar_06_1343.bof and we get: ?progdev roach2_tut1_2013_Mar_06_1343.bof #log info 152278 raw attempting\_to\_program\_roach2_tut1_2013_Mar_06_1343.bof #log info 152365 raw attempting\_to\_program\_bitstream\_of\_19586188\_bytes\_to\_device\_/dev/roach/config #fpga loaded #log warn 153163 raw unsupported\_access\_mode\_0\_for\_register\_ #log error 153163 raw register\_called\_\_already\_defined #log error 153163 raw unable\_to\_load\_register\_mapping #log error 153163 raw unable\_to\_program\_bit\_stream\_from\_roach2_tut1_2013_Mar_06_1343.bof !progdev fail my roach2board led was blinking(flashing), and I'm unable to check the register name. ?listdev #log error 2155380 raw fpga\_not\_programmed !listdev fail Then I decided to go back and to try to load my boffile with the minicom tty usb2. my dmsg file is available here: in my boffile directory: /usr/bof # ./roach2_tut1_2013_Mar_06_1343.bof I have many words on my screen:(screenshot here) : not found ./roach2_tut1_2013_Mar_05_0951.bof: line 7: : not found ./roach2_tut1_2013_Mar_05_0951.bof: line 8: : not found ./roach2_tut1_2013_Mar_05_0951.bof: line 9: : not found ./roach2_tut1_2013_Mar_05_0951.bof: line 10: d: not found ./roach2_tut1_2013_Mar_05_0951.bof: line 11: l: not found ./roach2_tut1_2013_Mar_05_0951.bof: line 12: syntax error: unexpected ) Minicom2.3Minicom2.3 -sh: Minicom2.3Minicom2.3: not found [1]+ Done(2)./roach2_tut1_2013_Mar_06_1343.bof And now with ps aux there is no process runing with my boffile registers. But I can see my fpga led which blinking . And of course I can not have access to my tut1 registers. can you have a look on my roach2 design files, https://ftp.obs-nancay.fr/x3y8 i've used the latest library from: https://github.com/casper-astro/mlib_devel/ commit 0b3ed97607 I'm still using the 11.5 toolflow with centos, and matlab2008b. Alec or Andrew try to run my boffile on your roach2, and can you send me also your own boffile build on your pc with your ska-sa library,and I'll make the same test here. thank in advance,
[casper] unable to download with git clone
Hi all, I've tried several time to download the latest romfs: git clone https://github.com/ska-sa/roach2_nfs_uboot.git we got few kb. the file should be more than 300MB, we just get few kb. (and it is not the appropriate file that we have downloaded.) regards,
[casper] Roach2 configuration and setup
Hello, we received 2 roach2 boards from digicom (20th dec 2012).we managed to configure our minicom with centos6.2 final, and tty usb2. I've several questions about the advised version for the uboot and the tcborphserver3 u-boot versionof my boards: u-boot 2011.06-rc2-0-gd422dc0-dirty(Nov 8 2012 - :16:04:14) #SN : Roach2.2 batch = D#6#10 #kernel : Linux roach 02 06 0A 3.4.0 - rc3+ Tcpborphserver3 1/ a- how can I find the version of my romfs and also how can I find the version of my Tcpborphserver3 b- which version for the uboot and the tcborphserver3 should I use, should I keep the current version above ? where is it located? 2/ I heard that the configuration with the SD card is not yet working ? is it still the case ? 3/I want to load my boffiles, can I use ssh ? or should Iuse the telnet to tranfer my files ? How should I do If I want to keep my boffiles alive? I used to store them on the SD card, even when shutting down my roach board. Do I need to re-load or to copy my boffiles after switching on my roach2 boards? I read somewhere that it could be possible to upload from the python ?(I've never done it) How long does it take to the boffile to be copied ? before launching the fpgaprogdev() ? Thank you for your help,
[casper] how to enable the differential termination on the qsh gpio yellow block
hi there, I found the work around . I had to modify the casper library file roach_lib\xps_library\@xps_gpio\xps_gpio.m then i change the line 111. iostandard = 'LVDS_25 ; to 'LVDS_25 | DIFF_TERM = TRUE'; case 'ROACH' if use_diffio iostandard = 'LVDS_25 | DIFF_TERM = TRUE'; else Then you save the file. And now you go back on your mdl file and you make your design, and the bee_xps process will add the LVDS_25 | DIFF_TERM = TRUE in front of the choosen differential i/o of your ucf file called(system.ucf) located in your design directory. But you have to be careful when you modify a casper library. And, be sure that you want to work only on differential input signal. if not , you'll have to add a condition in xps_gpio.m in order to filter the case of input and output signal. I hope this will help. regards.
[casper] how to enable the differential termination on the qsh gpio yellow block
good afternoon, I would like to know if someone tried to enable the differential termination on the qsh gpio(on the roach1) with its yellow block interface ? In another word i'd like to set the diff_term attribute to true. what is the easiest way ? thks,
Re: [casper] casper Digest, Vol 39, Issue 21
hi, i'm not a linux expert. I've tried centOS but I had trouble, especially with python package. Then I tried with ubuntu and it was fine. my Linux Toolflow on 32 bit pc : Ubuntu 10.04.1 LTS tools used: matlab 2008b xilinx ise 11.1 (ise10.1 will probably works also) python 2.6.5 with the known roach package . you will need to follow the explanation ( http://casper.berkeley.edu/wiki/Linux_xps)
[casper] Roach QSH-DP connector pin number and roach ucf pinout name
Good morning, I'm planning to send data from an external board to the roach by using the QSH interface. Where can I find the QSH pin number with the roach fpga pinout connection name(or ucf) especially with differential signal name details. thanks in advance,
Re: [casper] MKID ADC : 14bits @ 400Mhz : yellow block missing ?
Hi Bruno, Mr Gabriel Auxepaules works with me, in our engineering lab in France. The board will be used by me. Digicom sent us an email saying that the board has been shipped friday afternoon.And according to the ups tracking number we will receive the board this week. regards, On Mon, Jan 17, 2011 at 12:19 AM, Bruno Serfass serf...@berkeley.eduwrote: Hi Rick, Guy, it should be trivial for us to update/add a yellow block for the ADC2x400-14bits. I don't mind taking care of it, however we would need to test it before checking in the new code in the git repository. The best would be to have such board at Berkeley so I can borrow it for a day. If not, I could eventually send the code directly to someone who has the board for testing. We could talk offline for details. Thanks, Bruno On Jan 16, 2011, at 1:20 PM, rick raffanti wrote: Hi Guy, To my knowledge, there has only been one such board ever built, and I just delivered it to Mo at Digicom for shipment to Gabrial Auxpalles in France. Is this your group? If so, it's your board, Serial Number 20. I tested it using another FPGA board (Mini Roach) and so didn't need a yellow block for it. Someone will need to extend the existing yellow block to 2 more bits of resolution; the LS bit pairs of the two extra bits are as follows: bitZDOK pair I1D15/16 I0A15/16 Q1 D7/8 Q0 A7/8 Rick On 1/16/2011 7:08 AM, Guy kenfack wrote: Hi Rick,Duan we have not yet received the board. digicom told us that the board will be sent to us in the next few weeks, probably before the end of this month. i'll let you know the description of the ADC board received. Guy regards, On Fri, Jan 14, 2011 at 5:35 PM, rick raffanti rik...@earthlink.netwrote: Hello Guy, Do you actually have the board? To my knowledge, nobody has extended the yellow block for the 14-bit version. Rick On 1/14/2011 7:08 AM, Guy kenfack wrote: Hi there, We ordered from digiCom an ADC board in October2010(ADC2x400-14 , dual 400 Msps). I started to have a look on BEE_XPS system blockset . I have been able to find also the MKID_ADC yellow block model, which is already configured for a 512Mhz-12bits ADC( ADC2x550-12 ) . I can't find the MKID ADC : 14bits @ 400Mhz : yellow block missing ? 1-/ What can I do , to get the (ADC2x400-14) yellow block? 2-/ I read the memo 33-34 from MKID ADC Test Report,(Rick Raffanti, July 28, 2009) : Does it means that the ( ADC2x550-12 ) and the (ADC2x400-14) has the same zdock pinout connection ? Therefore If it is the case how do you get the 2 MSB missing ?(14 bits) 3-/ Or do we have to modifiy the MKID_ADC yellow block ? to make it compatible with the appropriate 14 bits @ 400Mhz, according to the Roach ucf file? 4-/ Or my bee_xps system blockset need to be update for the latest blocksets ? (I made my last update in nov2010) regards,
Re: [casper] MKID ADC : 14bits @ 400Mhz : yellow block missing ?
Hi Rick,Duan we have not yet received the board. digicom told us that the board will be sent to us in the next few weeks, probably before the end of this month. i'll let you know the description of the ADC board received. Guy regards, On Fri, Jan 14, 2011 at 5:35 PM, rick raffanti rik...@earthlink.net wrote: Hello Guy, Do you actually have the board? To my knowledge, nobody has extended the yellow block for the 14-bit version. Rick On 1/14/2011 7:08 AM, Guy kenfack wrote: Hi there, We ordered from digiCom an ADC board in October2010(ADC2x400-14 , dual 400 Msps). I started to have a look on BEE_XPS system blockset . I have been able to find also the MKID_ADC yellow block model, which is already configured for a 512Mhz-12bits ADC( ADC2x550-12 ) . I can't find the MKID ADC : 14bits @ 400Mhz : yellow block missing ? 1-/ What can I do , to get the (ADC2x400-14) yellow block? 2-/ I read the memo 33-34 from MKID ADC Test Report,(Rick Raffanti, July 28, 2009) : Does it means that the ( ADC2x550-12 ) and the (ADC2x400-14) has the same zdock pinout connection ? Therefore If it is the case how do you get the 2 MSB missing ?(14 bits) 3-/ Or do we have to modifiy the MKID_ADC yellow block ? to make it compatible with the appropriate 14 bits @ 400Mhz, according to the Roach ucf file? 4-/ Or my bee_xps system blockset need to be update for the latest blocksets ? (I made my last update in nov2010) regards,
[casper] MKID ADC : 14bits @ 400Mhz : yellow block missing ?
Hi there, We ordered from digiCom an ADC board in October2010(ADC2x400-14 , dual 400 Msps). I started to have a look on BEE_XPS system blockset . I have been able to find also the MKID_ADC yellow block model, which is already configured for a 512Mhz-12bits ADC( ADC2x550-12 ) . I can't find the MKID ADC : 14bits @ 400Mhz : yellow block missing ? 1-/ What can I do , to get the (ADC2x400-14) yellow block? 2-/ I read the memo 33-34 from MKID ADC Test Report,(Rick Raffanti, July 28, 2009) : Does it means that the ( ADC2x550-12 ) and the (ADC2x400-14) has the same zdock pinout connection ? Therefore If it is the case how do you get the 2 MSB missing ?(14 bits) 3-/ Or do we have to modifiy the MKID_ADC yellow block ? to make it compatible with the appropriate 14 bits @ 400Mhz, according to the Roach ucf file? 4-/ Or my bee_xps system blockset need to be update for the latest blocksets ? (I made my last update in nov2010) regards,
Re: [casper] Tut2 : Unable to transmit and receive Data from 10Gbe
Hi , -finally, we managed to run 'tgtap' manually we added 'x' with chmod 'a+x', and we launched again the tut2 python script and it works now. - But sometimes when lauching tut2 with the boffile specified in the python script, we have an error after the bistream loading step(message: no cable connected on 'port0'. ), we use your trick as you said few weeks ago. where we need to clear and to load manually the '.bof' through ipython, before launching tut2.py(as we put in comment the bof file ) in order to have a sucessfull design working without saying that there is no cable connected on 'port0'. it occurs sometimes and that is the workaround that we found. we will have to look in depth(or investigate) another day... thanks, (the case can be closed) the screen report = Connecting to server roach... ok ok --- Port 0 linkup: True Port 3 linkup: True --- Configuring receiver core... done Configuring transmitter core... done --- Setting-up packet source... done Setting-up destination addresses... done Resetting cores and counters... done === 10GbE Transmitter core details: === Note that for some IP address values, only the lower 8 bits are valid! GBE0 Configuration... My MAC: 02 02 0A 00 00 14 Gateway:0 0 0 20 This IP: 10 0 0 20 Gateware Port: 6 Fabric interface is currently: Enabled XAUI Status: 007E lane sync 0: 1 lane sync 1: 1 lane sync 2: 1 lane sync 3: 1 Channel bond: 1 XAUI PHY config: RX_eq_mix: 4 RX_eq_pol: 0 TX_pre-emph: 0 TX_diff_ctrl: 0 ARP Table: On Tue, Sep 28, 2010 at 3:19 PM, Jason Manley jasonman...@gmail.comwrote: ok, so your problem is that tgtap isn't starting. dmesg might provide some clue. Also check ifconfig that there's no existing nic device with that same name. You can also try'n run tgtap manually from the command line during debugging and see what errors it gives. If all else fails, try rebooting your ROACH board so that you start from a known state. This really shouldn't be necessary though. Jason
[casper] Tut2 : Unable to transmit and receive Data from 10Gbe
Good morning, few days ago, Jason helped us to run tut2. Then we tried again this week to go back in depth in the Tut2 design(10GbE). We tried to run the same python script(with the same boffile) and we got strange results: - Specially we were not able to display the RX counter on the screen.(we are able to display only the TX counter) -TX buffer always overflow - There is no data send to RX(RX array is always empty) - From the screen report it seems that the 10GbE is always disable !! the 10GbE parameters( mac, ip, port) from the 'tut2.py' seems to have not been taken in acount trough the configuration registers ! - We decided to save the output screen for both case: 'tut2.py roach -a' and 'tut2.py roach -p' . the report are displayed below. thanks in advance, output screen report:'tut2.py roach -a' == Note that for some IP address values, only the lower 8 bits are valid! GBE0 Configuration... My MAC: 12 34 56 78 00 00 Gateway:0 0 0 1 This IP: 192 168 5 20 Gateware Port: 1 Fabric interface is currently: Disabled XAUI Status: 007E lane sync 0: 1 lane sync 1: 1 lane sync 2: 1 lane sync 3: 1 Channel bond: 1 XAUI PHY config: RX_eq_mix: 4 RX_eq_pol: 0 TX_pre-emph: 0 TX_diff_ctrl: 0 ARP Table: IP: 192.168. 5. 0: MAC: FF FF FF FF FF FF IP: 192.168. 5. 1: MAC: FF FF FF FF FF FF IP: 192.168. 5. 2: MAC: FF FF FF FF FF FF IP: 192.168. 5. 3: MAC: FF FF FF FF FF FF . . . . . IP: 192.168. 5.244: MAC: FF FF FF FF FF FF IP: 192.168. 5.245: MAC: FF FF FF FF FF FF IP: 192.168. 5.246: MAC: FF FF FF FF FF FF IP: 192.168. 5.247: MAC: FF FF FF FF FF FF IP: 192.168. 5.248: MAC: FF FF FF FF FF FF IP: 192.168. 5.249: MAC: FF FF FF FF FF FF IP: 192.168. 5.250: MAC: FF FF FF FF FF FF IP: 192.168. 5.251: MAC: FF FF FF FF FF FF IP: 192.168. 5.252: MAC: FF FF FF FF FF FF IP: 192.168. 5.253: MAC: FF FF FF FF FF FF IP: 192.168. 5.254: MAC: FF FF FF FF FF FF IP: 192.168. 5.255: MAC: FF FF FF FF FF FF Sent 25037 packets already. Received 0 packets already. Triggering snap captures... done Enabling output... done ERR: Not receiving anything. Reading 2048 values from bram snap_gbe0_tx_bram_msb... ok Reading 2048 values from bram snap_gbe0_tx_bram_lsb... ok Reading 2048 values from bram snap_gbe0_tx_bram_oob... ok Reading 1 values from bram snap_gbe3_rx_bram_msb... ok Reading 1 values from bram snap_gbe3_rx_bram_lsb... ok Reading 1 values from bram snap_gbe3_rx_bram_oob... ok Unpacking TX packet stream... [ 0]: data: 5A2B9781 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [ 1]: data: 5A2B9782 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [ 2]: data: 5A2B9783 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [ 3]: data: 5A2B9784 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [ 4]: data: 5A2B9785 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [ 5]: data: 5A2B9786 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up . . . . [2038]: data: 5A2B9F77 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2039]: data: 5A2B9F78 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2040]: data: 5A2B9F79 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2041]: data: 5A2B9F7A IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2042]: data: 5A2B9F7B IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2043]: data: 5A2B9F7C IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2044]: data: 5A2B9F7D IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2045]: data: 5A2B9F7E IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2046]: data: 5A2B9F7F IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [2047]: data: 5A2B9F80 IP: 10. 0. 0. 30 [TX overflow] [TX almost full] [Link up] [eof] Unpacking RX packet stream... [ 0]: data:0 IP: 0.0.0.0 == output screen report:'tut2.py roach -p' === Connecting to server roach... ok ok --- Port 0 linkup: True Port 3 linkup: True --- Configuring receiver core... done Configuring transmitter core... done --- Setting-up packet source... done Setting-up destination addresses... done Resetting cores and counters... done Sent 24494 packets already. Received 0 packets already. Triggering snap captures... done Enabling output... done ERR: Not receiving anything. Reading 2048 values from bram snap_gbe0_tx_bram_msb... ok Reading 2048 values from bram
Re: [casper] bee_xps : unable to compile tut2 under centos 5.5
Hi , the case can be closed. - I've got the Xaui license for the my linux machine from xilinx license account. I've added to my license manager, and I've compile the tut2. Now bee_xps run well. thanks for your help,
