Re: Image de-warping tool, and Multics/GCOS panels

[Steve Malikoff via cctalk]

Noeal asked:
> I'm having an issue with the images, though: taking a picture of a flat,
> rectangular panel with a camera usually produces distortion (even with the
> lens set to the narrowest angle possible).
>
> Does anyone know of any freeware which will fix this? The image tool I
> normally use (ImagePals, sort of a poor man's Photoshop) does have a 'warp'
> function, but it requires setting up a grid of points, and is a pain to use:
> optimal would be something where you mark the 4 corners, and few intermediate
> edge points, and the image is automagically fixed.


You could do it "by eye" in Photoshop and GIMP-type tools, but I believe a far 
better and more adjustable
way is to use an operation in imagemagick called affine transformation. With 
this you can tweak the
result programmatically to the nearest pixel-to-millimetre value to get the 
best result.

For instance I have done an analogous task in which I removed perspective from 
black and white images
of a WWII vehicle onto a flat elevation, so that accurate markings and 
camouflage patterns or precise
positions of fittings can be obtained, by only knowing the basic perimeter 
edges.

To do this, I firstly need an accurate measurement of the side of the vehicle. 
Its exact length, height
will do. This is easily obtained from scale modelling information. In your 
particular case, I think only
the width and height of the panel would be needed, OR the two expressed as a 
ratio and scaled later.


WORKED EXAMPLE:
Let's take for example an IBM System/360-40 console. It is comprised of a few 
individual panels but they
are arranged in two larger rectangles, joined along one ege, but with an angle 
of about 163 degrees between
them. The upper panel's flat measurements are 711mm wide and 477mm long.
The lower panel is 71mm wide by 199mm high, as flat.

Say I then found any sufficiently detailed photo of a /40 console, and wanted 
to map the surface of that
to my known panel edge measurements. The photo is of course taken from any 
arbitrary angle.
I will use this one, 1200x953 pixels, presenting a common three-quarter side 
view, taken fron the left:

https://upload.wikimedia.org/wikipedia/commons/thumb/e/e7/IBM_System_360_at_USDA.jpg/1200px-IBM_System_360_at_USDA.jpg

The angled panels also show in the photo but that will be removed. Save the 
image locally.

I tend to start at the pixel that is the top right corner. The image editor 
places the origin at the top left corner.
Essentially the corners of the console rectangle in the photo - taking the 
upper panel only, for this example -
need to be stretched to my known rectangle of TR=(711,0) to BR= (711,477) to 
BL=(0,477) to TL=(0,0).
The rectangular polygon will automatically be closed back to the start. I'm 
using mm but you could use any
measurement unit you like.

Next, load the above photo of the console in any good-enough image editor. I 
use the free Paint.NET for this
purpose and I absolutely love it. Move around the photo, zoom in etc. and place 
the mouse cursor exactly
on the top right corner and take a note of the pixel coordinate shown in the 
lower right of the app. I make it
to be (675,141) on that particular photo.

Then do the same for the bottom right, bottom left, top left corner pixels. 
Remember this is the top panel only,
the lower is done in the same fashion seperately. These are done in the same 
point-to-point sequence as the
known measurements, and must be the same number of coordinates. It does not 
have to be a rectangle, you
may have five, six or more coordinates for a say a vehicle or spaceship scale 
elevation.
So directly off the photo:
675,141 TR
646,315 BR
442,336 BL
458,129 TL

Now, assuming Imagemagick is installed, all we need to is tell it to stretch 
those coordinates to our
known actual square coordinates by pairing them, pixel-to-known coordinate. On 
the command line, or in
a text file enter and paste into the shell (I use git bash on Windows):

convert 1200px-IBM_System_360_at_USDA.jpg -virtual-pixel black -distort 
Perspective "675,141 711,0   646,315 711,477   442,336 0,477   458,129 0,0"  
Model40_upper_panel_transformed_true_flat1.jpg

Now the required de-perspective image will be in 
Model40_upper_panel_transformed_true_flat.jpg

If you don't want to go through the above steps yourself you can see the result 
at

http://web.aanet.com.au/~malikoff/ibm/Model40_upper_panel_transformed_true_flat1.jpg

Then use the image editor rubber banding to select the required amount of this 
true flattened image, now using
the original actual measurements as the pixel coordinates for cropping. eg. TR 
edge is pixel (711,0) etc.

If the simple Perspective operation doesn't gove you a good result, try some 
other Imagemagick operations eg:
convert 1200px-IBM_System_360_at_USDA.jpg -virtual-pixel black -interpolate 
Spline -distort BilinearForward "675,141 711,0   646,315 711,477   442,336 
0,477   458,129 0,0"  

Vintage Computer Calendar 2018

[Syd Bolton via cctalk]

Hey folks;
The Personal Computer Museum (http://www.pcmuseum.ca) is
offering a beautiful 2018 vintage computer calendar as a fundraiser. The
calendars are in hand and the cost is $20 Canadian (no tax).
The
shipping rates (in CAD) are $3.50 within Canada, $5.00 to the U.S. and
$10.50 to the rest of the world.
We accept Paypal via our website at
http://www.pcmuseum.ca/shop.asp
If you don't like Paypal, e-mail me
directly for other options!

The order page includes a sample of what it
looks like.
The computers included this year are:

IBM PC (1981), Kaypro
II (1982), Pencil II (1984), Exidy Sorcerer (1978), Commodore PET 4032
(1980), Apple ][+ (1979), Apple PowerBook 150 (1994),
Commodore 64
(1982), NeXTcube (1980), Superbrain QD (1979), Atari 800 (1979), Unisys
ICON (1986)

If you are interested please reply here or to
i...@pcmuseum.ca  The quantities are limited.

Thanks for your
support! 

 

Re: Which Dec Emulation is the MOST useful and Versatile?

[Chuck Guzis via cctalk]

On 10/27/2017 04:55 PM, Mike Stein via cctalk wrote:

> Or Burroughs' core counters (think I still have some somewhere):
> 
> https://www.google.com/patents/US3438014
> 
> http://www.freepatentsonline.com/2995663.html

We forget about all of the alternative ways of implementing digital
logic.  At one time, magnetic core logic was viewed as being much more
reliable than either tube or transistor logic, although not as fast.

Probably better hardened to radiation, as well.

In some respects, core logic reminds me somewhat of the McCulloch-Pitts
TLU model described in Minsky's book on Computation:

http://www.i-programmer.info/babbages-bag/325-mcculloch-pitts-neural-networks.html

--Chuck

Re: Image de-warping tool, and Multics/GCOS panels

[Charles Anthony via cctalk]

On Fri, Oct 27, 2017 at 8:30 AM, Noel Chiappa via cctalk <
cctalk@classiccmp.org> wrote:

>
>
> Does anyone know of any freeware which will fix this? The image tool I
> normally use (ImagePals, sort of a poor man's Photoshop) does have a 'warp'
> function, but it requires setting up a grid of points, and is a pain to
> use:
> optimal would be something where you mark the 4 corners, and few
> intermediate
> edge points, and the image is automagically fixed.
>

I use gimp to to this; the UI is not intuitive but I was able to work it
out through experimentation.

-- Charles

Re: Which Dec Emulation is the MOST useful and Versatile?

[Mike Stein via cctalk]

- Original Message - 
From: "Chuck Guzis via cctalk" 
To: 
Sent: Friday, October 27, 2017 5:05 PM
Subject: Re: Which Dec Emulation is the MOST useful and Versatile?


> On 10/27/2017 01:39 PM, Al Kossow via cctalk wrote:
>> 
>> 
>> On 10/27/17 12:57 PM, Paul Koning wrote:
>> 
>>> That doesn't sound even close.
>> 
>> http://www.ussc90.nl/circ.htm
>> 
>> 
>> Ferractors.
>> 
> 
> Can't forget Parametrons:
> 
> https://www.thocp.net/hardware/parametron.htm
> 
> http://museum.ipsj.or.jp/en/heritage/NEAC-1101.html
> 
> --Chuck
>

Or Burroughs' core counters (think I still have some somewhere):

https://www.google.com/patents/US3438014

http://www.freepatentsonline.com/2995663.html

m

Re: Which Dec Emulation is the MOST useful and Versatile?

[ben via cctalk]

On 10/27/2017 9:27 AM, Jay Jaeger via cctech wrote:


With respect to your #5, I have some direct experience with that, and am
working on a tricky project to implement the IBM 1410 in a FPGA at the
gate level, based on the SMS Automated Logic Diagrams (ALD's).   What I
have found so far is that a rule or two can be used to deal with the
speed and design technology differences.  I don't think that the issues
pointed out make it "hard", really.  The hard part, to me, is
deciphering the original design from drawings or other incomplete
engineering information.  ;)  The rules I have developed so far:

a.  If the original implementation uses cross-connected gates (or
 transistors), the FPGA model can follow those with a synchronous D
 flip flop.  It usually works because the clock times are often 10
 or more times faster or more than the original machine clock.  I
 have successfully used this technique to implement an original
 design that was not all that great (see "b." below for details) that
 actually had some race conditions in the original design.

 The information on this project can be found at:

 https://drive.google.com/open?id=0B2v4WRwISEQRcFpNM0o2VDJiWFk

b.  I did not come across delays in the one project I completed
 this way (a re-implementation of a design done for a class in
 college in 1973), but my next project will, and my plan is to use a
 counter (or, I suppose, a small number of cascaded D flip flops
 acting as a bucket brigade) in cases where that delay is needed for
 the implementation to work properly.  (In cases where the delay
 exists only to match propagation times along different wire/cable
 lengths in the original implementation, one might be able to turn
 the delay into a wire).

JRJ


With some FPGA venders you could get a TTL library components,
so you could input older designs. You may have to dig around for them
because that is not a NEW selling feature any more. Also logic
cells don't have asynchronous  set and clear anymore.

Ben.

PDP8.org

[Marc Howard via cctalk]

Is anyone re-hosting pdp8.org yet?

Marc

RE: Which Dec Emulation is the MOST useful and Versatile?

[Dave Wade via cctalk]

> -Original Message-
> From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Chuck
> Guzis via cctalk
> Sent: 27 October 2017 22:06
> To: cctalk@classiccmp.org
> Subject: Re: Which Dec Emulation is the MOST useful and Versatile?
> 
> On 10/27/2017 01:39 PM, Al Kossow via cctalk wrote:
> >
> >
> > On 10/27/17 12:57 PM, Paul Koning wrote:
> >
> >> That doesn't sound even close.
> >
> > http://www.ussc90.nl/circ.htm
> >
> >
> > Ferractors.
> >
> 
> Can't forget Parametrons:
> 
> https://www.thocp.net/hardware/parametron.htm
> 
> http://museum.ipsj.or.jp/en/heritage/NEAC-1101.html
> 
> --Chuck


The Elliot 803 used ferrite transformers as logic elements


https://en.wikipedia.org/wiki/Elliott_803

Dave

Re: Which Dec Emulation is the MOST useful and Versatile?

[Jay Jaeger via cctalk]

On 10/27/2017 3:54 AM, Dave Wade via cctech wrote:
> Kip,
>  I think "emulation" and "simulation" get used pretty much interchangeable.
> SIMH is touted a simulator, Hercules/390 as an emulator yet they are both
> programs that provide a "bare metal" machine via software on which an
> operating system can be installed. Neither make any attempt to reproduce the
> speed of the original CPU.
> 
> I am going to stick with "emulator" as I think of "simulation" as process
> whereby we can model some statistical or mathematical parameters e.g. how
> long the queues are in a supermarket, what time is high tide in Boston using
> only mathematics. Note this may involve a general purpose computer, or it
> may use specialist machines such as the Doodson-Lege Tidal Predictor 
> 
> http://www.ntslf.org/about-tides/doodson-machine
> 
> So to return to emulating other computers have at least  five different
> flavours...
> 
> 1. Functional Software Emulation where we match the functions but not the
> speed of operation using a program. SIMH and Hercules are such beasts
> For much work this is fine. Most software emulators take this approach.
> 
> 2. Cycle accurate Software Emulation/Simulation where we attempt to match
> both function and speed of the underlying hardware. This may be necessary
> for software which uses software loops to control say the speed of a UART. I
> If you want to use the simulator for historical research this may help. Some
> emulators can be switched to this mode when software needs it...
> 
> David Sharp's SSEM/Baby simulator is such a beast.
> http://www.davidsharp.com/baby/
> 
> 3. Behavioural  Hardware Emulation
> This is where we build a hardware implementation of a machine, but do not
> attempt to duplicate the exact detail of the logic or its speed of
> operation. Richard Stofer's IBM1130 in VHDL is such a project. 
> He doesn't have it available on the Web (I have a copy and have run it)
> There is a Flash video on the IBM1130.org site
> 
> 4. Cycle Accurate Behavioural Hardware Emulation 
> This is probably the most common approach to cycle accurate emulations.
> Because FPGA's typically run several times faster than the clock on legacy
> hardware, and they may contain high level function blocks, e.g. multipliers
> its often "relatively easy" to match the instruction times of a legacy CPU
> in an FPGA. 
> 
> My BabyBaby FPGA implementation of the SSEM FPGA is such a beast. It runs at
> the same speed as replica SSEM in MSI Manchester but internally it's a
> parallel implementation whereas the real Baby is a serial machine.
> https://hackaday.com/2016/01/06/babybaby-a-1948-computer-on-an-fpga/
> 
> 5. Gate Level Hardware Emulation
> It gate level hardware emulation we try and re-implement the hardware down
> to the logic gate level. This is hard because FPGA's are may not be designed
> to work this way, and gate level design will also have some dependencies on
> propagation delays, which on an FPGA will be much smaller than on any real
> hardware. A couple of examples of these are 
> 
> Laurence Wilkinson's IBM 360/30 http://www.ljw.me.uk/ibm360/
> Carl Claunch's IBM 1130 http://ibm1130.blogspot.co.uk/
> 
> I hope this doesn't muddy the water too much...
> Dave
>   

Well, the waters are sufficiently muddy that I figured little harm would
be dine if I throw my weeds in too...   ;)

I like that you have clearly given this some thought, and have developed
a kind of taxonomy, so your comments are valuable because they are not
just off-the cuff.

Looking online at Merriam-Webster, the conclusion one might reach is
that these are all simulators.  But emulation is also a term of art when
it comes to computers, so I don't think we should shackle ourselves to M-W.

I have generally used the term emulator for software that attempts to
provide some level of functionality (up to 100%) of the original machine
such that software (including operating systems) will operate, without
worrying about HOW that is done.  So, I would throw most, if not all, of
the SimH programs, and Hercules as well into that pot.  I would also put
the IBM 1401 and 1410 emulators that appeared on early model IBM
System/360 machines (which was done using software with microcode
assist) into that same bag, as well as the FLEX implementation of the
IBM mainframe architectures.  So, I am on the same page with you with
regards to #1.

I have generally used the term simulator for software that attempts to
replicate the actual operation of the original machine, regardless of
speed - I view speed as just one of several possible measures of the
accuracy/level of the simulation.  I have written an IBM 1410 simulator
that simulates the operation of the original machine at the machine
cycle level, based on the IBM CE instructional materials - but it pays
no attention at all to the absolute cycle time, only to the relative
cycle time (so that peripherals, such as tape drives, work in about the
same relative speed to the CPU as the 

Re: Which Dec Emulation is the MOST useful and Versatile?

[Al Kossow via cctalk]

On 10/27/17 2:00 PM, Phil Blundell via cctalk wrote:

> On the subject of NMOS dynamic logic, someone recently pointed out a
> paragraph in the technical manual for a 1990s ARM2-based computer which
> warned of dire consequences, including possibly destruction of the
> chipset, if the circuitry was left powered with the clock stopped for
> more than a second or two.
>

https://en.wikichip.org/wiki/acorn/microarchitectures/arm2

ARM2 chips were manufactured by VLSI Technology and Sanyo on a 2 µm 
double-level metal CMOS process.

Re: Which Dec Emulation is the MOST useful and Versatile?

[Chuck Guzis via cctalk]

On 10/27/2017 01:39 PM, Al Kossow via cctalk wrote:
> 
> 
> On 10/27/17 12:57 PM, Paul Koning wrote:
> 
>> That doesn't sound even close.
> 
> http://www.ussc90.nl/circ.htm
> 
> 
> Ferractors.
> 

Can't forget Parametrons:

https://www.thocp.net/hardware/parametron.htm

http://museum.ipsj.or.jp/en/heritage/NEAC-1101.html

--Chuck

Re: Which Dec Emulation is the MOST useful and Versatile?

[ben via cctalk]

On 10/27/2017 1:06 PM, Paul Koning wrote:


True if you have a TTL machine.  6600 is discrete transistor, and the actual 
transistor specs are nowhere to be found as far as I have been able to tell.


Well if you can find one loose, you could allways measure it.


But that doesn't directly relate to gate level emulation.  If you have gate 
level documentation you can of course build a copy of the machine out of actual 
gate-type parts, like 7400 chips.  Or you can write a gate level model in VHDL, 
which is not the most popular form but certainly perfectly straightforward.  
Either way, though, you have to start with a document that shows what the gates 
are in the original and how they connect.  And to get it to work, you need to 
deal with timing issues and logic abuse, if present.  In the 6600, both are 
very present and very critical.  For example, I've been debugging a section 
(the central processor branch logic) where the behavior changes quite 
substantially depending on whether you favor S or R in an R/S flop, i.e., if 
both are asserted at the same time, who wins?  And the circuit and wire delays 
matter, down to the few-nanosecond level.


You need to find a lucky man, for help. You stand here, and look that 
way. Yes it works.






Most machines are not so crazy; I would assume a PDP-11/20 gate level model 
would be quite painless.

paul


I still have not figured out VHDL yet. Logic that I can figure out, but 
how you use the the stupid
logic blocks I can not with all the stupid type defines. What I need is 
real reference book, not a DUMMYS GUIDE TO BLA-BLA-BLA.


For my own hobby stuff I am useing WINCPUL and ALTERA's AHDL. There a D 
F/F is D flip flop.

Ben.

Re: Which Dec Emulation is the MOST useful and Versatile?

[Phil Blundell via cctalk]

On Fri, 2017-10-27 at 13:38 -0700, Brent Hilpert via cctalk wrote:
> I wonder if they were just trying to draw an analogy between the
> inherent dynamic operation requirements of magnetic logic and the
> dynamic operation requirements of some (many?) NMOS designs (not
> really inherent to NMOS).

On the subject of NMOS dynamic logic, someone recently pointed out a
paragraph in the technical manual for a 1990s ARM2-based computer which
warned of dire consequences, including possibly destruction of the
chipset, if the circuitry was left powered with the clock stopped for
more than a second or two.

Obviously if the clock is stopped for more than a few hundred
microseconds then the logic will start to lose its marbles and the
system will need a reset to recover.  But I don't think I've previously
heard any suggestion that dynamic logic ICs would actually be damaged
or destroyed under these circumstances.  I can just about imagine that
there might be some situation where an invalid internal state would
result in a short circuit between power and ground, but that's just
supposition really.  Anybody know of a case where something bad has
actually happened?

p.

Re: Which Dec Emulation is the MOST useful and Versatile?

[Chuck Guzis via cctalk]

On 10/27/2017 01:01 PM, Paul Koning wrote:

> Oh yes, and if you look at the wire lists (on Bitsavers) you will get the 
> length of every wire in the machine.  The trouble is that, even if you use 
> the documented delay per foot, things don't necessarily match.  The stated 
> logic stage delay is 5 ns, no special numbers given for twisted pair drivers. 
>  In my model, I do everything in 5 ns multiples (to keep the simulation time 
> under control).  That works pretty closely, but not 100 percent, not for some 
> of the CPU pieces.  The other thing that's nuts is that the CPU effectively 
> has a 20-phase clock: the documentation shows clock signals with offsets from 
> the reference time given in multiples of 5 nanoseconds (for the 100 ns clock 
> period).  And yes, it matters.  And yes, many (I'm not sure about all) of the 
> 20 phases are actually used in the CPU.

I can't recall, but didn't the 6600 have something like 10 clock
sources, all kept synchronized?

In any case, it's a gross oversimplification to say that the 6600 had a
10 MHz clock.


--Chuck

Re: Which Dec Emulation is the MOST useful and Versatile?

[Al Kossow via cctalk]

On 10/27/17 1:38 PM, Brent Hilpert via cctalk wrote:

> I wonder if they were just trying to draw an analogy between the inherent 
> dynamic operation requirements of magnetic logic and the dynamic operation 
> requirements of some (many?) NMOS designs (not really inherent to NMOS).

this was a long time ago, and it probably was comparing it to multiphase MOS 
clocking
this came from Mike Albaugh, who had a SS90 at one point.

Re: Which Dec Emulation is the MOST useful and Versatile?

[Brent Hilpert via cctalk]

On 2017-Oct-27, at 12:57 PM, Paul Koning via cctalk wrote:
>> On Oct 27, 2017, at 3:21 PM, Al Kossow via cctalk  
>> wrote:
>> On 10/27/17 12:16 PM, Chuck Guzis via cctalk wrote:
>> 
>>> I've long had a fantasy about building a core-logic CPU such as the
>>> Univac Solid State.
>> 
>> I have been told the behavior of Univac magnetic logic was similar to NMOS
> 
> That doesn't sound even close.


It does seem like a strange statement.
I wonder if they were just trying to draw an analogy between the inherent 
dynamic operation requirements of magnetic logic and the dynamic operation 
requirements of some (many?) NMOS designs (not really inherent to NMOS).


> Ken Olsen did his thesis on magnetic core logic.  There is some (but 
> surprisingly little) information on line about this technology.  There are 
> two flavors: with permanent magnetic cores (memory cores) and with "soft" 
> cores (transformers).  Apollo "rope" core memory ROM is an example of the 
> former.
> 
>   paul

Re: Which Dec Emulation is the MOST useful and Versatile?

[Al Kossow via cctalk]

On 10/27/17 12:57 PM, Paul Koning wrote:

> That doesn't sound even close.

http://www.ussc90.nl/circ.htm


Ferractors.

While computers now are composed by many integrated circuits containing each 
millions of logical units,
processing data with a speed of a few gigabits per second in a parallel-flow of 
64 bits,
the USSC's CPU-logic was composed of over 1000 circuit boards with each only a 
few active components.
One circuitboard contained only 4 simple logical units, the ferractors.
These circuit-boards processed the data with the theoretical speed of 700 
KBits/second.
The ferractors were tiny transformers, performing one-bit operations, powered 
by 700 KCs AC.

On the positive half of the cycle, the ferractor-core was magnetised or not 
depending on the current through the bias-coil,
which made the total magnetic field in the core to exceed the 
hysteresis-threshold or not.
In the subsequent negative half-cycle the ferractor showed on the secondairy 
coil a high or a low impedance,  depending
on whether it had been magnetised or not.
On low-impedance a positif bias-current was generated for the next 
ferractor-circuit.

Since each ferractor was set in one cycle-half and was read in the next 
cycle-half, an one bit-stream of a register was
formed
by 24 ferractors in series, alternatingly fed by opposite phases.
In such a string of ferractor-circuits 12 bits cycled around, 10 bits, a sign 
and a space.
The information in the registers was circling around in 4 parallel 
one-bit-strings.
The data in the registers cycled around with the same speed as the information 
on the drum-memory.

The 200 diode-boards were used in OR and in NAND functions, depending on being 
located in the positive-phase-circuitry
or the negative-one.
The bias-coil was connected in positive or negative polarity to enforce or to 
diminish magnetisation during the first
half-cycle
in order to create normal or inverting logical gates.

Re: Apple II no video display

[Ethan Dicks via cctalk]

On Fri, Oct 27, 2017 at 4:13 PM, Brent Hilpert via cctalk
 wrote:
> 74S is faster than 74LS, 74LS was combining low power techniques (which 
> result in loss of speed) with Schottky technology to get some of the lost 
> speed back, to get a better speed-power product than 'normal' TTL.

Right.  My bad there.

> The chronological order of development was 74 --> 74H & L --> 74S --> 74LS

I do recall that progression.  I've even seen a couple of 74L parts
(and there are more than a couple 74H parts in a 1968 PDP-8)

-ethan

RE: Apple II no video display

[Dave Wade via cctalk]

> -Original Message-
> From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Brent
> Hilpert via cctalk
> Sent: 27 October 2017 20:53
> To: General Discussion: On-Topic and Off-Topic Posts
> 
> Subject: Re: Apple II no video display
> 
> On 2017-Oct-27, at 8:40 AM, Dave Wade via cctalk wrote:
> > I have an Apple II that produces one beep at power on, but my monitor
> > says "no video present". A scope on the output shows frame sync but at
> > low levels. The odd thing is that ic A9 appears to be a 74S151 not a
> > 74LS151. I wouldn't expect this to work, but I assume it was working
> > at some point in time!
> >
> > I have done some googling and can't see any reference to this
substitution.
> > Is it something any one else has seen?
> 
> Don't know about the frequency of occurrence of such a substitution in the
> apple II but the relative downside of 74S to 74LS is the higher loading
from
> inputs of S types (aside from higher per package power consumption).
> The worst case on A9 looks to be inputs I2,I4 which are driven by one LS
> output which is also driving two other LS inputs.
> This should still be within the loading rules.
> Can't say I would be expecting the S type to be a problem.

Its just not something I have seen. It was the higher loading that was
concerning me...

> 
> How about using the scope to trace back through Q3 to the resistive inputs
of
> R6,7,8 where the video elements are resistively combined.
> See how the signals and levels are at the input end of those resistors.
> 
> If you're seeing frame sync without line sync, perhaps look back towards
the
> sync combiner which appears is probably C13.
> 
> Would have to stare at the logic more to discern what all the inputs there
are
> doing.
> The apple II schematic is terrible (IMO).
>(looking at:
> http://www.freeinfosociety.com/electronics/schemview.php?id=1472 )

There are more usable schematics in the Apple II Redbook, but they are
spread over several pages so working out fan-in and fan-out.  
I am sure I got mine from applelogic.org but it appears to be down. There is
a copy here:-

http://www.classiccmp.org/cini/pdf/Apple/Apple%20II%20(Redbook)%20Reference%
20Manual%2030th%20Anniversary.pdf

but as it works on another monitor I suspect the one I was using does not
like Apple video...

Dave

RE: RK05/BA11 slides

[Rob Jarratt via cctalk]

> -Original Message-
> From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Noel
> Chiappa via cctalk
> Sent: 27 October 2017 19:03
> To: cctalk@classiccmp.org
> Cc: j...@mercury.lcs.mit.edu
> Subject: RE: RK05/BA11 slides
> 
> > From: "Rob Jarratt"
> 
> > I misread your email as suggesting that the 124 was more suitable
than
> > the 122
> 
> No, it's just cheaper (at the moment), and can be made to work.
> 
> > My H960 is not very accessible but I attempted to measure it front
back
> > and it may be 25". Do you know where should the length be measured?
> 
> You don't need to measure anything. The C-230-S-122 is the _exact_ part
DEC
> used originally for mounting RK05's in H960's.
> 


Even better. Oddly, on Farnell in the UK (which is Element 14) the 122 is
actually cheaper than the 124, but only by 2 pounds and still a lot of
money.

If there were enough people in the UK who want a pair they go from £135 to
£92.53 for 10 or more pairs, plus VAT plus postage. Anyone want to club
together?

Regards

Rob

Re: Apple II no video display

[Brent Hilpert via cctalk]

On 2017-Oct-27, at 12:13 PM, Ethan Dicks via cctalk wrote:
> On Fri, Oct 27, 2017 at 11:40 AM, Dave Wade via cctalk
> 
>> The odd thing is that ic A9 appears to be a 74S151 not a 74LS151. I
>> wouldn't expect this to work, but I assume it was working at some point in
>> time!
> 
> I don't think that should be a problem.  74S is often a sub for 74LS
> when the higher speed of 74LS is not required

74S is faster than 74LS, 74LS was combining low power techniques (which result 
in loss of speed) with Schottky technology to get some of the lost speed back, 
to get a better speed-power product than 'normal' TTL.

The chronological order of development was 74 --> 74H & L --> 74S --> 74LS


> but the higher drive of
> 74S is (and the higher power consumption of 74S is irrelevant
> in-circuit).  There are many times when you can put a 74S where it
> calls for a 74LS but often you can't sub 74LS for 74S where it's there
> intentionally.
> 
> -ethan

RE: Apple II no video display

[Dave Wade via cctalk]

> -Original Message-
> From: Ethan Dicks [mailto:ethan.di...@gmail.com]
> Sent: 27 October 2017 20:14
> To: Dave Wade ; General Discussion: On-Topic
> and Off-Topic Posts 
> Subject: Re: Apple II no video display
> 
> On Fri, Oct 27, 2017 at 11:40 AM, Dave Wade via cctalk
>  wrote:
> > Folks,
> >
> > I have an Apple II that produces one beep at power on, but my monitor
> > says "no video present". A scope on the output shows frame sync but at
> > low levels.
> 
> Are you using a vintage CRT or a modern LCD with composite-in?  I have
> found numerous examples of 1970s video not being acceptable to modern
> screens.

That was the problem. I was trying an LCD TV that I had used successfully with 
other vintage equipment. When I tried it on another screen (small one, also LCD 
for in-car reversing camera) I get a display.
I was a bit surprised as there is a modulator and that wasn't detected either. 

> 
> Do you have a working Apple II to compare the scope trace to?  It's possible
> you have a defective component, but I would try to line up some
> comparisons between good and bad examples to narrow down the
> differences if any.
> 

No I don't have a working Apple II.  Well I do now! I did compare with a CoCo 3 
and the sync pulses on the CoCo3 looked much bigger.

> > The odd thing is that ic A9 appears to be a 74S151 not a 74LS151. I
> > wouldn't expect this to work, but I assume it was working at some
> > point in time!
> 
> I don't think that should be a problem.  74S is often a sub for 74LS when the
> higher speed of 74LS is not required but the higher drive of 74S is (and the
> higher power consumption of 74S is irrelevant in-circuit).  There are many
> times when you can put a 74S where it calls for a 74LS but often you can't sub
> 74LS for 74S where it's there intentionally.

I was wondering if it needed more drive than 74LS could provide, but as it 
works, apparently not..
> 
> -ethan

Thanks for the suggestions
Dave

Re: Which Dec Emulation is the MOST useful and Versatile?

[Paul Koning via cctalk]

> On Oct 27, 2017, at 3:21 PM, Al Kossow via cctalk  
> wrote:
> 
> 
> 
> On 10/27/17 12:16 PM, Chuck Guzis via cctalk wrote:
> 
>> I've long had a fantasy about building a core-logic CPU such as the
>> Univac Solid State.
> 
> I have been told the behavior of Univac magnetic logic was similar to NMOS

That doesn't sound even close.

Ken Olsen did his thesis on magnetic core logic.  There is some (but 
surprisingly little) information on line about this technology.  There are two 
flavors: with permanent magnetic cores (memory cores) and with "soft" cores 
(transformers).  Apollo "rope" core memory ROM is an example of the former.

paul

Re: Apple II no video display

[Brent Hilpert via cctalk]

On 2017-Oct-27, at 8:40 AM, Dave Wade via cctalk wrote:
> I have an Apple II that produces one beep at power on, but my monitor says
> "no video present". A scope on the output shows frame sync but at low
> levels. The odd thing is that ic A9 appears to be a 74S151 not a 74LS151. I
> wouldn't expect this to work, but I assume it was working at some point in
> time!
> 
> I have done some googling and can't see any reference to this substitution.
> Is it something any one else has seen?

Don't know about the frequency of occurrence of such a substitution in the 
apple II but
the relative downside of 74S to 74LS is the higher loading from inputs of S 
types (aside from higher per package power consumption).
The worst case on A9 looks to be inputs I2,I4 which are driven by one LS output 
which is also driving two other LS inputs.
This should still be within the loading rules.
Can't say I would be expecting the S type to be a problem.

How about using the scope to trace back through Q3 to the resistive inputs of 
R6,7,8 where the video elements are resistively combined. 
See how the signals and levels are at the input end of those resistors.

If you're seeing frame sync without line sync, perhaps look back towards the 
sync combiner which appears is probably C13.

Would have to stare at the logic more to discern what all the inputs there are 
doing.
The apple II schematic is terrible (IMO).
 (looking at: 
http://www.freeinfosociety.com/electronics/schemview.php?id=1472 )

Re: Which Dec Emulation is the MOST useful and Versatile?

[Al Kossow via cctalk]

On 10/27/17 12:16 PM, Chuck Guzis via cctalk wrote:

> I've long had a fantasy about building a core-logic CPU such as the
> Univac Solid State.

I have been told the behavior of Univac magnetic logic was similar to NMOS
which explains why there is an RF power amplifier for the clock driver in
the machine.

Re: Which Dec Emulation is the MOST useful and Versatile?

[Chuck Guzis via cctalk]

On 10/27/2017 12:06 PM, Paul Koning via cctalk wrote:

> But that doesn't directly relate to gate level emulation.  If you
> have gate level documentation you can of course build a copy of the
> machine out of actual gate-type parts, like 7400 chips.  Or you can
> write a gate level model in VHDL, which is not the most popular form
> but certainly perfectly straightforward.  Either way, though, you
> have to start with a document that shows what the gates are in the
> original and how they connect.  And to get it to work, you need to
> deal with timing issues and logic abuse, if present.  In the 6600,
> both are very present and very critical.  For example, I've been
> debugging a section (the central processor branch logic) where the
> behavior changes quite substantially depending on whether you favor S
> or R in an R/S flop, i.e., if both are asserted at the same time, who
> wins?  And the circuit and wire delays matter, down to the
> few-nanosecond level.

This.  In particular, google for a shot of the 6600 backplane.  Many of
those twisted wires were cut to provide specific delays.  Remember the
nanosecond-foot?  A lot of the old hardware used this in the design.

I've long had a fantasy about building a core-logic CPU such as the
Univac Solid State.  But heck if I know where one would get the "hard"
magnetic cores today.   Another example of something you can't do with
commodity TTL.


--Chuck

Re: Apple II no video display

[Ethan Dicks via cctalk]

On Fri, Oct 27, 2017 at 11:40 AM, Dave Wade via cctalk
 wrote:
> Folks,
>
> I have an Apple II that produces one beep at power on, but my monitor says
> "no video present". A scope on the output shows frame sync but at low
> levels.

Are you using a vintage CRT or a modern LCD with composite-in?  I have
found numerous examples of 1970s video not being acceptable to modern
screens.

Do you have a working Apple II to compare the scope trace to?  It's
possible you have a defective component, but I would try to line up
some comparisons between good and bad examples to narrow down the
differences if any.

> The odd thing is that ic A9 appears to be a 74S151 not a 74LS151. I
> wouldn't expect this to work, but I assume it was working at some point in
> time!

I don't think that should be a problem.  74S is often a sub for 74LS
when the higher speed of 74LS is not required but the higher drive of
74S is (and the higher power consumption of 74S is irrelevant
in-circuit).  There are many times when you can put a 74S where it
calls for a 74LS but often you can't sub 74LS for 74S where it's there
intentionally.

-ethan

Re: Which Dec Emulation is the MOST useful and Versatile?

[Paul Koning via cctalk]

> On Oct 27, 2017, at 2:55 PM, ben via cctalk  wrote:
> 
> On 10/27/2017 12:28 PM, Paul Koning via cctalk wrote:
> 
>> It helps to have a machine built with sane design principles.  Things like 
>> RS flops that don't have both inputs active at the same time.  And a 
>> properly clocked architecture.  Neither of these properties holds for the 
>> CDC 6600...
>>  paul
> 
> But you can still get TTL for the common stuff,and PAL/GAL chips as well, so 
> nothing is preventing you from doing the common logic of
> the 1965 to 1985 era, if it not for production use.
> Ben.

True if you have a TTL machine.  6600 is discrete transistor, and the actual 
transistor specs are nowhere to be found as far as I have been able to tell.

But that doesn't directly relate to gate level emulation.  If you have gate 
level documentation you can of course build a copy of the machine out of actual 
gate-type parts, like 7400 chips.  Or you can write a gate level model in VHDL, 
which is not the most popular form but certainly perfectly straightforward.  
Either way, though, you have to start with a document that shows what the gates 
are in the original and how they connect.  And to get it to work, you need to 
deal with timing issues and logic abuse, if present.  In the 6600, both are 
very present and very critical.  For example, I've been debugging a section 
(the central processor branch logic) where the behavior changes quite 
substantially depending on whether you favor S or R in an R/S flop, i.e., if 
both are asserted at the same time, who wins?  And the circuit and wire delays 
matter, down to the few-nanosecond level.

Most machines are not so crazy; I would assume a PDP-11/20 gate level model 
would be quite painless.

paul

Re: Which Dec Emulation is the MOST useful and Versatile?

[Brent Hilpert via cctalk]

On 2017-Oct-27, at 11:28 AM, Paul Koning via cctalk wrote:
> It helps to have a machine built with sane design principles.  Things like RS 
> flops that don't have both inputs active at the same time.  And a properly 
> clocked architecture.  Neither of these properties holds for the CDC 6600...


True of a lot of 50s / 60s / even early-70s logic, designers took a lot of 
'electronic shortcuts' to save components, capacitive coupling for instance 
being popular.

Flip flops with half-a dozen options of semantically different input types 
which could be combined in multiple, so every flip-flop in the system was 
unique with it's particular set of (sometimes many) input options.

One logic design I encountered had a type of logic element specifically 
intended (from what I could figure) to soak up glitches.
It could take in multiple inputs with edges occurring at slightly skewed times 
and ensured that only one slightly-delayed edge would be propagated out.

Re: Which Dec Emulation is the MOST useful and Versatile?

[ben via cctalk]

On 10/27/2017 12:28 PM, Paul Koning via cctalk wrote:


It helps to have a machine built with sane design principles.  Things like RS 
flops that don't have both inputs active at the same time.  And a properly 
clocked architecture.  Neither of these properties holds for the CDC 6600...

paul


But you can still get TTL for the common stuff,and PAL/GAL chips as 
well, so nothing is preventing you from doing the common logic of

the 1965 to 1985 era, if it not for production use.
Ben.

RE: Contacting the list admin?

[Jay West via cctalk]

Got it covered.

Re: Which Dec Emulation is the MOST useful and Versatile?

[Noel Chiappa via cctalk]

> From: Kip Koon

> I tend to get emulation and simulation a bit confused. 

You and me both!

I think part of the problem is that there is no generally-agreed-upon
definition of the two terms.

I like this one a lot, though:

  
https://stackoverflow.com/questions/1584617/simulator-or-emulator-what-is-the-difference

  Emulation is the process of mimicking the outwardly observable behavior to
  match an existing target. The internal state of the emulation mechanism
  does not have to accurately reflect the internal state of the target which
  it is emulating.

  Simulation, on the other hand, involves modeling the underlying state of
  the target. The end result of a good simulation is that the simulation
  model will emulate the target which it is simulating. 

  Ideally, you should be able to look into the simulation and observe
  properties that you would also see if you looked into the original target.
  In practice, there may some shortcuts to the simulation for performance
  reasons -- that is, some internal aspects of the simulation may actually be
  an emulation.

  ...

  EDIT: Other responses have pointed out that the goal of an emulation is to
  able to substitute for the object it is emulating. That's an important
  point. A simulation's focus is more on the modelling of the internal state
  of the target - and the simulation does not necessarily lead to emulation.
  ... SPICE, for example, cannot substitue for an actual electronics circuit


There's also the question of what's being emulated.

Ersatz-11, for example, does a good job of looking like a PDP-11 - for the
software. However, it does not like a PDP-11 for the hardware (although John
used to sell boards you could plug into a PC, which provided a QBUS, IIRC).

So is it a simulator or an emulator? Good question.

About the only _generally-agreed_ example of the terminology I can think of
are 'in-circuit emulators', which _exactly_ match the behaviour of a given
chip.

Noel

Re: Which Dec Emulation is the MOST useful and Versatile?

[Brent Hilpert via cctalk]

On 2017-Oct-27, at 10:27 AM, Paul Koning via cctalk wrote:
> So it's a question of what you're after.  If you want to run the software, or 
> teach the machine at the programmer level, SIMH or equivalent is quite 
> adequate.  If you want to teach FPGA skills, an FPGA behavioral model 
> emulation is a good project, especially for a small machine like a PDP-8.  As 
> for the gate level model, I'm not sure what argument to make for that other 
> than "paul is a bit crazy" and "because the data exists to do it".  :-)

I would add that gate/logic level simulations in some instances can be useful 
if you have to understand and repair the original hardware.

Back in the 90s I was attempting to repair a 60s-era SSI-based calculator, I 
reverse-engineered it but was still stuck with issues of access
to the PC boards, understanding the design, having to hack up the PCB traces or 
unsolder (unobtainable) ICs.
I resorted to writing a logic simulator (in a high-level scripting language) 
and entering the 'net list' of the reverse-engineered logic to
produce a gate-level simulation.
I could then play around with the simulator, slow the clock to observable 
rates, monitor any and multiple points, break connections,
force logic levels, eventually to obtain the same fault as the real hardware.

Re: Which Dec Emulation is the MOST useful and Versatile?

[Paul Koning via cctalk]

> On Oct 27, 2017, at 1:47 PM, Rob Jarratt  wrote:
> 
> If I had the skill, data and time, I would always go for a gate level model.
> However, I do most (sim/em)ulation in SIMH instead, like I have been doing
> for MU5 where I lack the data and the time and probably the skill as well,
> but I can always acquire the skill, the other two are harder to find.

I've read some VHDL before, but my 6600 gate level model was my first VHDL 
project.  It's actually quite easy, easier than the level of fluency needed to 
do a good behavioral model.  A decent textbook helps a lot.  My favorite is The 
Designer's Guide to VHDL by Peter Ashenden.  The point is that modeling small 
modules (SSI gates, or 6600 "cordwood" modules, or the like) is easy because 
they are small and have quite simple behavior.  Then it's just a matter of 
wiring them together.

Note that you don't need an FPGA to do logic level design; all you need is a 
VHDL simulator.  I use GHDL, which is open source, part of GCC so you can hook 
in C code if you need it.  For example, that allows you to make a model of the 
I/O channel and connect it to a SIMH style emulation of a peripheral device.

The real issue for gate level modeling is the availability of the necessary 
documentation.  If you have schematics, and they includes critical detail such 
as microcode ROM contents, you're all set.  If all you have is functional 
specs, you can't even start.

It helps to have a machine built with sane design principles.  Things like RS 
flops that don't have both inputs active at the same time.  And a properly 
clocked architecture.  Neither of these properties holds for the CDC 6600...

paul

RE: RK05/BA11 slides

[Noel Chiappa via cctalk]

> From: "Rob Jarratt"

> I misread your email as suggesting that the 124 was more suitable than
> the 122

No, it's just cheaper (at the moment), and can be made to work.

> My H960 is not very accessible but I attempted to measure it front back
> and it may be 25". Do you know where should the length be measured?

You don't need to measure anything. The C-230-S-122 is the _exact_ part DEC
used originally for mounting RK05's in H960's.

 Noel

RE: Which Dec Emulation is the MOST useful and Versatile?

[Rob Jarratt via cctalk]

> -Original Message-
> From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Paul
Koning
> via cctalk
> Sent: 27 October 2017 18:28
> To: Dave Wade ; General Discussion: On-Topic and
> Off-Topic Posts 
> Subject: Re: Which Dec Emulation is the MOST useful and Versatile?
> 
> 
> > On Oct 27, 2017, at 4:54 AM, Dave Wade via cctalk

> wrote:
> >
> > Kip,
> > I think "emulation" and "simulation" get used pretty much
interchangeable.
> > SIMH is touted a simulator, Hercules/390 as an emulator yet they are
> > both programs that provide a "bare metal" machine via software on
> > which an operating system can be installed. Neither make any attempt
> > to reproduce the speed of the original CPU.
> 
> True.  And by some argument, an FPGA implementation (from an HDL
> behavioral model) is also a software implementation, just written in a
different
> programming language.
> 
> Recently I commented to an old colleague that there are many different
levels
> of emulation possible, and any one of those may make sense -- it's just a
> question of what you're after.  So you can emulate in a conventional
> programming language, as SIMH does, reproducing the programmer-visible
> behavior of the machine but not its timing.  Bugs from the original might
> appear if those bugs are known to be important, but probably not
otherwise.
> This kind is (nowadays) likely to run faster than the original; certainly
it won't
> usually mimic the original timing, neither for computation nor I/O.
> 
> You can make timing-accurate software emulators, with lots of work.  SIMH,
in
> paced mode, and provided the I/O waits are reasonably accurately expressed
in
> units of machine cycles, isn't quite timing accurate but is somewhat
similar.
> 
> You can build a behavioral simulator (SIMH style, basically) in an FPGA.
That
> isn't necessarily any more capable or accurate than a software simulator.
PDP-
> 2011 is an example I know of, and I've see articles about other PDP
emulations
> of this kind.  Since the design is new, created from a behavioral
description
> (data book, functional spec, architecture spec) it will be about as
accurate as
> SIMH.
> 
> You can also, if the data exists, build a lower level (gate level or
thereabouts)
> FPGA model.  Given schematics and wire lists, it should be possible to
build an
> implementation that's an exact copy of how the original machine worked
> (assuming of course the documentation is accurate, which is not
necessarily the
> case).  Such an emulation would replicate strange and undocumented
behavior
> of the original -- and allow you to find out where that came from.  I've
been
> working on such a thing for the CDC 6600, which is surprisingly hard given
that
> the design lives right on the hairy edge of not working at all
timing-wise.  But it
> does accuarately model the peripheral processors right now, and indeed it
> shows and explains some undocumented oddities that are part of that
> machine's folklore.
> 
> So it's a question of what you're after.  If you want to run the software,
or teach
> the machine at the programmer level, SIMH or equivalent is quite adequate.
If
> you want to teach FPGA skills, an FPGA behavioral model emulation is a
good
> project, especially for a small machine like a PDP-8.  As for the gate
level
> model, I'm not sure what argument to make for that other than "paul is a
bit
> crazy" and "because the data exists to do it".  :-)
> 


If I had the skill, data and time, I would always go for a gate level model.
However, I do most (sim/em)ulation in SIMH instead, like I have been doing
for MU5 where I lack the data and the time and probably the skill as well,
but I can always acquire the skill, the other two are harder to find.

Regards

Rob

RE: RK05/BA11 slides

[Rob Jarratt via cctalk]

> -Original Message-
> From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Noel
> Chiappa via cctalk
> Sent: 27 October 2017 18:25
> To: cctalk@classiccmp.org
> Cc: j...@mercury.lcs.mit.edu
> Subject: RE: RK05/BA11 slides
> 
> > From: "Rob Jarratt"
> 
> > Thanks for this info Noel.
> 
> Sure; I figured it would be useful to someone, glad to know it was.
> 
> > So it sounds like I would need the C-230-S-124. ... My metalworking
> > abilities are limited.
> 
> If you don't want to have to do any mods, the C-230-S-122 is a straight
bolt-in,
> albeit $30 or so more than the -124, which requires..
> 
> > I am not clear from the picture you linked to, what the modification
is?
> 
> Drilling the two holes.
> 
>   Noel

Ah I misread your email as suggesting that the 124 was more suitable than
the 122, but if the 122 is the better fit then so much the better. My H960
is not very accessible but I attempted to measure it front back and it may
be 25". Do you know where should the length be measured?

Regards

Rob

Re: Which Dec Emulation is the MOST useful and Versatile?

[Paul Koning via cctalk]

> On Oct 27, 2017, at 4:54 AM, Dave Wade via cctalk  
> wrote:
> 
> Kip,
> I think "emulation" and "simulation" get used pretty much interchangeable.
> SIMH is touted a simulator, Hercules/390 as an emulator yet they are both
> programs that provide a "bare metal" machine via software on which an
> operating system can be installed. Neither make any attempt to reproduce the
> speed of the original CPU.

True.  And by some argument, an FPGA implementation (from an HDL behavioral 
model) is also a software implementation, just written in a different 
programming language.

Recently I commented to an old colleague that there are many different levels 
of emulation possible, and any one of those may make sense -- it's just a 
question of what you're after.  So you can emulate in a conventional 
programming language, as SIMH does, reproducing the programmer-visible behavior 
of the machine but not its timing.  Bugs from the original might appear if 
those bugs are known to be important, but probably not otherwise.  This kind is 
(nowadays) likely to run faster than the original; certainly it won't usually 
mimic the original timing, neither for computation nor I/O.

You can make timing-accurate software emulators, with lots of work.  SIMH, in 
paced mode, and provided the I/O waits are reasonably accurately expressed in 
units of machine cycles, isn't quite timing accurate but is somewhat similar.

You can build a behavioral simulator (SIMH style, basically) in an FPGA.  That 
isn't necessarily any more capable or accurate than a software simulator.  
PDP-2011 is an example I know of, and I've see articles about other PDP 
emulations of this kind.  Since the design is new, created from a behavioral 
description (data book, functional spec, architecture spec) it will be about as 
accurate as SIMH.

You can also, if the data exists, build a lower level (gate level or 
thereabouts) FPGA model.  Given schematics and wire lists, it should be 
possible to build an implementation that's an exact copy of how the original 
machine worked (assuming of course the documentation is accurate, which is not 
necessarily the case).  Such an emulation would replicate strange and 
undocumented behavior of the original -- and allow you to find out where that 
came from.  I've been working on such a thing for the CDC 6600, which is 
surprisingly hard given that the design lives right on the hairy edge of not 
working at all timing-wise.  But it does accuarately model the peripheral 
processors right now, and indeed it shows and explains some undocumented 
oddities that are part of that machine's folklore.

So it's a question of what you're after.  If you want to run the software, or 
teach the machine at the programmer level, SIMH or equivalent is quite 
adequate.  If you want to teach FPGA skills, an FPGA behavioral model emulation 
is a good project, especially for a small machine like a PDP-8.  As for the 
gate level model, I'm not sure what argument to make for that other than "paul 
is a bit crazy" and "because the data exists to do it".  :-)

paul

RE: RK05/BA11 slides

[Noel Chiappa via cctalk]

> From: "Rob Jarratt"

> Thanks for this info Noel.

Sure; I figured it would be useful to someone, glad to know it was.

> So it sounds like I would need the C-230-S-124. ... My metalworking
> abilities are limited.

If you don't want to have to do any mods, the C-230-S-122 is a straight
bolt-in, albeit $30 or so more than the -124, which requires..

> I am not clear from the picture you linked to, what the modification is? 

Drilling the two holes.

Noel

Contacting the list admin?

[Mike Whalen via cctalk]

Hello,

I've been trying to unsubscribe from the list. I did it once before and
hadn't seen anything for months.  However, I suddenly started receiving
mails last weekend. I went to the webpage to unsubscribe but I can't login
and neither the password reset or unsubscribe confirmation make it to me.

So I'm hoping someone can tell me how to contact the list admin. I emailed
an address I found on the website but I hadn't received a response yet. I
may not have waited long enough but I don't know.

Cheers,

Mike

RE: RK05/BA11 slides

[Rob Jarratt via cctalk]

> -Original Message-
> From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Noel
> Chiappa via cctalk
> Sent: 27 October 2017 15:14
> To: cctalk@classiccmp.org
> Cc: j...@mercury.lcs.mit.edu
> Subject: RK05/BA11 slides
> 
> So, you have an RK05 drive, but you're missing the slides to mount it?
> Your troubles are over (sort of :-).
> 
> It turns out the slide DEC used was the General Devices 'Chassis Trak'
> C-230-S-122 (22") - and those are still available (e.g. from Newark).
They're
> somewhat pricey - the -124 (24") is slightly cheaper, and can easily be
modified
> to fit an H960, viz:
> 
>   http://ana-3.lcs.mit.edu/~jnc/tech/jpg/24InchSlide.jpg
> 


Thanks for this info Noel. I need the outer rails for my RK05 in a H960. So
it sounds like I would need the C-230-S-124. I am not clear from the picture
you linked to, what the modification is? My metalworking abilities are
limited.

Regards

Rob


> The one in the image actually came off an -11/05 in a 10-1/2" box; the
3-3/8"
> outer slide pair from the RK05 slides does in fact fit the inner slides
(i.e.
> the part permanently fixed to the box) used on a lot of BA11 boxes.
> 
> One hitch: the location of the safety latches (the 'buttons' on the inner
slides
> that pop out through holes in the intermediate slides) is different on
most of
> the BA11-K inners (on the three BA11-F's I've looked at, they do match),
and so
> the latches don't work. (Unless of course you make the correct hole in the
> intermediates, or drill new holes in the inners that come with the slide
set, to
> match the mounting holes on the BA11-K, and use them instead.)
> 
> So, better than nothing, if you have BA11's (or similar) and don't have
the outer
> slides, to mount them.
> 
>   Noel

Re: Image de-warping tool, and Multics/GCOS panels

[jim stephens via cctalk]

I move it to my android device.

CS Scanner application will let you do that easily.  add it to a cs scan 
document, then save that doc as a image (jpg) file. Convoluted, but 
actually less hassle with the operation of selecting the parts you want 
to mess with than other applications i've seen


https://www.camscanner.com/

thanks
Jim

On 10/27/2017 8:57 AM, Paul Koning via cctalk wrote:

Does anyone know of any freeware

Re: Image de-warping tool, and Multics/GCOS panels

[Paul Koning via cctalk]

> On Oct 27, 2017, at 11:30 AM, Noel Chiappa via cctalk  
> wrote:
> 
> Hey all, I've been doing research on Multics front panels, which it turns out
> are slightly different from those on the Honeywell 6000 series machines which
> ran GCOS, and are often confused with them.
> 
> So, I've put together a Web page about them:
> 
>  Multics and Related 6000 Series Front Panels
>  http://ana-3.lcs.mit.edu/~jnc/tech/multics/MulticsPanels.html
> 
> and I've taken some new images, so make sure the captions are all readable.
> 
> 
> I'm having an issue with the images, though: taking a picture of a flat,
> rectangular panel with a camera usually produces distortion (even with the
> lens set to the narrowest angle possible).
> 
> Does anyone know of any freeware which will fix this? The image tool I
> normally use (ImagePals, sort of a poor man's Photoshop) does have a 'warp'
> function, but it requires setting up a grid of points, and is a pain to use:
> optimal would be something where you mark the 4 corners, and few intermediate
> edge points, and the image is automagically fixed.

GIMP has something that does this, after a fashion.  I've played with it a bit, 
to straighten out snapshots of book pages moderately.  It doesn't work all that 
well, but for modest distortion (pincushion, for example) of photos taken with 
some care, it's probably good enough.

If I want a good clean image, my solution is to take a decent photo or scan, 
then turn it into vector graphics.  By hand is often best; I recently 
discovered Inkscape which is pretty friendly.

paul

Apple II no video display

[Dave Wade via cctalk]

Folks,

 

I have an Apple II that produces one beep at power on, but my monitor says
"no video present". A scope on the output shows frame sync but at low
levels. The odd thing is that ic A9 appears to be a 74S151 not a 74LS151. I
wouldn't expect this to work, but I assume it was working at some point in
time!

 

I have done some googling and can't see any reference to this substitution.
Is it something any one else has seen?

 

Dave Wade

 

 

Image de-warping tool, and Multics/GCOS panels

[Noel Chiappa via cctalk]

Hey all, I've been doing research on Multics front panels, which it turns out
are slightly different from those on the Honeywell 6000 series machines which
ran GCOS, and are often confused with them.

So, I've put together a Web page about them:

  Multics and Related 6000 Series Front Panels
  http://ana-3.lcs.mit.edu/~jnc/tech/multics/MulticsPanels.html

and I've taken some new images, so make sure the captions are all readable.


I'm having an issue with the images, though: taking a picture of a flat,
rectangular panel with a camera usually produces distortion (even with the
lens set to the narrowest angle possible).

Does anyone know of any freeware which will fix this? The image tool I
normally use (ImagePals, sort of a poor man's Photoshop) does have a 'warp'
function, but it requires setting up a grid of points, and is a pain to use:
optimal would be something where you mark the 4 corners, and few intermediate
edge points, and the image is automagically fixed.

I did find this:

  http://guides.library.illinois.edu/c.php?g=347882=2345440

but it's even hairier than the warp function in my image tool; it's very
powerful (and thus complex, sigh) and can straigten out badly warped old book
pages.

I'm hoping there's a simpler tool, for the simple case of distortion of
rectangles by a lens - does anyone know of anything?

Thanks!

Noel

RK05/BA11 slides

[Noel Chiappa via cctalk]

So, you have an RK05 drive, but you're missing the slides to mount it?
Your troubles are over (sort of :-).

It turns out the slide DEC used was the General Devices 'Chassis Trak'
C-230-S-122 (22") - and those are still available (e.g. from Newark). They're
somewhat pricey - the -124 (24") is slightly cheaper, and can easily be
modified to fit an H960, viz:

  http://ana-3.lcs.mit.edu/~jnc/tech/jpg/24InchSlide.jpg

The one in the image actually came off an -11/05 in a 10-1/2" box; the 3-3/8"
outer slide pair from the RK05 slides does in fact fit the inner slides (i.e.
the part permanently fixed to the box) used on a lot of BA11 boxes.

One hitch: the location of the safety latches (the 'buttons' on the inner
slides that pop out through holes in the intermediate slides) is different on
most of the BA11-K inners (on the three BA11-F's I've looked at, they do
match), and so the latches don't work. (Unless of course you make the correct
hole in the intermediates, or drill new holes in the inners that come with the
slide set, to match the mounting holes on the BA11-K, and use them instead.)

So, better than nothing, if you have BA11's (or similar) and don't have the
outer slides, to mount them.

  Noel

RE: Which Dec Emulation is the MOST useful and Versatile?

[Dave Wade via cctalk]

Kip,
 I think "emulation" and "simulation" get used pretty much interchangeable.
SIMH is touted a simulator, Hercules/390 as an emulator yet they are both
programs that provide a "bare metal" machine via software on which an
operating system can be installed. Neither make any attempt to reproduce the
speed of the original CPU.

I am going to stick with "emulator" as I think of "simulation" as process
whereby we can model some statistical or mathematical parameters e.g. how
long the queues are in a supermarket, what time is high tide in Boston using
only mathematics. Note this may involve a general purpose computer, or it
may use specialist machines such as the Doodson-Lege Tidal Predictor 

http://www.ntslf.org/about-tides/doodson-machine

So to return to emulating other computers have at least  five different
flavours...

1. Functional Software Emulation where we match the functions but not the
speed of operation using a program. SIMH and Hercules are such beasts
For much work this is fine. Most software emulators take this approach.

2. Cycle accurate Software Emulation/Simulation where we attempt to match
both function and speed of the underlying hardware. This may be necessary
for software which uses software loops to control say the speed of a UART. I
If you want to use the simulator for historical research this may help. Some
emulators can be switched to this mode when software needs it...

David Sharp's SSEM/Baby simulator is such a beast.
http://www.davidsharp.com/baby/

3. Behavioural  Hardware Emulation
This is where we build a hardware implementation of a machine, but do not
attempt to duplicate the exact detail of the logic or its speed of
operation. Richard Stofer's IBM1130 in VHDL is such a project. 
He doesn't have it available on the Web (I have a copy and have run it)
There is a Flash video on the IBM1130.org site

4. Cycle Accurate Behavioural Hardware Emulation 
This is probably the most common approach to cycle accurate emulations.
Because FPGA's typically run several times faster than the clock on legacy
hardware, and they may contain high level function blocks, e.g. multipliers
its often "relatively easy" to match the instruction times of a legacy CPU
in an FPGA. 

My BabyBaby FPGA implementation of the SSEM FPGA is such a beast. It runs at
the same speed as replica SSEM in MSI Manchester but internally it's a
parallel implementation whereas the real Baby is a serial machine.
https://hackaday.com/2016/01/06/babybaby-a-1948-computer-on-an-fpga/

5. Gate Level Hardware Emulation
It gate level hardware emulation we try and re-implement the hardware down
to the logic gate level. This is hard because FPGA's are may not be designed
to work this way, and gate level design will also have some dependencies on
propagation delays, which on an FPGA will be much smaller than on any real
hardware. A couple of examples of these are 

Laurence Wilkinson's IBM 360/30 http://www.ljw.me.uk/ibm360/
Carl Claunch's IBM 1130 http://ibm1130.blogspot.co.uk/

I hope this doesn't muddy the water too much...
Dave
  



> -Original Message-
> From: cctalk [mailto:cctalk-boun...@classiccmp.org] On Behalf Of Kip Koon
> via cctalk
> Sent: 27 October 2017 06:42
> To: 'Paul Koning' ; 'General Discussion: On-Topic
> and Off-Topic Posts' 
> Subject: RE: Which Dec Emulation is the MOST useful and Versatile?
> 
> Hi Paul,
> Thank you for the info.  I tend to get emulation and simulation a bit
confused.
> Just so I understand simulation correctly, hardware emulation is when the
> functionality of the hardware is actually implemented in hardware somehow
> like VHDL in an FGPA and hardware simulation is when a program
> implements the functionality of the hardware in a software program no
> matter what hardware the hardware simulator is running on.  I think I got
this
> now.
> Correct?  Thanks a bunch for setting me straight.
> 
> 
> Kip Koon
> computer...@sc.rr.com
> http://www.cocopedia.com/wiki/index.php/User:Computerdoc
> 
> 
> -Original Message-
> From: Paul Koning [mailto:paulkon...@comcast.net]
> Sent: Thursday, October 26, 2017 4:29 PM
> To: Kip Koon; General Discussion: On-Topic and Off-Topic Posts
> Subject: Re: Which Dec Emulation is the MOST useful and Versatile?
> 
> 
> > On Oct 24, 2017, at 10:40 PM, Kip Koon via cctalk

> wrote:
> >
> > ...
> > 2nd, a hardware emulator running a simulator written in 6809 assembly
> > language for the PDP-8/e running on a 6809 Core & I/O board system
> > seems like a good choice for me as I understand the 6809 microprocessor,
> ...
> 
> I would call that a software emulator; the fact that it runs on some
> microprocessor eval board doesn't make a difference.  Running SIMH on a
> Beaglebone would be analogous (though easier).
> 
> When you said "hardware emulator" I figured you meant an FPGA
> implementation
> of a VHDL or Verilog model of the machine.  There are a bunch of those for
a
>