[dpdk-dev] [DPDK] net/ice: CVL multi-process support

[Xiao Zhang]

Add multiple process support for CVL, secondary processes will share
memory with primary process, do not need allocation for secondary
processes.
Restrict configuration ops permission for secondary processes, only
allow primary process to do configuration ops since secondary processes
should not be allowed to do configuration but share from primary process.

Cc: sta...@dpdk.org

Signed-off-by: Xiao Zhang 
---
 drivers/net/ice/ice_ethdev.c | 85 
 drivers/net/ice/ice_rxtx.c   | 24 +
 2 files changed, 109 insertions(+)

diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 9ce730c..b2ef21f 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -1408,6 +1408,12 @@ ice_dev_init(struct rte_eth_dev *dev)
dev->tx_pkt_burst = ice_xmit_pkts;
dev->tx_pkt_prepare = ice_prep_pkts;
 
+   /* for secondary processes, we don't initialise any further as primary
+* has already done this work.
+*/
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
ice_set_default_ptype_table(dev);
pci_dev = RTE_DEV_TO_PCI(dev->device);
intr_handle = &pci_dev->intr_handle;
@@ -1574,6 +1580,9 @@ ice_dev_stop(struct rte_eth_dev *dev)
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
uint16_t i;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return;
+
/* avoid stopping again */
if (pf->adapter_stopped)
return;
@@ -1610,6 +1619,9 @@ ice_dev_close(struct rte_eth_dev *dev)
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return;
+
/* Since stop will make link down, then the link event will be
 * triggered, disable the irq firstly to avoid the port_infoe etc
 * resources deallocation causing the interrupt service thread
@@ -1638,6 +1650,9 @@ ice_dev_uninit(struct rte_eth_dev *dev)
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct rte_flow *p_flow;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
ice_dev_close(dev);
 
dev->dev_ops = NULL;
@@ -1670,6 +1685,9 @@ ice_dev_configure(__rte_unused struct rte_eth_dev *dev)
struct ice_adapter *ad =
ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
/* Initialize to TRUE. If any of Rx queues doesn't meet the
 * bulk allocation or vector Rx preconditions we will reset it.
 */
@@ -1948,6 +1966,9 @@ ice_dev_start(struct rte_eth_dev *dev)
uint16_t nb_txq, i;
int mask, ret;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
/* program Tx queues' context in hardware */
for (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {
ret = ice_tx_queue_start(dev, nb_txq);
@@ -2031,6 +2052,9 @@ ice_dev_reset(struct rte_eth_dev *dev)
 {
int ret;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
if (dev->data->sriov.active)
return -ENOTSUP;
 
@@ -2211,6 +2235,9 @@ ice_link_update(struct rte_eth_dev *dev, int 
wait_to_complete)
unsigned int rep_cnt = MAX_REPEAT_TIME;
bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
memset(&link, 0, sizeof(link));
memset(&old, 0, sizeof(old));
memset(&link_status, 0, sizeof(link_status));
@@ -2350,6 +2377,8 @@ ice_dev_set_link_up(struct rte_eth_dev *dev)
 {
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
return ice_force_phys_link_state(hw, true);
 }
 
@@ -2358,6 +2387,8 @@ ice_dev_set_link_down(struct rte_eth_dev *dev)
 {
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
return ice_force_phys_link_state(hw, false);
 }
 
@@ -2368,6 +2399,9 @@ ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
struct rte_eth_dev_data *dev_data = pf->dev_data;
uint32_t frame_size = mtu + ICE_ETH_OVERHEAD;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
/* check if mtu is within the allowed range */
if (mtu < RTE_ETHER_MIN_MTU || frame_size > ICE_FRAME_SIZE_MAX)
return -EINVAL;
@@ -2402,6 +2436,9 @@ static in

Re: [dpdk-dev] [PATCH 08/10] crypto/nitrox: add burst enqueue and dequeue operations

[Nagadheeraj Rottela]

Hi Aaron,

Yes, there is a missing header include. I will fix it in v2.

> -Original Message-
> From: Aaron Conole 
> Sent: Wednesday, July 17, 2019 7:47 PM
> To: Nagadheeraj Rottela 
> Cc: dev@dpdk.org; Srikanth Jampala 
> Subject: [EXT] Re: [dpdk-dev] [PATCH 08/10] crypto/nitrox: add burst
> enqueue and dequeue operations
> 
> External Email
> 
> --
> Nagadheeraj Rottela  writes:
> 
> > Add burst enqueue and dequeue operations along with interface for
> > symmetric request manager.
> >
> > Signed-off-by: Nagadheeraj Rottela 
> > ---
> 
> Hi Nagadheeraj,
> 
> >  drivers/crypto/nitrox/nitrox_qp.h |  55 ++
> >  drivers/crypto/nitrox/nitrox_sym.c| 123 -
> >  drivers/crypto/nitrox/nitrox_sym_reqmgr.c | 173
> > ++
> > drivers/crypto/nitrox/nitrox_sym_reqmgr.h |  10 ++
> >  4 files changed, 359 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/crypto/nitrox/nitrox_qp.h
> > b/drivers/crypto/nitrox/nitrox_qp.h
> > index 0244c4dbf..645fa8925 100644
> > --- a/drivers/crypto/nitrox/nitrox_qp.h
> > +++ b/drivers/crypto/nitrox/nitrox_qp.h
> > @@ -34,12 +34,67 @@ struct nitrox_qp {
> > rte_atomic16_t pending_count;
> >  };
> >
> > +static inline uint16_t
> > +nitrox_qp_free_count(struct nitrox_qp *qp) {
> > +   uint16_t pending_count = rte_atomic16_read(&qp-
> >pending_count);
> > +
> > +   RTE_ASSERT(qp->count >= pending_count);
> > +   return (qp->count - pending_count);
> > +}
> > +
> >  static inline bool
> >  nitrox_qp_is_empty(struct nitrox_qp *qp)  {
> > return (rte_atomic16_read(&qp->pending_count) == 0);  }
> >
> > +static inline uint16_t
> > +nitrox_qp_used_count(struct nitrox_qp *qp) {
> > +   return rte_atomic16_read(&qp->pending_count);
> > +}
> > +
> > +static inline struct nitrox_softreq * nitrox_qp_get_softreq(struct
> > +nitrox_qp *qp) {
> > +   uint32_t tail = qp->tail % qp->count;
> > +
> > +   return qp->ridq[tail].sr;
> > +}
> > +
> > +static inline void
> > +nitrox_ring_dbell(struct nitrox_qp *qp, uint16_t cnt) {
> > +   struct command_queue *cmdq = &qp->cmdq;
> > +
> > +   if (!cnt)
> > +   return;
> > +
> > +   rte_write64(cnt, cmdq->dbell_csr_addr); }
> > +
> > +static inline void
> > +nitrox_qp_enqueue(struct nitrox_qp *qp, void *instr, struct
> > +nitrox_softreq *sr) {
> > +   uint32_t head = qp->head % qp->count;
> > +
> > +   memcpy(&qp->cmdq.ring[head * qp->cmdq.instr_size],
> > +  instr, qp->cmdq.instr_size);
> > +   qp->ridq[head].sr = sr;
> > +   qp->head++;
> > +   rte_atomic16_inc(&qp->pending_count);
> > +   rte_wmb();
> > +}
> > +
> > +static inline void
> > +nitrox_qp_dequeue(struct nitrox_qp *qp) {
> > +   qp->tail++;
> > +   rte_atomic16_dec(&qp->pending_count);
> > +   rte_smp_mb();
> > +}
> > +
> >  int nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr,
> > const char *dev_name, uint32_t nb_descriptors,
> > uint8_t inst_size, int socket_id); diff --git
> > a/drivers/crypto/nitrox/nitrox_sym.c
> > b/drivers/crypto/nitrox/nitrox_sym.c
> > index 34c62b02e..9ccc28755 100644
> > --- a/drivers/crypto/nitrox/nitrox_sym.c
> > +++ b/drivers/crypto/nitrox/nitrox_sym.c
> > @@ -521,6 +521,125 @@ nitrox_sym_dev_sess_clear(struct rte_cryptodev
> *cdev,
> > rte_mempool_put(sess_mp, ctx);
> >  }
> >
> > +static struct nitrox_crypto_ctx *
> > +get_crypto_ctx(struct rte_crypto_op *op) {
> > +   if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
> > +   if (likely(op->sym->session))
> > +   return get_sym_session_private_data(op->sym-
> >session,
> > +  nitrox_sym_drv_id);
> > +
> > +   }
> > +
> > +   return NULL;
> > +}
> > +
> > +static int
> > +nitrox_enq_single_op(struct nitrox_qp *qp, struct rte_crypto_op *op)
> > +{
> > +   struct nitrox_crypto_ctx *ctx;
> > +   struct nitrox_softreq *sr;
> > +   int err;
> > +
> > +   op->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
> > +
> > +   ctx = get_crypto_ctx(op);
> > +   if (unlikely(!ctx)) {
> > +   op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
> > +   return -EINVAL;
> > +   }
> > +
> > +   if (unlikely(rte_mempool_get(qp->sr_mp, (void **)&sr)))
> > +   return -ENOMEM;
> > +
> > +   err = nitrox_process_se_req(qp->qno, op, ctx, sr);
> > +   if (unlikely(err)) {
> > +   rte_mempool_put(qp->sr_mp, sr);
> > +   op->status = RTE_CRYPTO_OP_STATUS_ERROR;
> > +   return err;
> > +   }
> > +
> > +   nitrox_qp_enqueue(qp, nitrox_sym_instr_addr(sr), sr);
> > +   return 0;
> > +}
> > +
> > +static uint16_t
> > +nitrox_sym_dev_enq_burst(void *queue_pair, struct rte_crypto_op
> **ops,
> > +uint16_t nb_ops)
> > +{
> > +   struct nitrox_qp *qp = queue_pair;
> > +   uint16_t free_slots = 0;
> > +   uint16_t cnt = 0;
> > +   bool err = false;
> > +
> > +   free_slots = nitrox_qp_free_count(qp);
>

Re: [dpdk-dev] [PATCH v4 1/3] vfio: revert change that does intr eventfd setup at probe

[Yao, Lei A]

> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Nithin Dabilpuram
> Sent: Thursday, July 18, 2019 10:36 PM
> To: Hyong Youb Kim ; David Marchand
> ; Thomas Monjalon
> ; Yigit, Ferruh ; Burakov,
> Anatoly 
> Cc: jer...@marvell.com; John Daley ; Shahed Shaikh
> ; dev@dpdk.org; Nithin Dabilpuram
> 
> Subject: [dpdk-dev] [PATCH v4 1/3] vfio: revert change that does intr
> eventfd setup at probe
> 
> This reverts commit 89aac60e0be9ed95a87b16e3595f102f9faaffb4.
> "vfio: fix interrupts race condition"
> 
> The above mentioned commit moves the interrupt's eventfd setup
> to probe time but only enables one interrupt for all types of
> interrupt handles i.e VFIO_MSI, VFIO_LEGACY, VFIO_MSIX, UIO.
> It works fine with default case but breaks below cases specifically
> for MSIX based interrupt handles.
> 
> * Applications like l3fwd-power that request rxq interrupts
>   while ethdev setup.
> * Drivers that need > 1 MSIx interrupts to be configured for
>   functionality to work.
> 
> VFIO PCI for MSIx expects all the possible vectors to be setup up
> when using VFIO_IRQ_SET_ACTION_TRIGGER so that they can be
> allocated from kernel pci subsystem. Only way to increase the number
> of vectors later is first free all by using VFIO_IRQ_SET_DATA_NONE
> with action trigger and then enable new vector count.
> 
> Above commit changes the behavior of rte_intr_[enable|disable] to
> only mask and unmask unlike earlier behavior and thereby
> breaking above two scenarios.
> 
> Fixes: 89aac60e0be9 ("vfio: fix interrupts race condition")
> Cc: david.march...@redhat.com
> 
> Signed-off-by: Nithin Dabilpuram 
> Signed-off-by: Jerin Jacob 
> Tested-by: Stephen Hemminger 
> Tested-by: Shahed Shaikh 
Tested-by: Lei Yao 

This patch set  pass the interrupt test with ixgbe, i40e and virtio.
> ---
> v4:
> * No change.
> v3:
> * Update Shahed Shaikh's tested-by
> v2:
> * Include tested by sign from Stephen
> 
>  drivers/bus/pci/linux/pci_vfio.c  |  78 ++--
>  lib/librte_eal/linux/eal/eal_interrupts.c | 201 +++-
> --
>  2 files changed, 191 insertions(+), 88 deletions(-)
> 
> diff --git a/drivers/bus/pci/linux/pci_vfio.c 
> b/drivers/bus/pci/linux/pci_vfio.c
> index ee31239..1ceb1c0 100644
> --- a/drivers/bus/pci/linux/pci_vfio.c
> +++ b/drivers/bus/pci/linux/pci_vfio.c
> @@ -187,11 +187,8 @@ pci_vfio_set_bus_master(int dev_fd, bool op)
>  static int
>  pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
>  {
> - char irq_set_buf[sizeof(struct vfio_irq_set) + sizeof(int)];
> - struct vfio_irq_set *irq_set;
> - enum rte_intr_mode intr_mode;
>   int i, ret, intr_idx;
> - int fd;
> + enum rte_intr_mode intr_mode;
> 
>   /* default to invalid index */
>   intr_idx = VFIO_PCI_NUM_IRQS;
> @@ -223,6 +220,7 @@ pci_vfio_setup_interrupts(struct rte_pci_device *dev,
> int vfio_dev_fd)
>   /* start from MSI-X interrupt type */
>   for (i = VFIO_PCI_MSIX_IRQ_INDEX; i >= 0; i--) {
>   struct vfio_irq_info irq = { .argsz = sizeof(irq) };
> + int fd = -1;
> 
>   /* skip interrupt modes we don't want */
>   if (intr_mode != RTE_INTR_MODE_NONE &&
> @@ -238,51 +236,51 @@ pci_vfio_setup_interrupts(struct rte_pci_device
> *dev, int vfio_dev_fd)
>   return -1;
>   }
> 
> - /* found a usable interrupt mode */
> - if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) != 0)
> - break;
> -
>   /* if this vector cannot be used with eventfd, fail if we
> explicitly
>* specified interrupt type, otherwise continue */
> - if (intr_mode != RTE_INTR_MODE_NONE) {
> - RTE_LOG(ERR, EAL, "  interrupt vector does not
> support eventfd!\n");
> + if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0) {
> + if (intr_mode != RTE_INTR_MODE_NONE) {
> + RTE_LOG(ERR, EAL,
> + "  interrupt vector does not
> support eventfd!\n");
> + return -1;
> + } else
> + continue;
> + }
> +
> + /* set up an eventfd for interrupts */
> + fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
> + if (fd < 0) {
> + RTE_LOG(ERR, EAL, "  cannot set up eventfd, "
> + "error %i (%s)\n", errno,
> strerror(errno));
>   return -1;
>   }
> - }
> 
> - if (i < 0)
> - return -1;
> + dev->intr_handle.fd = fd;
> + dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
> 
> - fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
> - if (fd < 0) {
> - RTE_LOG(ERR, EAL, "  cannot set up eventfd, error %i (%s)\n",
> - errno, strerror(errno));
> - return 

[dpdk-dev] net/ice: CVL multi-process support

[Xiao Zhang]

Add multiple process support for CVL, secondary processes will share
memory with primary process, do not need allocation for secondary
processes.
Restrict configuration ops permission for secondary processes, only
allow primary process to do configuration ops since secondary processes
should not be allowed to do configuration but share from primary process.

Cc: sta...@dpdk.org

Signed-off-by: Xiao Zhang 
---
 drivers/net/ice/ice_ethdev.c | 85 
 drivers/net/ice/ice_rxtx.c   | 24 +
 2 files changed, 109 insertions(+)

diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 9ce730c..b2ef21f 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -1408,6 +1408,12 @@ ice_dev_init(struct rte_eth_dev *dev)
dev->tx_pkt_burst = ice_xmit_pkts;
dev->tx_pkt_prepare = ice_prep_pkts;
 
+   /* for secondary processes, we don't initialise any further as primary
+* has already done this work.
+*/
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
ice_set_default_ptype_table(dev);
pci_dev = RTE_DEV_TO_PCI(dev->device);
intr_handle = &pci_dev->intr_handle;
@@ -1574,6 +1580,9 @@ ice_dev_stop(struct rte_eth_dev *dev)
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
uint16_t i;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return;
+
/* avoid stopping again */
if (pf->adapter_stopped)
return;
@@ -1610,6 +1619,9 @@ ice_dev_close(struct rte_eth_dev *dev)
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return;
+
/* Since stop will make link down, then the link event will be
 * triggered, disable the irq firstly to avoid the port_infoe etc
 * resources deallocation causing the interrupt service thread
@@ -1638,6 +1650,9 @@ ice_dev_uninit(struct rte_eth_dev *dev)
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct rte_flow *p_flow;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
ice_dev_close(dev);
 
dev->dev_ops = NULL;
@@ -1670,6 +1685,9 @@ ice_dev_configure(__rte_unused struct rte_eth_dev *dev)
struct ice_adapter *ad =
ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
/* Initialize to TRUE. If any of Rx queues doesn't meet the
 * bulk allocation or vector Rx preconditions we will reset it.
 */
@@ -1948,6 +1966,9 @@ ice_dev_start(struct rte_eth_dev *dev)
uint16_t nb_txq, i;
int mask, ret;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
/* program Tx queues' context in hardware */
for (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {
ret = ice_tx_queue_start(dev, nb_txq);
@@ -2031,6 +2052,9 @@ ice_dev_reset(struct rte_eth_dev *dev)
 {
int ret;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
if (dev->data->sriov.active)
return -ENOTSUP;
 
@@ -2211,6 +2235,9 @@ ice_link_update(struct rte_eth_dev *dev, int 
wait_to_complete)
unsigned int rep_cnt = MAX_REPEAT_TIME;
bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
memset(&link, 0, sizeof(link));
memset(&old, 0, sizeof(old));
memset(&link_status, 0, sizeof(link_status));
@@ -2350,6 +2377,8 @@ ice_dev_set_link_up(struct rte_eth_dev *dev)
 {
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
return ice_force_phys_link_state(hw, true);
 }
 
@@ -2358,6 +2387,8 @@ ice_dev_set_link_down(struct rte_eth_dev *dev)
 {
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
return ice_force_phys_link_state(hw, false);
 }
 
@@ -2368,6 +2399,9 @@ ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
struct rte_eth_dev_data *dev_data = pf->dev_data;
uint32_t frame_size = mtu + ICE_ETH_OVERHEAD;
 
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return -E_RTE_SECONDARY;
+
/* check if mtu is within the allowed range */
if (mtu < RTE_ETHER_MIN_MTU || frame_size > ICE_FRAME_SIZE_MAX)
return -EINVAL;
@@ -2402,6 +2436,9 @@ static in

Re: [dpdk-dev] [PATCH v3] test: reduce test duration for efd autotest

[Parthasarathy, JananeeX M]

Hi,

>-Original Message-
>From: Thomas Monjalon [mailto:tho...@monjalon.net]
>Sent: Friday, July 05, 2019 3:17 AM
>To: dev@dpdk.org
>Cc: Parthasarathy, JananeeX M ;
>Marohn, Byron ; De Lara Guarch, Pablo
>; Pattan, Reshma
>; david.march...@redhat.com;
>acon...@redhat.com
>Subject: Re: [dpdk-dev] [PATCH v3] test: reduce test duration for efd autotest
>
>Still no review for this patch?
>
>20/01/2019 22:25, Thomas Monjalon:
>> Any review please?
>>
>> 29/11/2018 08:36, Jananee Parthasarathy:
>> > Reduced test time for efd_autotest.
>> > Key length is updated, invoke times of random function is reduced.
>> > Different value is updated for each hash key entry.
>> >
>> > Signed-off-by: Jananee Parthasarathy
>
>
>
>
Self NACK.
Although this patch reduces test duration it reduces the number of combinations 
which is not useful.
Hence as per discussion with Maintainer, this patch can be ignored.

Regards
M.P.Jananee

[dpdk-dev] [DPDK] net/i40e: fix RSS hash update problem for X722 VF

[penghuan]

This patch fixes X722 VF problem when received packet don't have
HASH value.
1) Packet classifier types update should support X722 VF, not only
 for X722 PF;
2) MAC type is invalid for X722 VF when set packet classifier type,
so move it after MAC type is set correctly;

Fixes: a286ebeb0714 ("net/i40e: add dynamic mapping of SW flow types to HW 
pctypes")
Cc: sta...@dpdk.org

Signed-off-by: penghuan 
---
 drivers/net/i40e/i40e_ethdev_vf.c | 2 +-
 drivers/net/i40e/i40e_rxtx.c  | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev_vf.c 
b/drivers/net/i40e/i40e_ethdev_vf.c
index 5be32b0..a9825b4 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1480,7 +1480,6 @@ static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
return 0;
}
i40e_set_default_ptype_table(eth_dev);
-   i40e_set_default_pctype_table(eth_dev);
rte_eth_copy_pci_info(eth_dev, pci_dev);
 
hw->vendor_id = pci_dev->id.vendor_id;
@@ -1498,6 +1497,7 @@ static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
return -1;
}
 
+   i40e_set_default_pctype_table(eth_dev);
rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
  i40evf_dev_alarm_handler, eth_dev);
 
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 34aa6c8..87aa5d6 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -3168,7 +3168,8 @@ void __attribute__((cold))
ad->pctypes_tbl[RTE_ETH_FLOW_L2_PAYLOAD] =
(1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD);
 
-   if (hw->mac.type == I40E_MAC_X722) {
+   if ((hw->mac.type == I40E_MAC_X722) ||
+   (hw->mac.type == I40E_MAC_X722_VF)) {
ad->pctypes_tbl[RTE_ETH_FLOW_NONFRAG_IPV4_UDP] |=
(1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP);
ad->pctypes_tbl[RTE_ETH_FLOW_NONFRAG_IPV4_UDP] |=
-- 
1.8.3.1

Re: [dpdk-dev] [PATCH 1/3] vfio: revert change that does intr eventfd setup at probe

[Nowak, DamianX]

Hi,

> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Nithin Dabilpuram
> Sent: Wednesday, July 17, 2019 13:59
> To: Hyong Youb Kim ; David Marchand
> ; Thomas Monjalon
> ; Yigit, Ferruh ; Burakov,
> Anatoly 
> Cc: jer...@marvell.com; John Daley ; Shahed Shaikh
> ; dev@dpdk.org; Nithin Dabilpuram
> 
> Subject: [dpdk-dev] [PATCH 1/3] vfio: revert change that does intr eventfd
> setup at probe
> 
> This reverts commit 89aac60e0be9ed95a87b16e3595f102f9faaffb4.
> "vfio: fix interrupts race condition"
> 
> The above mentioned commit moves the interrupt's eventfd setup to probe
> time but only enables one interrupt for all types of interrupt handles i.e
> VFIO_MSI, VFIO_LEGACY, VFIO_MSIX, UIO.
> It works fine with default case but breaks below cases specifically for MSIX
> based interrupt handles.
> 
> * Applications like l3fwd-power that request rxq interrupts
>   while ethdev setup.
> * Drivers that need > 1 MSIx interrupts to be configured for
>   functionality to work.
> 
> VFIO PCI for MSIx expects all the possible vectors to be setup up when using
> VFIO_IRQ_SET_ACTION_TRIGGER so that they can be allocated from kernel
> pci subsystem. Only way to increase the number of vectors later is first free
> all by using VFIO_IRQ_SET_DATA_NONE with action trigger and then enable
> new vector count.
> 
> Above commit changes the behavior of rte_intr_[enable|disable] to only
> mask and unmask unlike earlier behavior and thereby breaking above two
> scenarios.
> 
> Fixes: 89aac60e0be9 ("vfio: fix interrupts race condition")
> Cc: david.march...@redhat.com
> 
> Signed-off-by: Nithin Dabilpuram 
> Signed-off-by: Jerin Jacob 
> ---
>  drivers/bus/pci/linux/pci_vfio.c  |  78 ++--
>  lib/librte_eal/linux/eal/eal_interrupts.c | 201 +++-
> --

I can confirm this patch fixes "EAL:   error configuring interrupt" issue on my 
C6XX board
Damian

Re: [dpdk-dev] [PATCH] lib/librte_eal: fix unrecongized telemetry eal arg

[Laatz, Kevin]

On 15/07/2019 11:54, Sean Morrissey wrote:

Added telemetry to EAL long options so that when
--telemetry is passed as an EAL arg that there is
no unrecognized argument error message printed.

Fixes: 8877ac688b52 ("telemetry: introduce infrastructure")
Cc: ciara.po...@intel.com
Cc: sta...@dpdk.org

Signed-off-by: Sean Morrissey 
---
  lib/librte_eal/common/eal_common_options.c | 3 +++
  lib/librte_eal/common/eal_options.h| 4 
  2 files changed, 7 insertions(+)

diff --git a/lib/librte_eal/common/eal_common_options.c 
b/lib/librte_eal/common/eal_common_options.c
index 512d5088e..24e36cf23 100644
--- a/lib/librte_eal/common/eal_common_options.c
+++ b/lib/librte_eal/common/eal_common_options.c
@@ -81,6 +81,9 @@ eal_long_options[] = {
{OPT_LEGACY_MEM,0, NULL, OPT_LEGACY_MEM_NUM   },
{OPT_SINGLE_FILE_SEGMENTS, 0, NULL, OPT_SINGLE_FILE_SEGMENTS_NUM},
{OPT_MATCH_ALLOCATIONS, 0, NULL, OPT_MATCH_ALLOCATIONS_NUM},
+#ifdef RTE_LIBRTE_TELEMETRY
+   {OPT_TELEMETRY, 0, NULL, OPT_TELEMETRY_NUM},
+#endif
{0, 0, NULL, 0}
  };
  
diff --git a/lib/librte_eal/common/eal_options.h b/lib/librte_eal/common/eal_options.h

index 9855429e5..e4c8e25c2 100644
--- a/lib/librte_eal/common/eal_options.h
+++ b/lib/librte_eal/common/eal_options.h
@@ -69,6 +69,10 @@ enum {
OPT_IOVA_MODE_NUM,
  #define OPT_MATCH_ALLOCATIONS  "match-allocations"
OPT_MATCH_ALLOCATIONS_NUM,
+#ifdef RTE_LIBRTE_TELEMETRY
+   #define OPT_TELEMETRY  "telemetry"
+   OPT_TELEMETRY_NUM,
+#endif
OPT_LONG_MAX_NUM
  };
  

LGTM, thanks!

Acked-by: Kevin Laatz 

[dpdk-dev] [PATCH 1/2] net/dpaa: fix to add SG check for ext bufs pkts

[Hemant Agrawal]

This patch add check to return error as the handling
for external buffer packets with SG is currently missing.

Fixes: 37f9b54bd3cf ("net/dpaa: support Tx and Rx queue setup")
Cc: sta...@dpdk.org

Signed-off-by: Hemant Agrawal 
---
 drivers/net/dpaa/dpaa_rxtx.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index f16b7e0bc..30b183607 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -957,6 +957,16 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, 
uint16_t nb_bufs)
goto send_pkts;
}
} else {
+   /* TODO not supporting sg for external bufs*/
+   if (unlikely(mbuf->nb_segs > 1)) {
+   /* Set frames_to_send & nb_bufs so
+* that packets are transmitted till
+* previous frame.
+*/
+   frames_to_send = loop;
+   nb_bufs = loop;
+   goto send_pkts;
+   }
state = tx_on_external_pool(q, mbuf,
&fd_arr[loop]);
if (unlikely(state)) {
-- 
2.17.1

[dpdk-dev] [PATCH 2/2] net/dpaa2: fix the ctrl bits in Tx SG FD

[Hemant Agrawal]

From: Nipun Gupta 

This patch resets frc and ctrl in sg tx fd to avoid corruption.

Fixes: 774e9ea91992 ("net/dpaa2: add support for multi seg buffers")
Cc: sta...@dpdk.org

Signed-off-by: Nipun Gupta 
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 1 +
 drivers/net/dpaa2/dpaa2_rxtx.c  | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h 
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 92fc76211..8644761db 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -229,6 +229,7 @@ enum qbman_fd_format {
((fd)->simple.frc = (0x8000 | (len)))
 #define DPAA2_GET_FD_FRC_PARSE_SUM(fd) \
((uint16_t)(((fd)->simple.frc & 0x) >> 16))
+#define DPAA2_RESET_FD_FRC(fd) ((fd)->simple.frc = 0)
 #define DPAA2_SET_FD_FRC(fd, _frc) ((fd)->simple.frc = _frc)
 #define DPAA2_RESET_FD_CTRL(fd) ((fd)->simple.ctrl = 0)
 
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index c6e50123c..6ca5071e0 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -370,8 +370,9 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
DPAA2_SET_FD_LEN(fd, mbuf->pkt_len);
DPAA2_SET_ONLY_FD_BPID(fd, bpid);
DPAA2_SET_FD_OFFSET(fd, temp->data_off);
-   DPAA2_SET_FD_ASAL(fd, DPAA2_ASAL_VAL);
DPAA2_FD_SET_FORMAT(fd, qbman_fd_sg);
+   DPAA2_RESET_FD_FRC(fd);
+   DPAA2_RESET_FD_CTRL(fd);
/*Set Scatter gather table and Scatter gather entries*/
sgt = (struct qbman_sge *)(
(size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
-- 
2.17.1

Re: [dpdk-dev] [PATCH v6 0/4] LPM4 memory ordering changes

[Thomas Monjalon]

18/07/2019 16:00, Medvedkin, Vladimir:
> On 18/07/2019 07:22, Ruifeng Wang wrote:
> > Ruifeng Wang (4):
> >lib/lpm: not inline unnecessary functions
> >lib/lpm: memory orderings to avoid race conditions for v1604
> >lib/lpm: memory orderings to avoid race conditions for v20
> >lib/lpm: use atomic store to avoid partial update
> 
> Looks ok to me, thanks!
> 
> Series-acked-by: Vladimir Medvedkin 

Applied, thanks

Re: [dpdk-dev] [PATCH v5 00/11] sched: feature enhancements

[Thomas Monjalon]

19/07/2019 00:57, Dumitrescu, Cristian:
> > Jasvinder Singh (11):
> >   sched: remove wrr from strict priority tc queues
> >   sched: add config flexibility to tc queue sizes
> >   sched: add max pipe profiles config in run time
> >   sched: rename tc3 params to best-effort tc
> >   sched: improve error log messages
> >   sched: improve doxygen comments
> >   net/softnic: add config flexibility to softnic tm
> >   test_sched: modify tests for config flexibility
> >   examples/ip_pipeline: add config flexibility to tm function
> >   examples/qos_sched: add tc and queue config flexibility
> >   sched: remove redundant macros
> 
> Series-acked-by: Cristian Dumitrescu 
> 
> See the replies on some individual patches for a few details
> that we should fix for RC3 if we cannot get them done in time for RC2.

I am waiting for a v6.

Re: [dpdk-dev] [PATCH] doc: add deprecation notice about changes to ethernet structures

[Bruce Richardson]

On Thu, Jul 18, 2019 at 03:09:10PM -0700, Stephen Hemminger wrote:
> Tell users about upcoming changes to rte_ether_addr and
> rte_ether_header.
> 
> Signed-off-by: Stephen Hemminger 
> ---
>  doc/guides/rel_notes/deprecation.rst | 9 +
>  1 file changed, 9 insertions(+)
> 
> diff --git a/doc/guides/rel_notes/deprecation.rst 
> b/doc/guides/rel_notes/deprecation.rst
> index a7796f49b9fe..9c20a47b3e4c 100644
> --- a/doc/guides/rel_notes/deprecation.rst
> +++ b/doc/guides/rel_notes/deprecation.rst
> @@ -82,3 +82,12 @@ Deprecation Notices
>to set new power environment if power environment was already initialized.
>In this case the function will return -1 unless the environment is unset 
> first
>(using ``rte_power_unset_env``). Other function usage scenarios will not 
> change.
> +
> +* net: the Ethernet address and header defintions will change attributes.
> +  The Ethernet address struct will no longer be marked as packed since
> +  since the packed attribute is meaningless on a byte array.
> +  The Etherne header will be marked as aligned on a 2 byte boundary (and
> +  no longer packed).  This allows for efficient access on all CPU's.
> +  These changes should not impact normal usage drivers naturally
> +  align the Ethernet header on receive, and almost every encapsulation
> +  preserves the alignment.
> -- 
> 2.17.1

More comprehensive deprecation notice than mine, so:

Acked-by: Bruce Richardson 

One suggested change, rather than "almost every encapsulation" can we put
it down as "all known encapsulations". If there is even a single public
spec, in-real-use encapsulation that is used that does not preserve
alignment, we should not do this. Saying "almost every" implies that we
know of ones that don't, which I don't believe is the case.

/Bruce

Re: [dpdk-dev] [EXT] [PATCH v3 1/3] eal/arm64: add 128-bit atomic compare exchange

[Phil Yang (Arm Technology China)]

> -Original Message-
> From: Jerin Jacob Kollanukkaran 
> Sent: Friday, July 19, 2019 2:25 PM
> To: Phil Yang (Arm Technology China) ; dev@dpdk.org
> Cc: tho...@monjalon.net; hemant.agra...@nxp.com; Honnappa
> Nagarahalli ; Gavin Hu (Arm Technology
> China) ; nd ; gage.e...@intel.com
> Subject: RE: [EXT] [PATCH v3 1/3] eal/arm64: add 128-bit atomic compare
> exchange
> 
> > -Original Message-
> > From: Phil Yang 
> > Sent: Friday, June 28, 2019 1:42 PM
> > To: dev@dpdk.org
> > Cc: tho...@monjalon.net; Jerin Jacob Kollanukkaran
> ;
> > hemant.agra...@nxp.com; honnappa.nagaraha...@arm.com;
> > gavin...@arm.com; n...@arm.com; gage.e...@intel.com
> > Subject: [EXT] [PATCH v3 1/3] eal/arm64: add 128-bit atomic compare
> > exchange
> >
> > External Email
> >
> > --
> > Add 128-bit atomic compare exchange on aarch64.
> >
> > Signed-off-by: Phil Yang 
> > Tested-by: Honnappa Nagarahalli 
> > Reviewed-by: Honnappa Nagarahalli 
> > ---
> > +#define RTE_HAS_ACQ(mo) ((mo) != __ATOMIC_RELAXED && (mo) !=
> > +__ATOMIC_RELEASE) #define RTE_HAS_RLS(mo) ((mo) ==
> > __ATOMIC_RELEASE || \
> > +(mo) == __ATOMIC_ACQ_REL || \
> > +(mo) == __ATOMIC_SEQ_CST)
> > +
> > +#define RTE_MO_LOAD(mo)  (RTE_HAS_ACQ((mo)) \
> > +   ? __ATOMIC_ACQUIRE : __ATOMIC_RELAXED) #define
> > RTE_MO_STORE(mo)
> > +(RTE_HAS_RLS((mo)) \
> > +   ? __ATOMIC_RELEASE : __ATOMIC_RELAXED)
> > +
> 
> The one starts with RTE_ are public symbols, If it is generic enough,
> Move to common layer so that every architecturse can use.
> If you think, otherwise make it internal

Let's keep it internal. I will remove the 'RTE_' tag. 

> 
> 
> 
> > +#ifdef __ARM_FEATURE_ATOMICS
> 
> This define is added in gcc 9.1 and I believe for clang it is not supported 
> yet.
> So old gcc and clang this will be undefined.
> I think, With meson + native build, we  can find the presence of
> ATOMIC support by running a.out. Not sure about make and cross build case.
> I don't want block this feature because of this, IMO, We can add this code
> with  existing __ARM_FEATURE_ATOMICS scheme and later find a method
> to enhance it. But please check how to fix it.

OK.

> 
> > +#define __ATOMIC128_CAS_OP(cas_op_name, op_string) 
> >  \
> > +static inline rte_int128_t 
> >  \
> > +cas_op_name(rte_int128_t *dst, rte_int128_t old,   
> >  \
> > +   rte_int128_t updated)   
> > \
> > +{  
> >  \
> > +   /* caspX instructions register pair must start from even-numbered
> > +* register at operand 1.
> > +* So, specify registers for local variables here.
> > +*/ 
> > \
> > +   register uint64_t x0 __asm("x0") = (uint64_t)old.val[0];
> > \
> 
> Since direct x0 register used in the code and
> cas_op_name() and rte_atomic128_cmp_exchange() is inline function,
> Based on parent function load, we may corrupt x0 register aka

Since x0/x1 and x2/x3 are used a lot and often contain live values.
Maybe to change them to some relatively less frequently used registers like 
x14/x15 and x16/x17 might help for this case?
According to the PCS (Procedure Call Standard), x14-x17 are also temporary 
registers.

> Break arm64 ABI. Not sure clobber list will help here or not?

In my understanding, for the register variable, if it contains a live value in 
the specified register, the compiler will move the live value into a free 
register. 
Since x0~x3 are present in the input/output operands and x0/x1's value needs to 
be restored to the variable 'old' as a return value. 
So I didn't add them into the clobber list.

> Making it as no_inline will help but not sure about the performance impact.
> May be you can check with compiler team.
> 
> We burned our hands with this scheme, see
> 5b40ec6b966260e0ff66a8a2c689664f75d6a0e6 ("mempool/octeontx2: fix
> possible arm64 ABI break")
> 
> Probably we can choose a scheme for rc2 and adjust as when we have
> complete clarity.
> 
> > +   register uint64_t x1 __asm("x1") = (uint64_t)old.val[1];
> > \
> > +   register uint64_t x2 __asm("x2") = (uint64_t)updated.val[0];
> > \
> > +   register uint64_t x3 __asm("x3") = (uint64_t)updated.val[1];
> > \
> > +   asm volatile(   
> > \
> > +   op_string " %[old0], %[old1], %[upd0], %[upd1],
> > [%[dst]]"   \
> > +   : [old0] "+r" (x0), 
> > \
> > + [old1] "+r" (x1)  
> > \
> > +   : [upd0] "r" (x2), 

Re: [dpdk-dev] [PATCH] mk: fix output directory name when compiling with custom kernel header dir

[Lipiec, Herakliusz]

> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: Thursday, July 18, 2019 11:25 PM
> 18/07/2019 16:03, Herakliusz Lipiec:
> > When building dpdk with differnt kernel headers by specifying
> > RTE_KERNELDIR igb_uio is compiled to directory with a name of the
> > version of kernel thats running on the system instead of the one that
> > dpdk is actually compiled against. Fixed by replacing hardcoded value
> > with value from RTE_KERNELDIR.
> 
> missing original commit reference:
> Fixes: 3967af352aeb ("mk: install kernel modules")
> 
> > Cc: sta...@dpdk.org
> > Cc: bruce.richard...@intel.com
> > Signed-off-by: Herakliusz Lipiec 
> >
> > ---
> > resending v1 with corrected cc address for stable and corrected
> > alignment.
> 
> It should be marked v2,
> and the alignment is still not correct.
Sorry I forgot to add the change to commit, sending as v2.
> 
> > -kerneldir   ?= /lib/modules/$(shell uname -r)/extra/dpdk
> > +kerneldir ?= $(subst /build,/extra/dpdk,$(RTE_KERNELDIR))
> 
> I would suggest another syntax, easier to read:
> 
> kerneldir   ?= $(RTE_KERNELDIR:/build=/extra/dpdk)
> 
I have tried that before and it didn't seem to solve the issue.

[dpdk-dev] [PATCH v2] mk: fix output directory name when compiling with custom kernel header dir

[Herakliusz Lipiec]

When building dpdk with differnt kernel headers by specifying
RTE_KERNELDIR igb_uio is compiled to directory with a name of the
version of kernel thats running on the system instead of the one that
dpdk is actually compiled against. Fixed by replacing hardcoded value
with value from RTE_KERNELDIR.

Fixes: 3967af352aeb ("mk: install kernel modules")
Cc: sta...@dpdk.org
Cc: bruce.richard...@intel.com
Signed-off-by: Herakliusz Lipiec 

---
resending v2 with corrected corrected alignment.
---
 mk/rte.sdkinstall.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk/rte.sdkinstall.mk b/mk/rte.sdkinstall.mk
index 5c4215cd7..018e64908 100644
--- a/mk/rte.sdkinstall.mk
+++ b/mk/rte.sdkinstall.mk
@@ -27,7 +27,7 @@ ifeq ($(RTE_EXEC_ENV),linuxapp)
 RTE_EXEC_ENV=linux
 endif
 ifeq ($(RTE_EXEC_ENV),linux)
-kerneldir   ?= /lib/modules/$(shell uname -r)/extra/dpdk
+kerneldir   ?= $(subst /build,/extra/dpdk,$(RTE_KERNELDIR))
 else
 kerneldir   ?= /boot/modules
 endif
-- 
2.17.2

Re: [dpdk-dev] [PATCH v5 00/11] sched: feature enhancements

[Singh, Jasvinder]

> -Original Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: Friday, July 19, 2019 11:41 AM
> To: Singh, Jasvinder 
> Cc: dev@dpdk.org; Dumitrescu, Cristian 
> Subject: Re: [dpdk-dev] [PATCH v5 00/11] sched: feature enhancements
> 
> 19/07/2019 00:57, Dumitrescu, Cristian:
> > > Jasvinder Singh (11):
> > >   sched: remove wrr from strict priority tc queues
> > >   sched: add config flexibility to tc queue sizes
> > >   sched: add max pipe profiles config in run time
> > >   sched: rename tc3 params to best-effort tc
> > >   sched: improve error log messages
> > >   sched: improve doxygen comments
> > >   net/softnic: add config flexibility to softnic tm
> > >   test_sched: modify tests for config flexibility
> > >   examples/ip_pipeline: add config flexibility to tm function
> > >   examples/qos_sched: add tc and queue config flexibility
> > >   sched: remove redundant macros
> >
> > Series-acked-by: Cristian Dumitrescu 
> >
> > See the replies on some individual patches for a few details that we
> > should fix for RC3 if we cannot get them done in time for RC2.
> 
> I am waiting for a v6.
> 
Can these suggestions be fixed in RC3  as separate patch as they doesn't change 
any functionality? Thanks.

Re: [dpdk-dev] [RFC] doc: deprecate legacy code path in ipsec-secgw

[Ananyev, Konstantin]

> 
> All the functionality of the legacy code path in now available in
> the librte_ipsec library. It is planned to deprecate the legacy
> code path in the 19.11 release and remove the legacy code path in
> the 20.02 release.
> 
> Signed-off-by: Bernard Iremonger 
> ---
>  doc/guides/rel_notes/deprecation.rst | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/doc/guides/rel_notes/deprecation.rst 
> b/doc/guides/rel_notes/deprecation.rst
> index a7796f4..258fee8 100644
> --- a/doc/guides/rel_notes/deprecation.rst
> +++ b/doc/guides/rel_notes/deprecation.rst
> @@ -82,3 +82,8 @@ Deprecation Notices
>to set new power environment if power environment was already initialized.
>In this case the function will return -1 unless the environment is unset 
> first
>(using ``rte_power_unset_env``). Other function usage scenarios will not 
> change.
> +
> +* ipsec-secgw: All the ipsec-secgw legacy code path functionality is now
> +  available in the librte_ipsec library. It is planned to deprecate the 
> legacy
> +  code path in the ipsec-secgw application in the 19.11 release and remove it
> +  in the 20.02 release.
> --

Acked-by: Konstantin Ananyev 

> 2.7.4

Re: [dpdk-dev] [PATCH] mk: fix output directory name when compiling with custom kernel header dir

[Thomas Monjalon]

19/07/2019 13:09, Lipiec, Herakliusz:
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > 18/07/2019 16:03, Herakliusz Lipiec:
> > > -kerneldir   ?= /lib/modules/$(shell uname -r)/extra/dpdk
> > > +kerneldir ?= $(subst /build,/extra/dpdk,$(RTE_KERNELDIR))
> > 
> > I would suggest another syntax, easier to read:
> > 
> > kerneldir   ?= $(RTE_KERNELDIR:/build=/extra/dpdk)
> > 
> I have tried that before and it didn't seem to solve the issue.

Why? What is the output of $(info $(kerneldir)) ?

Re: [dpdk-dev] [PATCH v5 00/11] sched: feature enhancements

[Thomas Monjalon]

19/07/2019 13:16, Singh, Jasvinder:
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > 19/07/2019 00:57, Dumitrescu, Cristian:
> > > > Jasvinder Singh (11):
> > > >   sched: remove wrr from strict priority tc queues
> > > >   sched: add config flexibility to tc queue sizes
> > > >   sched: add max pipe profiles config in run time
> > > >   sched: rename tc3 params to best-effort tc
> > > >   sched: improve error log messages
> > > >   sched: improve doxygen comments
> > > >   net/softnic: add config flexibility to softnic tm
> > > >   test_sched: modify tests for config flexibility
> > > >   examples/ip_pipeline: add config flexibility to tm function
> > > >   examples/qos_sched: add tc and queue config flexibility
> > > >   sched: remove redundant macros
> > >
> > > Series-acked-by: Cristian Dumitrescu 
> > >
> > > See the replies on some individual patches for a few details that we
> > > should fix for RC3 if we cannot get them done in time for RC2.
> > 
> > I am waiting for a v6.
> > 
> Can these suggestions be fixed in RC3  as separate patch as they doesn't 
> change any functionality? 

No please, I prefer avoiding having too many fixes.
I already know in advance such code will have many fixes,
and you are a specialist to get things at the last minute.
And it is really late to close such change.
I feel that it is not ready for 19.08.
Please show us how you can fix things quickly.

Re: [dpdk-dev] [PATCH v5 00/11] sched: feature enhancements

[Singh, Jasvinder]

> -Original Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: Friday, July 19, 2019 12:41 PM
> To: Singh, Jasvinder 
> Cc: dev@dpdk.org; Dumitrescu, Cristian 
> Subject: Re: [dpdk-dev] [PATCH v5 00/11] sched: feature enhancements
> 
> 19/07/2019 13:16, Singh, Jasvinder:
> > From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > > 19/07/2019 00:57, Dumitrescu, Cristian:
> > > > > Jasvinder Singh (11):
> > > > >   sched: remove wrr from strict priority tc queues
> > > > >   sched: add config flexibility to tc queue sizes
> > > > >   sched: add max pipe profiles config in run time
> > > > >   sched: rename tc3 params to best-effort tc
> > > > >   sched: improve error log messages
> > > > >   sched: improve doxygen comments
> > > > >   net/softnic: add config flexibility to softnic tm
> > > > >   test_sched: modify tests for config flexibility
> > > > >   examples/ip_pipeline: add config flexibility to tm function
> > > > >   examples/qos_sched: add tc and queue config flexibility
> > > > >   sched: remove redundant macros
> > > >
> > > > Series-acked-by: Cristian Dumitrescu
> > > > 
> > > >
> > > > See the replies on some individual patches for a few details that
> > > > we should fix for RC3 if we cannot get them done in time for RC2.
> > >
> > > I am waiting for a v6.
> > >
> > Can these suggestions be fixed in RC3  as separate patch as they doesn't
> change any functionality?
> 
> No please, I prefer avoiding having too many fixes.
> I already know in advance such code will have many fixes, and you are a
> specialist to get things at the last minute.
> And it is really late to close such change.
> I feel that it is not ready for 19.08.
> Please show us how you can fix things quickly.
> 
Alright, will send you v6. 

Re: [dpdk-dev] [PATCH 00/22] bnxt patchset

[Ferruh Yigit]

On 7/18/2019 4:35 AM, Ajit Khaparde wrote:
> This patchset based on commit a164bb7c0a5ab3b100357cf56696c945fe28ab73
> contains bug fixes and an update to the HWRM API.
> Please apply.
> 
> Ajit Khaparde (1):
>   net/bnxt: update HWRM API to version 1.10.0.91
> 
> Kalesh AP (11):
>   net/bnxt: fix to handle error case during port start
>   net/bnxt: fix return value check of address mapping
>   net/bnxt: fix failure to add a MAC address
>   net/bnxt: fix an unconditional wait in link update
>   net/bnxt: fix setting primary MAC address
>   net/bnxt: fix failure path in dev init
>   net/bnxt: reset filters before registering interrupts
>   net/bnxt: fix error checking of FW commands
>   net/bnxt: fix to return standard error codes
>   net/bnxt: fix lock release on getting NVM info
>   net/bnxt: fix to correctly check result of HWRM command
> 
> Lance Richardson (8):
>   net/bnxt: use correct vnic default completion ring
>   net/bnxt: use dedicated cpr for async events
>   net/bnxt: retry irq callback deregistration
>   net/bnxt: use correct RSS table sizes
>   net/bnxt: fully initialize hwrm msgs for thor RSS cfg
>   net/bnxt: use correct number of RSS contexts for thor
>   net/bnxt: pass correct RSS table address for thor
>   net/bnxt: avoid overrun in get statistics
> 
> Santoshkumar Karanappa Rastapur (2):
>   net/bnxt: fix RSS disable issue for thor-based adapters
>   net/bnxt: fix MAC/VLAN filter allocation failure
> 


Hi Ajit,

All bnxt patches has been sent after rc1, and this one has been sent a day
before rc2. A believe you are aware that proposal deadline was "June 3, 2019".

I will still try to get them but most probably the patchset won't able to make
this release, fyi.

Regards,
ferruh

Re: [dpdk-dev] [PATCH 0/7] bnxt patches

[Ferruh Yigit]

On 7/19/2019 7:18 AM, Ajit Khaparde wrote:
> Patchset based after an earlier submission
> https://patchwork.dpdk.org/patch/56690/
> 
> This set mostly contains bug fixes, an update to the bnxt.rst doc
> and a adds a VF PCI device ID for Thor based network controller.
> 
> Please apply.
> 
> Ajit Khaparde (2):
>   net/bnxt: remove unnecessary interrupt disable
>   doc: update release information for bnxt
> 
> Kalesh AP (1):
>   net/bnxt: add new device id
> 
> Lance Richardson (1):
>   net/bnxt: disable vector mode Tx with VLAN offload
> 
> Rahul Gupta (1):
>   net/bnxt: fix interrupt rearm logic
> 
> Santoshkumar Karanappa Rastapur (1):
>   net/bnxt: use correct number of RSS contexts for thor
> 
> Stephen Hemminger (1):
>   net/bnxt: fix receive interrupt vector
> 

Same for this patchset, it has been sent to late in the release cycle, will be
considered for next release.

Regards,
ferruh

[dpdk-dev] [PATCH v2 03/10] crypto/nitrox: create Nitrox symmetric cryptodev

[Nagadheeraj Rottela]

Add Nitrox symmetric cryptodev with no operations. Cryptodev
operations will be added in the next set of patches. Also, registered
nitrox log type.

Signed-off-by: Nagadheeraj Rottela 
---
 drivers/crypto/nitrox/Makefile|  2 +
 drivers/crypto/nitrox/meson.build |  2 +
 drivers/crypto/nitrox/nitrox_device.c |  9 
 drivers/crypto/nitrox/nitrox_device.h |  6 +++
 drivers/crypto/nitrox/nitrox_logs.c   | 14 ++
 drivers/crypto/nitrox/nitrox_logs.h   | 16 +++
 drivers/crypto/nitrox/nitrox_sym.c| 83 +++
 drivers/crypto/nitrox/nitrox_sym.h| 13 ++
 8 files changed, 145 insertions(+)
 create mode 100644 drivers/crypto/nitrox/nitrox_logs.c
 create mode 100644 drivers/crypto/nitrox/nitrox_logs.h
 create mode 100644 drivers/crypto/nitrox/nitrox_sym.c
 create mode 100644 drivers/crypto/nitrox/nitrox_sym.h

diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
index bc0220964..06c96ccd7 100644
--- a/drivers/crypto/nitrox/Makefile
+++ b/drivers/crypto/nitrox/Makefile
@@ -25,5 +25,7 @@ LDLIBS += -lrte_cryptodev
 # library source files
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_logs.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/nitrox/meson.build 
b/drivers/crypto/nitrox/meson.build
index f1c96b84d..1277cf58e 100644
--- a/drivers/crypto/nitrox/meson.build
+++ b/drivers/crypto/nitrox/meson.build
@@ -11,4 +11,6 @@ allow_experimental_apis = true
 sources = files(
'nitrox_device.c',
'nitrox_hal.c',
+   'nitrox_logs.c',
+   'nitrox_sym.c',
)
diff --git a/drivers/crypto/nitrox/nitrox_device.c 
b/drivers/crypto/nitrox/nitrox_device.c
index 5628c6d8b..ec2aae588 100644
--- a/drivers/crypto/nitrox/nitrox_device.c
+++ b/drivers/crypto/nitrox/nitrox_device.c
@@ -6,6 +6,7 @@
 
 #include "nitrox_device.h"
 #include "nitrox_hal.h"
+#include "nitrox_sym.h"
 
 TAILQ_HEAD(ndev_list, nitrox_device);
 static struct ndev_list ndev_list = TAILQ_HEAD_INITIALIZER(ndev_list);
@@ -63,6 +64,7 @@ nitrox_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pdev)
 {
struct nitrox_device *ndev;
+   int err;
 
/* Nitrox CSR space */
if (!pdev->mem_resource[0].addr)
@@ -73,6 +75,12 @@ nitrox_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
return -ENOMEM;
 
ndev_init(ndev, pdev);
+   err = nitrox_sym_pmd_create(ndev);
+   if (err) {
+   ndev_release(ndev);
+   return err;
+   }
+
return 0;
 }
 
@@ -85,6 +93,7 @@ nitrox_pci_remove(struct rte_pci_device *pdev)
if (!ndev)
return -ENODEV;
 
+   nitrox_sym_pmd_destroy(ndev);
ndev_release(ndev);
return 0;
 }
diff --git a/drivers/crypto/nitrox/nitrox_device.h 
b/drivers/crypto/nitrox/nitrox_device.h
index 0d0167de2..82ba8b4e4 100644
--- a/drivers/crypto/nitrox/nitrox_device.h
+++ b/drivers/crypto/nitrox/nitrox_device.h
@@ -8,10 +8,16 @@
 #include 
 #include 
 
+#define NITROX_DEV_NAME_MAX_LEN RTE_CRYPTODEV_NAME_MAX_LEN
+
+struct nitrox_sym_device;
+
 struct nitrox_device {
TAILQ_ENTRY(nitrox_device) next;
struct rte_pci_device *pdev;
uint8_t *bar_addr;
+   struct nitrox_sym_device *sym_dev;
+   struct rte_device rte_sym_dev;
uint16_t nr_queues;
 };
 
diff --git a/drivers/crypto/nitrox/nitrox_logs.c 
b/drivers/crypto/nitrox/nitrox_logs.c
new file mode 100644
index 0..007056cb4
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_logs.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include 
+
+int nitrox_logtype;
+
+RTE_INIT(nitrox_init_log)
+{
+   nitrox_logtype = rte_log_register("pmd.crypto.nitrox");
+   if (nitrox_logtype >= 0)
+   rte_log_set_level(nitrox_logtype, RTE_LOG_NOTICE);
+}
diff --git a/drivers/crypto/nitrox/nitrox_logs.h 
b/drivers/crypto/nitrox/nitrox_logs.h
new file mode 100644
index 0..06fd21a95
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_logs.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _NITROX_LOGS_H_
+#define _NITROX_LOGS_H_
+
+#define LOG_PREFIX "NITROX: "
+
+extern int nitrox_logtype;
+
+#define NITROX_LOG(level, fmt, args...)
\
+   rte_log(RTE_LOG_ ## level, nitrox_logtype,  \
+   LOG_PREFIX "%s:%d " fmt, __func__, __LINE__, ## args)
+
+#endif /* _NITROX_LOGS_H_ */
diff --git a/drivers/crypto/nitrox/nitrox_sym.c 
b/drivers/crypto/nitrox/nitrox_sym.c
new file mode 100644
index 0..c72016dd0
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_sym.c
@@ -0,0 +1,8

[dpdk-dev] [PATCH v2 04/10] crypto/nitrox: add basic symmetric cryptodev operations

[Nagadheeraj Rottela]

Add the following cryptodev operations,
- dev_configure
- dev_start
- dev_stop
- dev_close
- dev_infos_get

Signed-off-by: Nagadheeraj Rottela 
---
 doc/guides/cryptodevs/features/nitrox.ini   | 38 
 doc/guides/cryptodevs/nitrox.rst| 37 +++
 drivers/crypto/nitrox/Makefile  |  1 +
 drivers/crypto/nitrox/meson.build   |  1 +
 drivers/crypto/nitrox/nitrox_sym.c  | 81 -
 drivers/crypto/nitrox/nitrox_sym_capabilities.c | 57 +
 drivers/crypto/nitrox/nitrox_sym_capabilities.h | 12 
 7 files changed, 226 insertions(+), 1 deletion(-)
 create mode 100644 doc/guides/cryptodevs/features/nitrox.ini
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.c
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.h

diff --git a/doc/guides/cryptodevs/features/nitrox.ini 
b/doc/guides/cryptodevs/features/nitrox.ini
new file mode 100644
index 0..9f9e2619c
--- /dev/null
+++ b/doc/guides/cryptodevs/features/nitrox.ini
@@ -0,0 +1,38 @@
+;
+; Supported features of the 'nitrox' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Symmetric crypto   = Y
+Sym operation chaining = Y
+HW Accelerated = Y
+In Place SGL   = Y
+OOP SGL In SGL Out = Y
+OOP SGL In LB  Out = Y
+OOP LB  In SGL Out = Y
+OOP LB  In LB  Out = Y
+
+;
+; Supported crypto algorithms of the 'nitrox' crypto driver.
+;
+[Cipher]
+AES CBC (128)  = Y
+AES CBC (192)  = Y
+AES CBC (256)  = Y
+
+;
+; Supported authentication algorithms of the 'nitrox' crypto driver.
+;
+[Auth]
+SHA1 HMAC= Y
+
+;
+; Supported AEAD algorithms of the 'nitrox' crypto driver.
+;
+[AEAD]
+
+;
+; Supported Asymmetric algorithms of the 'nitrox' crypto driver.
+;
+[Asymmetric]
diff --git a/doc/guides/cryptodevs/nitrox.rst b/doc/guides/cryptodevs/nitrox.rst
index b6b86dda5..c16a5e393 100644
--- a/doc/guides/cryptodevs/nitrox.rst
+++ b/doc/guides/cryptodevs/nitrox.rst
@@ -9,3 +9,40 @@ cryptographic operations to the NITROX V security processor. 
Detailed
 information about the NITROX V security processor can be obtained here:
 
 * 
https://www.marvell.com/security-solutions/nitrox-security-processors/nitrox-v/
+
+Features
+
+
+Nitrox crypto PMD has support for:
+
+Cipher algorithms:
+
+* ``RTE_CRYPTO_CIPHER_AES_CBC``
+
+Hash algorithms:
+
+* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
+
+Limitations
+---
+
+* AES_CBC Cipher Only combination is not supported.
+
+Installation
+
+
+For compiling the Nitrox crypto PMD, please check if the
+CONFIG_RTE_LIBRTE_PMD_NITROX setting is set to `y` in config/common_base file.
+
+* ``CONFIG_RTE_LIBRTE_PMD_NITROX=y``
+
+Initialization
+--
+
+Nitrox crypto PMD depend on Nitrox kernel PF driver being installed on the
+platform. Nitrox PF driver is required to create VF devices which will
+be used by the PMD. Each VF device can enable one cryptodev PMD.
+
+Nitrox kernel PF driver is available as part of CNN55XX-Driver SDK. The SDK
+and it's installation instructions can be obtained from:
+`Marvell Technical Documentation Portal `_.
diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
index 06c96ccd7..dedb74a34 100644
--- a/drivers/crypto/nitrox/Makefile
+++ b/drivers/crypto/nitrox/Makefile
@@ -27,5 +27,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_logs.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym_capabilities.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/nitrox/meson.build 
b/drivers/crypto/nitrox/meson.build
index 1277cf58e..7c565c5a4 100644
--- a/drivers/crypto/nitrox/meson.build
+++ b/drivers/crypto/nitrox/meson.build
@@ -13,4 +13,5 @@ sources = files(
'nitrox_hal.c',
'nitrox_logs.c',
'nitrox_sym.c',
+   'nitrox_sym_capabilities.c',
)
diff --git a/drivers/crypto/nitrox/nitrox_sym.c 
b/drivers/crypto/nitrox/nitrox_sym.c
index c72016dd0..c05042e54 100644
--- a/drivers/crypto/nitrox/nitrox_sym.c
+++ b/drivers/crypto/nitrox/nitrox_sym.c
@@ -9,6 +9,7 @@
 
 #include "nitrox_sym.h"
 #include "nitrox_device.h"
+#include "nitrox_sym_capabilities.h"
 #include "nitrox_logs.h"
 
 #define CRYPTODEV_NAME_NITROX_PMD crypto_nitrox
@@ -25,6 +26,84 @@ static const struct rte_driver nitrox_rte_sym_drv = {
.alias = nitrox_sym_drv_name
 };
 
+static int nitrox_sym_dev_qp_release(struct rte_cryptodev *cdev,
+uint16_t qp_id);
+
+static int
+nitrox_sym_dev_config(__rte_unused struct rte_cryptodev *cdev,
+ __rte_unused struct rte_cryptodev_config *config)
+{
+   return 0;
+}
+
+static int
+nitrox_sym_dev_start(__rte_unused struct rte_c

[dpdk-dev] [PATCH v2 00/10] add Nitrox crypto device support

[Nagadheeraj Rottela]

Add the Nitrox PMD to support Nitrox crypto device.
---
v2:
* Fix compilation error on AARCH64.
* Fix checkpatch warning "UNNECESSARY_ELSE: else is not generally
  useful after a break or return".

Nagadheeraj Rottela (10):
  crypto/nitrox: add Nitrox build and doc skeleton
  crypto/nitrox: add PCI probe and remove routines
  crypto/nitrox: create Nitrox symmetric cryptodev
  crypto/nitrox: add basic symmetric cryptodev operations
  crypto/nitrox: add software queue management functionality
  crypto/nitrox: add hardware queue management functionality
  crypto/nitrox: add session management operations
  crypto/nitrox: add burst enqueue and dequeue operations
  crypto/nitrox: add cipher auth crypto chain processing
  test/crypto: add tests for Nitrox PMD

 MAINTAINERS  |   7 +
 app/test/test_cryptodev.c|  52 ++
 app/test/test_cryptodev.h|   1 +
 app/test/test_cryptodev_aes_test_vectors.h   |  30 +-
 app/test/test_cryptodev_blockcipher.c|   9 +-
 app/test/test_cryptodev_blockcipher.h|   1 +
 config/common_base   |   5 +
 doc/guides/cryptodevs/features/nitrox.ini|  38 ++
 doc/guides/cryptodevs/index.rst  |   1 +
 doc/guides/cryptodevs/nitrox.rst |  48 ++
 drivers/crypto/Makefile  |   1 +
 drivers/crypto/meson.build   |   4 +-
 drivers/crypto/nitrox/Makefile   |  34 ++
 drivers/crypto/nitrox/meson.build|  19 +
 drivers/crypto/nitrox/nitrox_csr.h   |  41 ++
 drivers/crypto/nitrox/nitrox_device.c| 117 
 drivers/crypto/nitrox/nitrox_device.h|  24 +
 drivers/crypto/nitrox/nitrox_hal.c   | 237 
 drivers/crypto/nitrox/nitrox_hal.h   | 165 ++
 drivers/crypto/nitrox/nitrox_logs.c  |  14 +
 drivers/crypto/nitrox/nitrox_logs.h  |  16 +
 drivers/crypto/nitrox/nitrox_qp.c| 117 
 drivers/crypto/nitrox/nitrox_qp.h| 103 
 drivers/crypto/nitrox/nitrox_sym.c   | 716 +++
 drivers/crypto/nitrox/nitrox_sym.h   |  13 +
 drivers/crypto/nitrox/nitrox_sym_capabilities.c  |  57 ++
 drivers/crypto/nitrox/nitrox_sym_capabilities.h  |  12 +
 drivers/crypto/nitrox/nitrox_sym_ctx.h   |  85 +++
 drivers/crypto/nitrox/nitrox_sym_reqmgr.c| 653 +
 drivers/crypto/nitrox/nitrox_sym_reqmgr.h|  23 +
 drivers/crypto/nitrox/rte_pmd_nitrox_version.map |   3 +
 mk/rte.app.mk|   1 +
 32 files changed, 2634 insertions(+), 13 deletions(-)
 create mode 100644 doc/guides/cryptodevs/features/nitrox.ini
 create mode 100644 doc/guides/cryptodevs/nitrox.rst
 create mode 100644 drivers/crypto/nitrox/Makefile
 create mode 100644 drivers/crypto/nitrox/meson.build
 create mode 100644 drivers/crypto/nitrox/nitrox_csr.h
 create mode 100644 drivers/crypto/nitrox/nitrox_device.c
 create mode 100644 drivers/crypto/nitrox/nitrox_device.h
 create mode 100644 drivers/crypto/nitrox/nitrox_hal.c
 create mode 100644 drivers/crypto/nitrox/nitrox_hal.h
 create mode 100644 drivers/crypto/nitrox/nitrox_logs.c
 create mode 100644 drivers/crypto/nitrox/nitrox_logs.h
 create mode 100644 drivers/crypto/nitrox/nitrox_qp.c
 create mode 100644 drivers/crypto/nitrox/nitrox_qp.h
 create mode 100644 drivers/crypto/nitrox/nitrox_sym.c
 create mode 100644 drivers/crypto/nitrox/nitrox_sym.h
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.c
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.h
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_ctx.h
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_reqmgr.c
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_reqmgr.h
 create mode 100644 drivers/crypto/nitrox/rte_pmd_nitrox_version.map

-- 
2.13.6

[dpdk-dev] [PATCH v2 01/10] crypto/nitrox: add Nitrox build and doc skeleton

[Nagadheeraj Rottela]

Add bare minimum Nitrox PMD library and doc build infrastructure and
claim responsibility by updating the maintainers file.

Signed-off-by: Nagadheeraj Rottela 
---
 MAINTAINERS  |  7 ++
 config/common_base   |  5 +
 doc/guides/cryptodevs/index.rst  |  1 +
 doc/guides/cryptodevs/nitrox.rst | 11 ++
 drivers/crypto/Makefile  |  1 +
 drivers/crypto/meson.build   |  4 ++--
 drivers/crypto/nitrox/Makefile   | 28 
 drivers/crypto/nitrox/meson.build| 13 +++
 drivers/crypto/nitrox/nitrox_device.c|  3 +++
 drivers/crypto/nitrox/rte_pmd_nitrox_version.map |  3 +++
 mk/rte.app.mk|  1 +
 11 files changed, 75 insertions(+), 2 deletions(-)
 create mode 100644 doc/guides/cryptodevs/nitrox.rst
 create mode 100644 drivers/crypto/nitrox/Makefile
 create mode 100644 drivers/crypto/nitrox/meson.build
 create mode 100644 drivers/crypto/nitrox/nitrox_device.c
 create mode 100644 drivers/crypto/nitrox/rte_pmd_nitrox_version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index a984ab194..92a03bc7a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -964,6 +964,13 @@ F: drivers/crypto/mvsam/
 F: doc/guides/cryptodevs/mvsam.rst
 F: doc/guides/cryptodevs/features/mvsam.ini
 
+Nitrox
+M: Nagadheeraj Rottela 
+M: Srikanth Jampala 
+F: drivers/crypto/nitrox/
+F: doc/guides/cryptodevs/nitrox.rst
+F: doc/guides/cryptodevs/features/nitrox.ini
+
 Null Crypto
 M: Declan Doherty 
 F: drivers/crypto/null/
diff --git a/config/common_base b/config/common_base
index 8ef75c203..92ecb4a68 100644
--- a/config/common_base
+++ b/config/common_base
@@ -664,6 +664,11 @@ CONFIG_RTE_LIBRTE_PMD_CCP=n
 CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n
 
 #
+# Compile PMD for NITROX crypto device
+#
+CONFIG_RTE_LIBRTE_PMD_NITROX=y
+
+#
 # Compile generic security library
 #
 CONFIG_RTE_LIBRTE_SECURITY=y
diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst
index 83610e64f..d1e0d3203 100644
--- a/doc/guides/cryptodevs/index.rst
+++ b/doc/guides/cryptodevs/index.rst
@@ -21,6 +21,7 @@ Crypto Device Drivers
 octeontx
 openssl
 mvsam
+nitrox
 null
 scheduler
 snow3g
diff --git a/doc/guides/cryptodevs/nitrox.rst b/doc/guides/cryptodevs/nitrox.rst
new file mode 100644
index 0..b6b86dda5
--- /dev/null
+++ b/doc/guides/cryptodevs/nitrox.rst
@@ -0,0 +1,11 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(C) 2019 Marvell International Ltd.
+
+Nitrox Crypto Poll Mode Driver
+==
+
+The Nitrox crypto poll mode driver provides support for offloading
+cryptographic operations to the NITROX V security processor. Detailed
+information about the NITROX V security processor can be obtained here:
+
+* 
https://www.marvell.com/security-solutions/nitrox-security-processors/nitrox-v/
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 009f8443d..7129bcfc9 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -25,5 +25,6 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_CAAM_JR) += caam_jr
 endif # CONFIG_RTE_LIBRTE_PMD_DPAA_SEC
 endif # CONFIG_RTE_LIBRTE_SECURITY
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO) += virtio
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox
 
 include $(RTE_SDK)/mk/rte.subdir.mk
diff --git a/drivers/crypto/meson.build b/drivers/crypto/meson.build
index 83e78860e..1a358ff8b 100644
--- a/drivers/crypto/meson.build
+++ b/drivers/crypto/meson.build
@@ -2,8 +2,8 @@
 # Copyright(c) 2017 Intel Corporation
 
 drivers = ['aesni_gcm', 'aesni_mb', 'caam_jr', 'ccp', 'dpaa_sec', 'dpaa2_sec',
-   'kasumi', 'mvsam', 'null', 'octeontx', 'openssl', 'qat', 'scheduler',
-   'snow3g', 'virtio', 'zuc']
+   'kasumi', 'mvsam', 'nitrox', 'null', 'octeontx', 'openssl', 'qat',
+   'scheduler', 'snow3g', 'virtio', 'zuc']
 
 std_deps = ['cryptodev'] # cryptodev pulls in all other needed deps
 config_flag_fmt = 'RTE_LIBRTE_@0@_PMD'
diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
new file mode 100644
index 0..da33a1d2a
--- /dev/null
+++ b/drivers/crypto/nitrox/Makefile
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# library name
+LIB = librte_pmd_nitrox.a
+
+# build flags
+CFLAGS += -O3
+CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
+
+# library version
+LIBABIVER := 1
+
+# versioning export map
+EXPORT_MAP := rte_pmd_nitrox_version.map
+
+# external library dependencies
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool
+LDLIBS += -lrte_pci -lrte_bus_pci
+LDLIBS += -lrte_cryptodev
+
+# library source files
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_device.c
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/nitrox/meson.build 
b/drivers/crypto/nitrox/me

[dpdk-dev] [PATCH v2 02/10] crypto/nitrox: add PCI probe and remove routines

[Nagadheeraj Rottela]

Add pci probe, remove and hardware init routines.

Signed-off-by: Nagadheeraj Rottela 
---
 drivers/crypto/nitrox/Makefile|   1 +
 drivers/crypto/nitrox/meson.build |   1 +
 drivers/crypto/nitrox/nitrox_csr.h|  28 +
 drivers/crypto/nitrox/nitrox_device.c | 105 ++
 drivers/crypto/nitrox/nitrox_device.h |  18 ++
 drivers/crypto/nitrox/nitrox_hal.c|  86 
 drivers/crypto/nitrox/nitrox_hal.h|  37 
 7 files changed, 276 insertions(+)
 create mode 100644 drivers/crypto/nitrox/nitrox_csr.h
 create mode 100644 drivers/crypto/nitrox/nitrox_device.h
 create mode 100644 drivers/crypto/nitrox/nitrox_hal.c
 create mode 100644 drivers/crypto/nitrox/nitrox_hal.h

diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
index da33a1d2a..bc0220964 100644
--- a/drivers/crypto/nitrox/Makefile
+++ b/drivers/crypto/nitrox/Makefile
@@ -24,5 +24,6 @@ LDLIBS += -lrte_cryptodev
 
 # library source files
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_device.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/nitrox/meson.build 
b/drivers/crypto/nitrox/meson.build
index 0afb14b00..f1c96b84d 100644
--- a/drivers/crypto/nitrox/meson.build
+++ b/drivers/crypto/nitrox/meson.build
@@ -10,4 +10,5 @@ deps += ['bus_pci']
 allow_experimental_apis = true
 sources = files(
'nitrox_device.c',
+   'nitrox_hal.c',
)
diff --git a/drivers/crypto/nitrox/nitrox_csr.h 
b/drivers/crypto/nitrox/nitrox_csr.h
new file mode 100644
index 0..879104515
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_csr.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _NITROX_CSR_H_
+#define _NITROX_CSR_H_
+
+#include 
+#include 
+
+#define CSR_DELAY  30
+
+/* AQM Virtual Function Registers */
+#define AQMQ_QSZX(_i)  (0x20008 + ((_i)*0x4))
+
+static inline uint64_t
+nitrox_read_csr(uint8_t *bar_addr, uint64_t offset)
+{
+   return rte_read64(bar_addr + offset);
+}
+
+static inline void
+nitrox_write_csr(uint8_t *bar_addr, uint64_t offset, uint64_t value)
+{
+   rte_write64(value, (bar_addr + offset));
+}
+
+#endif /* _NITROX_CSR_H_ */
diff --git a/drivers/crypto/nitrox/nitrox_device.c 
b/drivers/crypto/nitrox/nitrox_device.c
index d26535dee..5628c6d8b 100644
--- a/drivers/crypto/nitrox/nitrox_device.c
+++ b/drivers/crypto/nitrox/nitrox_device.c
@@ -1,3 +1,108 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(C) 2019 Marvell International Ltd.
  */
+
+#include 
+
+#include "nitrox_device.h"
+#include "nitrox_hal.h"
+
+TAILQ_HEAD(ndev_list, nitrox_device);
+static struct ndev_list ndev_list = TAILQ_HEAD_INITIALIZER(ndev_list);
+
+static struct nitrox_device *
+ndev_allocate(struct rte_pci_device *pdev)
+{
+   struct nitrox_device *ndev;
+
+   ndev = rte_zmalloc_socket("nitrox device", sizeof(*ndev),
+  RTE_CACHE_LINE_SIZE,
+  pdev->device.numa_node);
+   if (!ndev)
+   return NULL;
+
+   TAILQ_INSERT_TAIL(&ndev_list, ndev, next);
+   return ndev;
+}
+
+static void
+ndev_init(struct nitrox_device *ndev, struct rte_pci_device *pdev)
+{
+   enum nitrox_vf_mode vf_mode;
+
+   ndev->pdev = pdev;
+   ndev->bar_addr = pdev->mem_resource[0].addr;
+   vf_mode = vf_get_vf_config_mode(ndev->bar_addr);
+   ndev->nr_queues = vf_config_mode_to_nr_queues(vf_mode);
+}
+
+static struct nitrox_device *
+find_ndev(struct rte_pci_device *pdev)
+{
+   struct nitrox_device *ndev;
+
+   TAILQ_FOREACH(ndev, &ndev_list, next)
+   if (ndev->pdev == pdev)
+   return ndev;
+
+   return NULL;
+}
+
+static void
+ndev_release(struct nitrox_device *ndev)
+{
+   if (!ndev)
+   return;
+
+   TAILQ_REMOVE(&ndev_list, ndev, next);
+   rte_free(ndev);
+}
+
+static int
+nitrox_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
+   struct rte_pci_device *pdev)
+{
+   struct nitrox_device *ndev;
+
+   /* Nitrox CSR space */
+   if (!pdev->mem_resource[0].addr)
+   return -EINVAL;
+
+   ndev = ndev_allocate(pdev);
+   if (!ndev)
+   return -ENOMEM;
+
+   ndev_init(ndev, pdev);
+   return 0;
+}
+
+static int
+nitrox_pci_remove(struct rte_pci_device *pdev)
+{
+   struct nitrox_device *ndev;
+
+   ndev = find_ndev(pdev);
+   if (!ndev)
+   return -ENODEV;
+
+   ndev_release(ndev);
+   return 0;
+}
+
+static struct rte_pci_id pci_id_nitrox_map[] = {
+   {
+   /* Nitrox 5 VF */
+   RTE_PCI_DEVICE(0x177d, 0x13)
+   },
+   {.device_id = 0},
+};
+
+static struct rte_pci_driver nitrox_pmd = {
+   .id_table   = pci_id_nitrox_map,
+   .drv_fla

[dpdk-dev] [PATCH v2 06/10] crypto/nitrox: add hardware queue management functionality

[Nagadheeraj Rottela]

Add hardware queue management code corresponding to queue pair setup
and release functions.

Signed-off-by: Nagadheeraj Rottela 
---
 drivers/crypto/nitrox/nitrox_csr.h |  13 
 drivers/crypto/nitrox/nitrox_hal.c | 151 +
 drivers/crypto/nitrox/nitrox_hal.h | 128 +++
 drivers/crypto/nitrox/nitrox_qp.c  |  51 -
 drivers/crypto/nitrox/nitrox_qp.h  |   8 ++
 5 files changed, 347 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/nitrox/nitrox_csr.h 
b/drivers/crypto/nitrox/nitrox_csr.h
index 879104515..fb9a34817 100644
--- a/drivers/crypto/nitrox/nitrox_csr.h
+++ b/drivers/crypto/nitrox/nitrox_csr.h
@@ -9,6 +9,19 @@
 #include 
 
 #define CSR_DELAY  30
+#define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset))
+
+/* NPS packet registers */
+#define NPS_PKT_IN_INSTR_CTLX(_i)  (0x10060 + ((_i) * 0x4))
+#define NPS_PKT_IN_INSTR_BADDRX(_i)(0x10068 + ((_i) * 0x4))
+#define NPS_PKT_IN_INSTR_RSIZEX(_i)(0x10070 + ((_i) * 0x4))
+#define NPS_PKT_IN_DONE_CNTSX(_i)  (0x10080 + ((_i) * 0x4))
+#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)  (0x10078 + ((_i) * 0x4))
+#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088 + ((_i) * 0x4))
+
+#define NPS_PKT_SLC_CTLX(_i)   (0x1 + ((_i) * 0x4))
+#define NPS_PKT_SLC_CNTSX(_i)  (0x10008 + ((_i) * 0x4))
+#define NPS_PKT_SLC_INT_LEVELSX(_i)(0x10010 + ((_i) * 0x4))
 
 /* AQM Virtual Function Registers */
 #define AQMQ_QSZX(_i)  (0x20008 + ((_i)*0x4))
diff --git a/drivers/crypto/nitrox/nitrox_hal.c 
b/drivers/crypto/nitrox/nitrox_hal.c
index 3dee59215..3c2c24c23 100644
--- a/drivers/crypto/nitrox/nitrox_hal.c
+++ b/drivers/crypto/nitrox/nitrox_hal.c
@@ -12,6 +12,157 @@
 
 #define MAX_VF_QUEUES  8
 #define MAX_PF_QUEUES  64
+#define NITROX_TIMER_THOLD 0x3F
+#define NITROX_COUNT_THOLD  0x
+
+void
+nps_pkt_input_ring_disable(uint8_t *bar_addr, uint16_t ring)
+{
+   union nps_pkt_in_instr_ctl pkt_in_instr_ctl;
+   uint64_t reg_addr;
+   int max_retries = 5;
+
+   reg_addr = NPS_PKT_IN_INSTR_CTLX(ring);
+   pkt_in_instr_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr);
+   pkt_in_instr_ctl.s.enb = 0;
+   nitrox_write_csr(bar_addr, reg_addr, pkt_in_instr_ctl.u64);
+   rte_delay_us_block(100);
+
+   /* wait for enable bit to be cleared */
+   pkt_in_instr_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr);
+   while (pkt_in_instr_ctl.s.enb && max_retries--) {
+   rte_delay_ms(10);
+   pkt_in_instr_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr);
+   }
+}
+
+void
+nps_pkt_solicited_port_disable(uint8_t *bar_addr, uint16_t port)
+{
+   union nps_pkt_slc_ctl pkt_slc_ctl;
+   uint64_t reg_addr;
+   int max_retries = 5;
+
+   /* clear enable bit */
+   reg_addr = NPS_PKT_SLC_CTLX(port);
+   pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr);
+   pkt_slc_ctl.s.enb = 0;
+   nitrox_write_csr(bar_addr, reg_addr, pkt_slc_ctl.u64);
+   rte_delay_us_block(100);
+
+   pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr);
+   while (pkt_slc_ctl.s.enb && max_retries--) {
+   rte_delay_ms(10);
+   pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr);
+   }
+}
+
+void
+setup_nps_pkt_input_ring(uint8_t *bar_addr, uint16_t ring, uint32_t rsize,
+phys_addr_t raddr)
+{
+   union nps_pkt_in_instr_ctl pkt_in_instr_ctl;
+   union nps_pkt_in_instr_rsize pkt_in_instr_rsize;
+   union nps_pkt_in_instr_baoff_dbell pkt_in_instr_baoff_dbell;
+   union nps_pkt_in_done_cnts pkt_in_done_cnts;
+   uint64_t base_addr, reg_addr;
+   int max_retries = 5;
+
+   nps_pkt_input_ring_disable(bar_addr, ring);
+
+   /* write base address */
+   reg_addr = NPS_PKT_IN_INSTR_BADDRX(ring);
+   base_addr = raddr;
+   nitrox_write_csr(bar_addr, reg_addr, base_addr);
+   rte_delay_us_block(CSR_DELAY);
+
+   /* write ring size */
+   reg_addr = NPS_PKT_IN_INSTR_RSIZEX(ring);
+   pkt_in_instr_rsize.u64 = 0;
+   pkt_in_instr_rsize.s.rsize = rsize;
+   nitrox_write_csr(bar_addr, reg_addr, pkt_in_instr_rsize.u64);
+   rte_delay_us_block(CSR_DELAY);
+
+   /* clear door bell */
+   reg_addr = NPS_PKT_IN_INSTR_BAOFF_DBELLX(ring);
+   pkt_in_instr_baoff_dbell.u64 = 0;
+   pkt_in_instr_baoff_dbell.s.dbell = 0x;
+   nitrox_write_csr(bar_addr, reg_addr, pkt_in_instr_baoff_dbell.u64);
+   rte_delay_us_block(CSR_DELAY);
+
+   /* clear done count */
+   reg_addr = NPS_PKT_IN_DONE_CNTSX(ring);
+   pkt_in_done_cnts.u64 = nitrox_read_csr(bar_addr, reg_addr);
+   nitrox_write_csr(bar_addr, reg_addr, pkt_in_done_cnts.u64);
+   rte_delay_us_block(CSR_DELAY);
+
+   /* Setup PKT IN RING Interrupt Threshold */
+   reg_addr = NPS_PKT_IN_INT_LEVELSX(ring);
+   nitro

[dpdk-dev] [PATCH v2 05/10] crypto/nitrox: add software queue management functionality

[Nagadheeraj Rottela]

Add software queue management code corresponding to queue pair setup
and release functions.

Signed-off-by: Nagadheeraj Rottela 
---
 drivers/crypto/nitrox/Makefile|   2 +
 drivers/crypto/nitrox/meson.build |   2 +
 drivers/crypto/nitrox/nitrox_qp.c |  74 +
 drivers/crypto/nitrox/nitrox_qp.h |  40 +
 drivers/crypto/nitrox/nitrox_sym.c| 132 --
 drivers/crypto/nitrox/nitrox_sym_reqmgr.c |  56 +
 drivers/crypto/nitrox/nitrox_sym_reqmgr.h |  13 +++
 7 files changed, 312 insertions(+), 7 deletions(-)
 create mode 100644 drivers/crypto/nitrox/nitrox_qp.c
 create mode 100644 drivers/crypto/nitrox/nitrox_qp.h
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_reqmgr.c
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_reqmgr.h

diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
index dedb74a34..f56992770 100644
--- a/drivers/crypto/nitrox/Makefile
+++ b/drivers/crypto/nitrox/Makefile
@@ -28,5 +28,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_logs.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym_capabilities.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym_reqmgr.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_qp.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/nitrox/meson.build 
b/drivers/crypto/nitrox/meson.build
index 7c565c5a4..03788366b 100644
--- a/drivers/crypto/nitrox/meson.build
+++ b/drivers/crypto/nitrox/meson.build
@@ -14,4 +14,6 @@ sources = files(
'nitrox_logs.c',
'nitrox_sym.c',
'nitrox_sym_capabilities.c',
+   'nitrox_sym_reqmgr.c',
+   'nitrox_qp.c'
)
diff --git a/drivers/crypto/nitrox/nitrox_qp.c 
b/drivers/crypto/nitrox/nitrox_qp.c
new file mode 100644
index 0..9673bb4f3
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_qp.c
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include 
+#include 
+
+#include "nitrox_qp.h"
+#include "nitrox_hal.h"
+#include "nitrox_logs.h"
+
+#define MAX_CMD_QLEN 16384
+
+static int
+nitrox_setup_ridq(struct nitrox_qp *qp, int socket_id)
+{
+   size_t ridq_size = qp->count * sizeof(*qp->ridq);
+
+   qp->ridq = rte_zmalloc_socket("nitrox ridq", ridq_size,
+  RTE_CACHE_LINE_SIZE,
+  socket_id);
+   if (!qp->ridq) {
+   NITROX_LOG(ERR, "Failed to create rid queue\n");
+   return -ENOMEM;
+   }
+
+   return 0;
+}
+
+int
+nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr, const char *dev_name,
+   uint32_t nb_descriptors, uint8_t instr_size, int socket_id)
+{
+   int err;
+   uint32_t count;
+
+   RTE_SET_USED(bar_addr);
+   RTE_SET_USED(instr_size);
+   count = rte_align32pow2(nb_descriptors);
+   if (count > MAX_CMD_QLEN) {
+   NITROX_LOG(ERR, "%s: Number of descriptors too big %d,"
+  " greater than max queue length %d\n",
+  dev_name, count,
+  MAX_CMD_QLEN);
+   return -EINVAL;
+   }
+
+   qp->count = count;
+   qp->head = qp->tail = 0;
+   rte_atomic16_init(&qp->pending_count);
+   err = nitrox_setup_ridq(qp, socket_id);
+   if (err)
+   goto ridq_err;
+
+   return 0;
+
+ridq_err:
+   return err;
+
+}
+
+static void
+nitrox_release_ridq(struct nitrox_qp *qp)
+{
+   rte_free(qp->ridq);
+}
+
+int
+nitrox_qp_release(struct nitrox_qp *qp, uint8_t *bar_addr)
+{
+   RTE_SET_USED(bar_addr);
+   nitrox_release_ridq(qp);
+   return 0;
+}
diff --git a/drivers/crypto/nitrox/nitrox_qp.h 
b/drivers/crypto/nitrox/nitrox_qp.h
new file mode 100644
index 0..cf0102ff9
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_qp.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _NITROX_QP_H_
+#define _NITROX_QP_H_
+
+#include 
+
+#include 
+
+struct nitrox_softreq;
+
+struct rid {
+   struct nitrox_softreq *sr;
+};
+
+struct nitrox_qp {
+   struct rid *ridq;
+   uint32_t count;
+   uint32_t head;
+   uint32_t tail;
+   struct rte_mempool *sr_mp;
+   struct rte_cryptodev_stats stats;
+   uint16_t qno;
+   rte_atomic16_t pending_count;
+};
+
+static inline bool
+nitrox_qp_is_empty(struct nitrox_qp *qp)
+{
+   return (rte_atomic16_read(&qp->pending_count) == 0);
+}
+
+int nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr,
+   const char *dev_name, uint32_t nb_descriptors,
+   uint8_t inst_size, int socket_id);
+int nitrox_qp_release(struct nitrox_qp *qp, uint8_t *bar_addr);
+
+#endif /* _NITROX_QP_H_ *

[dpdk-dev] [PATCH v2 07/10] crypto/nitrox: add session management operations

[Nagadheeraj Rottela]

Add all the session management operations.

Signed-off-by: Nagadheeraj Rottela 
---
 drivers/crypto/nitrox/nitrox_sym.c | 323 -
 drivers/crypto/nitrox/nitrox_sym_ctx.h |  85 +
 2 files changed, 405 insertions(+), 3 deletions(-)
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_ctx.h

diff --git a/drivers/crypto/nitrox/nitrox_sym.c 
b/drivers/crypto/nitrox/nitrox_sym.c
index 05f089cae..34c62b02e 100644
--- a/drivers/crypto/nitrox/nitrox_sym.c
+++ b/drivers/crypto/nitrox/nitrox_sym.c
@@ -12,16 +12,54 @@
 #include "nitrox_sym_capabilities.h"
 #include "nitrox_qp.h"
 #include "nitrox_sym_reqmgr.h"
+#include "nitrox_sym_ctx.h"
 #include "nitrox_logs.h"
 
 #define CRYPTODEV_NAME_NITROX_PMD crypto_nitrox
+#define MC_MAC_MISMATCH_ERR_CODE 0x4c
 #define NPS_PKT_IN_INSTR_SIZE 64
+#define IV_FROM_DPTR 1
+#define FLEXI_CRYPTO_ENCRYPT_HMAC 0x33
+#define AES_KEYSIZE_128 16
+#define AES_KEYSIZE_192 24
+#define AES_KEYSIZE_256 32
+#define MAX_IV_LEN 16
 
 struct nitrox_sym_device {
struct rte_cryptodev *cdev;
struct nitrox_device *ndev;
 };
 
+/* Cipher opcodes */
+enum flexi_cipher {
+   CIPHER_NULL = 0,
+   CIPHER_3DES_CBC,
+   CIPHER_3DES_ECB,
+   CIPHER_AES_CBC,
+   CIPHER_AES_ECB,
+   CIPHER_AES_CFB,
+   CIPHER_AES_CTR,
+   CIPHER_AES_GCM,
+   CIPHER_AES_XTS,
+   CIPHER_AES_CCM,
+   CIPHER_AES_CBC_CTS,
+   CIPHER_AES_ECB_CTS,
+   CIPHER_INVALID
+};
+
+/* Auth opcodes */
+enum flexi_auth {
+   AUTH_NULL = 0,
+   AUTH_MD5,
+   AUTH_SHA1,
+   AUTH_SHA2_SHA224,
+   AUTH_SHA2_SHA256,
+   AUTH_SHA2_SHA384,
+   AUTH_SHA2_SHA512,
+   AUTH_GMAC,
+   AUTH_INVALID
+};
+
 uint8_t nitrox_sym_drv_id;
 static const char nitrox_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_NITROX_PMD);
 static const struct rte_driver nitrox_rte_sym_drv = {
@@ -204,6 +242,285 @@ nitrox_sym_dev_qp_release(struct rte_cryptodev *cdev, 
uint16_t qp_id)
return err;
 }
 
+static unsigned int
+nitrox_sym_dev_sess_get_size(__rte_unused struct rte_cryptodev *cdev)
+{
+   return sizeof(struct nitrox_crypto_ctx);
+}
+
+static enum nitrox_chain
+get_crypto_chain_order(const struct rte_crypto_sym_xform *xform)
+{
+   enum nitrox_chain res = NITROX_CHAIN_NOT_SUPPORTED;
+
+   if (unlikely(xform == NULL))
+   return res;
+
+   switch (xform->type) {
+   case RTE_CRYPTO_SYM_XFORM_AUTH:
+   if (xform->next == NULL) {
+   res = NITROX_CHAIN_NOT_SUPPORTED;
+   } else if (xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
+   if (xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY &&
+   xform->next->cipher.op ==
+   RTE_CRYPTO_CIPHER_OP_DECRYPT) {
+   res = NITROX_CHAIN_AUTH_CIPHER;
+   } else {
+   NITROX_LOG(ERR, "auth op %d, cipher op %d\n",
+   xform->auth.op, xform->next->cipher.op);
+   }
+   }
+   break;
+   case RTE_CRYPTO_SYM_XFORM_CIPHER:
+   if (xform->next == NULL) {
+   res = NITROX_CHAIN_CIPHER_ONLY;
+   } else if (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
+   if (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
+   xform->next->auth.op ==
+   RTE_CRYPTO_AUTH_OP_GENERATE) {
+   res = NITROX_CHAIN_CIPHER_AUTH;
+   } else {
+   NITROX_LOG(ERR, "cipher op %d, auth op %d\n",
+   xform->cipher.op, xform->next->auth.op);
+   }
+   }
+   break;
+   default:
+   break;
+   }
+
+   return res;
+}
+
+static enum flexi_cipher
+get_flexi_cipher_type(enum rte_crypto_cipher_algorithm algo, bool *is_aes)
+{
+   enum flexi_cipher type;
+
+   switch (algo) {
+   case RTE_CRYPTO_CIPHER_AES_CBC:
+   type = CIPHER_AES_CBC;
+   *is_aes = true;
+   break;
+   default:
+   type = CIPHER_INVALID;
+   NITROX_LOG(ERR, "Algorithm not supported %d\n", algo);
+   break;
+   }
+
+   return type;
+}
+
+static int
+flexi_aes_keylen(size_t keylen, bool is_aes)
+{
+   int aes_keylen;
+
+   if (!is_aes)
+   return 0;
+
+   switch (keylen) {
+   case AES_KEYSIZE_128:
+   aes_keylen = 1;
+   break;
+   case AES_KEYSIZE_192:
+   aes_keylen = 2;
+   break;
+   case AES_KEYSIZE_256:
+   aes_keylen = 3;
+   break;
+   default:
+   NITROX_LOG(ERR, "Invalid keylen %zu\n", keylen);
+   aes_keylen = -EINVAL;
+   break;
+   }
+

[dpdk-dev] [PATCH v2 09/10] crypto/nitrox: add cipher auth crypto chain processing

[Nagadheeraj Rottela]

Add cipher auth crypto chain processing functionality in symmetric
request manager.

Signed-off-by: Nagadheeraj Rottela 
---
 drivers/crypto/nitrox/nitrox_sym_reqmgr.c | 427 +-
 1 file changed, 425 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c 
b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c
index a37b754f2..968e74fbe 100644
--- a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c
+++ b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c
@@ -10,9 +10,24 @@
 #include "nitrox_sym_reqmgr.h"
 #include "nitrox_logs.h"
 
+#define MAX_SGBUF_CNT 16
+#define MAX_SGCOMP_CNT 5
+/* SLC_STORE_INFO */
+#define MIN_UDD_LEN 16
+/* PKT_IN_HDR + SLC_STORE_INFO */
+#define FDATA_SIZE 32
+/* Base destination port for the solicited requests */
+#define SOLICIT_BASE_DPORT 256
 #define PENDING_SIG 0xUL
 #define CMD_TIMEOUT 2
 
+struct gphdr {
+   uint16_t param0;
+   uint16_t param1;
+   uint16_t param2;
+   uint16_t param3;
+};
+
 union pkt_instr_hdr {
uint64_t value;
struct {
@@ -105,12 +120,46 @@ struct resp_hdr {
uint64_t completion;
 };
 
+struct nitrox_sglist {
+   uint16_t len;
+   uint16_t raz0;
+   uint32_t raz1;
+   rte_iova_t iova;
+   void *virt;
+};
+
+struct nitrox_sgcomp {
+   uint16_t len[4];
+   uint64_t iova[4];
+};
+
+struct nitrox_sgtable {
+   uint8_t map_bufs_cnt;
+   uint8_t nr_sgcomp;
+   uint16_t total_bytes;
+
+   struct nitrox_sglist sglist[MAX_SGBUF_CNT];
+   struct nitrox_sgcomp sgcomp[MAX_SGCOMP_CNT];
+};
+
+struct iv {
+   uint8_t *virt;
+   rte_iova_t iova;
+   uint16_t len;
+};
+
 struct nitrox_softreq {
struct nitrox_crypto_ctx *ctx;
struct rte_crypto_op *op;
+   struct gphdr gph;
struct nps_pkt_instr instr;
struct resp_hdr resp;
+   struct nitrox_sgtable in;
+   struct nitrox_sgtable out;
+   struct iv iv;
uint64_t timeout;
+   rte_iova_t dptr;
+   rte_iova_t rptr;
rte_iova_t iova;
 };
 
@@ -121,10 +170,383 @@ softreq_init(struct nitrox_softreq *sr, rte_iova_t iova)
sr->iova = iova;
 }
 
+/*
+ * 64-Byte Instruction Format
+ *
+ *  --
+ *  |  DPTR0 | 8 bytes
+ *  --
+ *  |  PKT_IN_INSTR_HDR  | 8 bytes
+ *  --
+ *  |PKT_IN_HDR  | 16 bytes
+ *  --
+ *  |SLC_INFO| 16 bytes
+ *  --
+ *  |   Front data   | 16 bytes
+ *  --
+ */
+static void
+create_se_instr(struct nitrox_softreq *sr, uint8_t qno)
+{
+   struct nitrox_crypto_ctx *ctx = sr->ctx;
+   rte_iova_t ctx_handle;
+
+   /* fill the packet instruction */
+   /* word 0 */
+   sr->instr.dptr0 = rte_cpu_to_be_64(sr->dptr);
+
+   /* word 1 */
+   sr->instr.ih.value = 0;
+   sr->instr.ih.s.g = 1;
+   sr->instr.ih.s.gsz = sr->in.map_bufs_cnt;
+   sr->instr.ih.s.ssz = sr->out.map_bufs_cnt;
+   sr->instr.ih.s.fsz = FDATA_SIZE + sizeof(struct gphdr);
+   sr->instr.ih.s.tlen = sr->instr.ih.s.fsz + sr->in.total_bytes;
+   sr->instr.ih.value = rte_cpu_to_be_64(sr->instr.ih.value);
+
+   /* word 2 */
+   sr->instr.irh.value[0] = 0;
+   sr->instr.irh.s.uddl = MIN_UDD_LEN;
+   /* context length in 64-bit words */
+   sr->instr.irh.s.ctxl = RTE_ALIGN_MUL_CEIL(sizeof(ctx->fctx), 8) / 8;
+   /* offset from solicit base port 256 */
+   sr->instr.irh.s.destport = SOLICIT_BASE_DPORT + qno;
+   /* Invalid context cache */
+   sr->instr.irh.s.ctxc = 0x3;
+   sr->instr.irh.s.arg = ctx->req_op;
+   sr->instr.irh.s.opcode = ctx->opcode;
+   sr->instr.irh.value[0] = rte_cpu_to_be_64(sr->instr.irh.value[0]);
+
+   /* word 3 */
+   ctx_handle = ctx->iova + offsetof(struct nitrox_crypto_ctx, fctx);
+   sr->instr.irh.s.ctxp = rte_cpu_to_be_64(ctx_handle);
+
+   /* word 4 */
+   sr->instr.slc.value[0] = 0;
+   sr->instr.slc.s.ssz = sr->out.map_bufs_cnt;
+   sr->instr.slc.value[0] = rte_cpu_to_be_64(sr->instr.slc.value[0]);
+
+   /* word 5 */
+   sr->instr.slc.s.rptr = rte_cpu_to_be_64(sr->rptr);
+   /*
+* No conversion for front data,
+* It goes into payload
+* put GP Header in front data
+*/
+   memcpy(&sr->instr.fdata[0], &sr->gph, sizeof(sr->instr.fdata[0]));
+   sr->instr.fdata[1] = 0;
+   /* flush the soft_req changes before posting the cmd */
+   rte_wmb();
+}
+
+static void
+softreq_copy_iv(struct nitrox_softreq *sr)
+{
+   sr->iv.virt = rte_crypto_op_ctod_offset(sr->op, uint8_t *,
+   sr->ctx->iv.offset);
+   sr->iv.iova = rte_crypto_op_ctophys_offset(sr->op, sr->ctx->iv.offset);
+   sr->iv.len = sr->ctx->iv.length;
+}
+
+static int
+extract_cipher_auth_digest(struct nitrox_softreq *sr,
+  struct nitrox_sglist *diges

[dpdk-dev] [PATCH v2 08/10] crypto/nitrox: add burst enqueue and dequeue operations

[Nagadheeraj Rottela]

Add burst enqueue and dequeue operations along with interface for
symmetric request manager.

Signed-off-by: Nagadheeraj Rottela 
---
 drivers/crypto/nitrox/nitrox_qp.h |  55 ++
 drivers/crypto/nitrox/nitrox_sym.c| 123 -
 drivers/crypto/nitrox/nitrox_sym_reqmgr.c | 174 ++
 drivers/crypto/nitrox/nitrox_sym_reqmgr.h |  10 ++
 4 files changed, 360 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/nitrox/nitrox_qp.h 
b/drivers/crypto/nitrox/nitrox_qp.h
index 0244c4dbf..645fa8925 100644
--- a/drivers/crypto/nitrox/nitrox_qp.h
+++ b/drivers/crypto/nitrox/nitrox_qp.h
@@ -34,12 +34,67 @@ struct nitrox_qp {
rte_atomic16_t pending_count;
 };
 
+static inline uint16_t
+nitrox_qp_free_count(struct nitrox_qp *qp)
+{
+   uint16_t pending_count = rte_atomic16_read(&qp->pending_count);
+
+   RTE_ASSERT(qp->count >= pending_count);
+   return (qp->count - pending_count);
+}
+
 static inline bool
 nitrox_qp_is_empty(struct nitrox_qp *qp)
 {
return (rte_atomic16_read(&qp->pending_count) == 0);
 }
 
+static inline uint16_t
+nitrox_qp_used_count(struct nitrox_qp *qp)
+{
+   return rte_atomic16_read(&qp->pending_count);
+}
+
+static inline struct nitrox_softreq *
+nitrox_qp_get_softreq(struct nitrox_qp *qp)
+{
+   uint32_t tail = qp->tail % qp->count;
+
+   return qp->ridq[tail].sr;
+}
+
+static inline void
+nitrox_ring_dbell(struct nitrox_qp *qp, uint16_t cnt)
+{
+   struct command_queue *cmdq = &qp->cmdq;
+
+   if (!cnt)
+   return;
+
+   rte_write64(cnt, cmdq->dbell_csr_addr);
+}
+
+static inline void
+nitrox_qp_enqueue(struct nitrox_qp *qp, void *instr, struct nitrox_softreq *sr)
+{
+   uint32_t head = qp->head % qp->count;
+
+   memcpy(&qp->cmdq.ring[head * qp->cmdq.instr_size],
+  instr, qp->cmdq.instr_size);
+   qp->ridq[head].sr = sr;
+   qp->head++;
+   rte_atomic16_inc(&qp->pending_count);
+   rte_wmb();
+}
+
+static inline void
+nitrox_qp_dequeue(struct nitrox_qp *qp)
+{
+   qp->tail++;
+   rte_atomic16_dec(&qp->pending_count);
+   rte_smp_mb();
+}
+
 int nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr,
const char *dev_name, uint32_t nb_descriptors,
uint8_t inst_size, int socket_id);
diff --git a/drivers/crypto/nitrox/nitrox_sym.c 
b/drivers/crypto/nitrox/nitrox_sym.c
index 34c62b02e..9ccc28755 100644
--- a/drivers/crypto/nitrox/nitrox_sym.c
+++ b/drivers/crypto/nitrox/nitrox_sym.c
@@ -521,6 +521,125 @@ nitrox_sym_dev_sess_clear(struct rte_cryptodev *cdev,
rte_mempool_put(sess_mp, ctx);
 }
 
+static struct nitrox_crypto_ctx *
+get_crypto_ctx(struct rte_crypto_op *op)
+{
+   if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
+   if (likely(op->sym->session))
+   return get_sym_session_private_data(op->sym->session,
+  nitrox_sym_drv_id);
+
+   }
+
+   return NULL;
+}
+
+static int
+nitrox_enq_single_op(struct nitrox_qp *qp, struct rte_crypto_op *op)
+{
+   struct nitrox_crypto_ctx *ctx;
+   struct nitrox_softreq *sr;
+   int err;
+
+   op->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+
+   ctx = get_crypto_ctx(op);
+   if (unlikely(!ctx)) {
+   op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
+   return -EINVAL;
+   }
+
+   if (unlikely(rte_mempool_get(qp->sr_mp, (void **)&sr)))
+   return -ENOMEM;
+
+   err = nitrox_process_se_req(qp->qno, op, ctx, sr);
+   if (unlikely(err)) {
+   rte_mempool_put(qp->sr_mp, sr);
+   op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+   return err;
+   }
+
+   nitrox_qp_enqueue(qp, nitrox_sym_instr_addr(sr), sr);
+   return 0;
+}
+
+static uint16_t
+nitrox_sym_dev_enq_burst(void *queue_pair, struct rte_crypto_op **ops,
+uint16_t nb_ops)
+{
+   struct nitrox_qp *qp = queue_pair;
+   uint16_t free_slots = 0;
+   uint16_t cnt = 0;
+   bool err = false;
+
+   free_slots = nitrox_qp_free_count(qp);
+   if (nb_ops > free_slots)
+   nb_ops = free_slots;
+
+   for (cnt = 0; cnt < nb_ops; cnt++) {
+   if (unlikely(nitrox_enq_single_op(qp, ops[cnt]))) {
+   err = true;
+   break;
+   }
+   }
+
+   nitrox_ring_dbell(qp, cnt);
+   qp->stats.enqueued_count += cnt;
+   if (unlikely(err))
+   qp->stats.enqueue_err_count++;
+
+   return cnt;
+}
+
+static int
+nitrox_deq_single_op(struct nitrox_qp *qp, struct rte_crypto_op **op_ptr)
+{
+   struct nitrox_softreq *sr;
+   int ret;
+   struct rte_crypto_op *op;
+
+   sr = nitrox_qp_get_softreq(qp);
+   ret = nitrox_check_se_req(sr, op_ptr);
+   if (ret < 0)
+   return -EAGAIN;
+
+   op = *op_ptr;
+  

[dpdk-dev] [PATCH v2 10/10] test/crypto: add tests for Nitrox PMD

[Nagadheeraj Rottela]

Add hmac(sha1), cbc(aes) authenc tests in the test mechanism.

Signed-off-by: Nagadheeraj Rottela 
---
 app/test/test_cryptodev.c  | 52 ++
 app/test/test_cryptodev.h  |  1 +
 app/test/test_cryptodev_aes_test_vectors.h | 30 +++--
 app/test/test_cryptodev_blockcipher.c  |  9 +-
 app/test/test_cryptodev_blockcipher.h  |  1 +
 5 files changed, 82 insertions(+), 11 deletions(-)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index c8221640d..a5cac5f80 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -2331,6 +2331,25 @@ test_3DES_chain_octeontx_all(void)
 }
 
 static int
+test_AES_chain_nitrox_all(void)
+{
+   struct crypto_testsuite_params *ts_params = &testsuite_params;
+   int status;
+
+   status = test_blockcipher_all_tests(ts_params->mbuf_pool,
+   ts_params->op_mpool,
+   ts_params->session_mpool, ts_params->session_priv_mpool,
+   ts_params->valid_devs[0],
+   rte_cryptodev_driver_id_get(
+   RTE_STR(CRYPTODEV_NAME_NITROX_PMD)),
+   BLKCIPHER_AES_CHAIN_TYPE);
+
+   TEST_ASSERT_EQUAL(status, 0, "Test failed");
+
+   return TEST_SUCCESS;
+}
+
+static int
 test_3DES_cipheronly_octeontx_all(void)
 {
struct crypto_testsuite_params *ts_params = &testsuite_params;
@@ -11962,6 +11981,22 @@ static struct unit_test_suite 
cryptodev_octeontx_testsuite  = {
}
 };
 
+static struct unit_test_suite cryptodev_nitrox_testsuite  = {
+   .suite_name = "Crypto NITROX Unit Test Suite",
+   .setup = testsuite_setup,
+   .teardown = testsuite_teardown,
+   .unit_test_cases = {
+   TEST_CASE_ST(ut_setup, ut_teardown,
+test_device_configure_invalid_dev_id),
+   TEST_CASE_ST(ut_setup, ut_teardown,
+   test_device_configure_invalid_queue_pair_ids),
+   TEST_CASE_ST(ut_setup, ut_teardown,
+test_AES_chain_nitrox_all),
+
+   TEST_CASES_END() /**< NULL terminate unit test array */
+   }
+};
+
 static int
 test_cryptodev_qat(void /*argv __rte_unused, int argc __rte_unused*/)
 {
@@ -12245,6 +12280,22 @@ test_cryptodev_caam_jr(void /*argv __rte_unused, int 
argc __rte_unused*/)
return unit_test_suite_runner(&cryptodev_caam_jr_testsuite);
 }
 
+static int
+test_cryptodev_nitrox(void)
+{
+   gbl_driver_id = rte_cryptodev_driver_id_get(
+   RTE_STR(CRYPTODEV_NAME_NITROX_PMD));
+
+   if (gbl_driver_id == -1) {
+   RTE_LOG(ERR, USER1, "NITROX PMD must be loaded. Check if "
+   "CONFIG_RTE_LIBRTE_PMD_NITROX is enabled "
+   "in config file to run this testsuite.\n");
+   return TEST_FAILED;
+   }
+
+   return unit_test_suite_runner(&cryptodev_nitrox_testsuite);
+}
+
 REGISTER_TEST_COMMAND(cryptodev_qat_autotest, test_cryptodev_qat);
 REGISTER_TEST_COMMAND(cryptodev_aesni_mb_autotest, test_cryptodev_aesni_mb);
 REGISTER_TEST_COMMAND(cryptodev_openssl_autotest, test_cryptodev_openssl);
@@ -12261,3 +12312,4 @@ REGISTER_TEST_COMMAND(cryptodev_ccp_autotest, 
test_cryptodev_ccp);
 REGISTER_TEST_COMMAND(cryptodev_virtio_autotest, test_cryptodev_virtio);
 REGISTER_TEST_COMMAND(cryptodev_octeontx_autotest, test_cryptodev_octeontx);
 REGISTER_TEST_COMMAND(cryptodev_caam_jr_autotest, test_cryptodev_caam_jr);
+REGISTER_TEST_COMMAND(cryptodev_nitrox_autotest, test_cryptodev_nitrox);
diff --git a/app/test/test_cryptodev.h b/app/test/test_cryptodev.h
index 14b54dcb6..afcdaf03f 100644
--- a/app/test/test_cryptodev.h
+++ b/app/test/test_cryptodev.h
@@ -67,6 +67,7 @@
 #define CRYPTODEV_NAME_VIRTIO_PMD  crypto_virtio
 #define CRYPTODEV_NAME_OCTEONTX_SYM_PMDcrypto_octeontx
 #define CRYPTODEV_NAME_CAAM_JR_PMD crypto_caam_jr
+#define CRYPTODEV_NAME_NITROX_PMD  crypto_nitrox
 
 /**
  * Write (spread) data from buffer to mbuf data
diff --git a/app/test/test_cryptodev_aes_test_vectors.h 
b/app/test/test_cryptodev_aes_test_vectors.h
index ee4fdc9a7..476459b66 100644
--- a/app/test/test_cryptodev_aes_test_vectors.h
+++ b/app/test/test_cryptodev_aes_test_vectors.h
@@ -1537,7 +1537,8 @@ static const struct blockcipher_test_case 
aes_chain_test_cases[] = {
.op_mask = BLOCKCIPHER_TEST_OP_AUTH_VERIFY_DEC,
.feature_mask = BLOCKCIPHER_TEST_FEATURE_OOP,
.pmd_mask = BLOCKCIPHER_TEST_TARGET_PMD_MB |
-   BLOCKCIPHER_TEST_TARGET_PMD_QAT
+   BLOCKCIPHER_TEST_TARGET_PMD_QAT |
+   BLOCKCIPHER_TEST_TARGET_PMD_NITROX
},
{
.test_descr = "AES-128-CTR HMAC-SHA1 Encryption Digest",
@@ -1638,7 +1639,8 @@ static const struct blockcipher_test_case 
aes_chain_test_cases[] = {
BLOCKCIPHER_TEST_TARGET_PMD

Re: [dpdk-dev] [EXT] [PATCH v3 1/3] eal/arm64: add 128-bit atomic compare exchange

[Jerin Jacob Kollanukkaran]

> > > +#define RTE_HAS_ACQ(mo) ((mo) != __ATOMIC_RELAXED && (mo) !=
> > > +__ATOMIC_RELEASE) #define RTE_HAS_RLS(mo) ((mo) ==
> > > __ATOMIC_RELEASE || \
> > > +  (mo) == __ATOMIC_ACQ_REL || \
> > > +  (mo) == __ATOMIC_SEQ_CST)
> > > +
> > > +#define RTE_MO_LOAD(mo)  (RTE_HAS_ACQ((mo)) \
> > > + ? __ATOMIC_ACQUIRE : __ATOMIC_RELAXED) #define
> > > RTE_MO_STORE(mo)
> > > +(RTE_HAS_RLS((mo)) \
> > > + ? __ATOMIC_RELEASE : __ATOMIC_RELAXED)
> > > +
> >
> > The one starts with RTE_ are public symbols, If it is generic enough,
> > Move to common layer so that every architecturse can use.
> > If you think, otherwise make it internal
> 
> Let's keep it internal. I will remove the 'RTE_' tag.

Probably change to __HAS_ACQ to avoid collision(just in case)

> >
> >
> >
> > > +#ifdef __ARM_FEATURE_ATOMICS
> >
> > This define is added in gcc 9.1 and I believe for clang it is not supported 
> > yet.
> > So old gcc and clang this will be undefined.
> > I think, With meson + native build, we  can find the presence of
> > ATOMIC support by running a.out. Not sure about make and cross build case.
> > I don't want block this feature because of this, IMO, We can add this
> > code with  existing __ARM_FEATURE_ATOMICS scheme and later find a
> > method to enhance it. But please check how to fix it.
> 
> OK.

After thinking on this a bit, I think,  in order to support old gcc(< gcc 9.1) 
and clang,
We can introduce a config option, where, by default it is disabled and enable
In specific config(where we know, lse is supported) and meson config.

i.e
#if defined(__ARM_FEATURE_ATOMICS) || defined(RTE_ARM_FEATURE_ATOMICS)


> 
> >
> > > +#define __ATOMIC128_CAS_OP(cas_op_name, op_string)   
> > >\
> > > +static inline rte_int128_t   
> > >\
> > > +cas_op_name(rte_int128_t *dst, rte_int128_t old, 
> > >\
> > > + rte_int128_t updated)   
> > > \
> > > +{
> > >\
> > > + /* caspX instructions register pair must start from even-numbered
> > > +  * register at operand 1.
> > > +  * So, specify registers for local variables here.
> > > +  */ 
> > > \
> > > + register uint64_t x0 __asm("x0") = (uint64_t)old.val[0];
> > > \
> >
> > Since direct x0 register used in the code and
> > cas_op_name() and rte_atomic128_cmp_exchange() is inline function,
> > Based on parent function load, we may corrupt x0 register aka
> 
> Since x0/x1 and x2/x3 are used a lot and often contain live values.
> Maybe to change them to some relatively less frequently used registers like
> x14/x15 and x16/x17 might help for this case?
> According to the PCS (Procedure Call Standard), x14-x17 are also temporary
> registers.

X14-x17 are temporary registers but since 
cas_op_name() and rte_atomic128_cmp_exchange() are inline functions,
Based on the parent function register usage, it _may_ corrupt.


> 
> > Break arm64 ABI. Not sure clobber list will help here or not?
> 
> In my understanding, for the register variable, if it contains a live value 
> in the
> specified register, the compiler will move the live value into a free 
> register.
> Since x0~x3 are present in the input/output operands and x0/x1's value needs 
> to
> be restored to the variable 'old' as a return value.
> So I didn't add them into the clobber list.

OK

> 
> > Making it as no_inline will help but not sure about the performance impact.
> > May be you can check with compiler team.
> >
> > We burned our hands with this scheme, see
> > 5b40ec6b966260e0ff66a8a2c689664f75d6a0e6 ("mempool/octeontx2: fix
> > possible arm64 ABI break")
> >
> > Probably we can choose a scheme for rc2 and adjust as when we have
> > complete clarity.
> >
> > >
> > > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_ARM64)
> >
> > There is nothing specific to x86 and arm64 here, Can we remove this #ifdef ?
> 
> Without this constraint, it will break 32-bit x86 builds.
> http://mails.dpdk.org/archives/test-report/2019-June/086586.html

OK . #ifdef RTE_ARCH_64 would help then.

> 
> >
> > > +/**
> > > + * 128-bit integer structure.
> > > + */
> > > +RTE_STD_C11
> > > +typedef struct {
> > > + RTE_STD_C11
> > > + union {
> > > + uint64_t val[2];
> > > + __extension__ __int128 int128;

Instead of guarding  RTE_ARCH_64 on this complete structure,
How about it only under
#ifdef RTE_ARCH_64
__extension__ __int128 int128;
#endif
So that it rte_int128_t will be available for 32bit as well.


> > > + };
> > > +} __rte_aligned(16) rte_int128_t;
> > > +#endif
> > > +
> > >  #ifdef __DOXYGEN__

Re: [dpdk-dev] [PATCH] failsafe: skip devargs if not present in secondary

[Ferruh Yigit]

On 7/18/2019 12:18 PM, Gaëtan Rivet wrote:
> On Wed, Jul 17, 2019 at 07:21:51PM +0100, Ferruh Yigit wrote:
>> On 6/24/2019 5:27 PM, Gaëtan Rivet wrote:
>>> On Mon, Jun 24, 2019 at 08:23:38AM -0700, Stephen Hemminger wrote:
 On Mon, 24 Jun 2019 10:15:58 +0200
 Gaëtan Rivet  wrote:

> Hello Stephen,
>
> On Fri, Jun 21, 2019 at 03:08:24PM -0700, Stephen Hemminger wrote:
>> When secondary process is run was noticing that the log always
>> contained complaints about unable to parse devargs.
>>
>> It turns out that an empty devargs turns into "" and this
>> value is not parsable. Change the failsafe secondary to just
>> skip doing devargs if it empty.
>>   
>
> Commit log needs a little rework, a few typos.
>
>> Signed-off-by: Stephen Hemminger 

<...>

> 
> Acked-by: Gaetan Rivet 

Applied to dpdk-next-net/master, thanks.

Re: [dpdk-dev] [dpdk-stable] [PATCH] app/testpmd: fix display capabilities routine

[Ferruh Yigit]

On 7/19/2019 6:07 AM, Slava Ovsiienko wrote:
> Hi, Ferruh
> 
> Please, see below
> 
>> -Original Message-
>> From: Ferruh Yigit 
>> Sent: Wednesday, July 17, 2019 17:56
>> To: Slava Ovsiienko ; dev@dpdk.org
>> Cc: bernard.iremon...@intel.com; sta...@dpdk.org
>> Subject: Re: [dpdk-stable] [PATCH] app/testpmd: fix display capabilities
>> routine
>>
>> On 7/16/2019 12:39 PM, Viacheslav Ovsiienko wrote:
>>> The DEV_TX_OFFLOAD_MATCH_METADATA was introduced by [1], but it is
>> not
>>> displayed by "show port [id] tx_offloads capabilities"
>>> command in testpmd.
>>>
>>> [1]
>>>
>> https://eur03.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch
>>>
>> es.dpdk.org%2Fpatch%2F47265%2F&data=02%7C01%7Cviacheslavo%4
>> 0mellan
>>>
>> ox.com%7C3fea893cbf43414d6f9a08d70ac6e78f%7Ca652971c7d2e4d9ba6a
>> 4d14925
>>>
>> 6f461b%7C0%7C0%7C636989721710321485&sdata=bnKjCSFr%2FVX9k
>> Ds1TwijB0
>>> %2Bpe0xM4j2J9cZg872hBYA%3D&reserved=0
>>>
>>> Fixes: 839b20be0e9b ("ethdev: support metadata as flow rule criteria")
>>> Cc: sta...@dpdk.org
>>>
>>> Signed-off-by: Viacheslav Ovsiienko 
>>> ---
>>>  app/test-pmd/config.c | 8 
>>>  1 file changed, 8 insertions(+)
>>>
>>> diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c index
>>> ba43be5..8fb18be 100644
>>> --- a/app/test-pmd/config.c
>>> +++ b/app/test-pmd/config.c
>>> @@ -830,6 +830,14 @@
>>> printf("off\n");
>>> }
>>>
>>> +   if (dev_info.tx_offload_capa &
>> DEV_TX_OFFLOAD_MATCH_METADATA) {
>>> +   printf("TX match Flow metafata:");
>>> +   if (ports[port_id].dev_conf.txmode.offloads &
>>> +   DEV_TX_OFFLOAD_MATCH_METADATA)
>>> +   printf("on\n");
>>> +   else
>>> +   printf("off\n");
>>> +   }
>>>  }
>>>
>>>  int
>>>
>>
>> Hi Viacheslav,
>>
>> There is already another testpmd command that displays offloads, which is
>> more dynamic and I think better solution:
>> "show port  tx_offload capabilities"
>> "show port  tx_offload configuration"
> 
> Yes, it's implemented in dynamic approach and shows tx metadata offload 
> cap/con correctly.
> It is OK, no need to update this one.
> 
>> "show port  rx_offload capabilities"
>> "show port  rx_offload configuration"
>>
>> As far as I can see 'metadata' already supported by these commands, can
>> you please confirm?
> 
> These commands are RX related, there is no any metadata offloads for RX.
> 
>>
>> And instead of improving it, what do you think dropping the duplicated
>> command "show port cap |all" ?
> 
> I use this command, it is shorter than the "show port 0 tx_offload 
> capabilities", even with autocompletion.
> Despite this, personally me is OK with drop. But someone else may use these 
> commands also.

As long as we have another command that has this support it is not an issue I
think. And duplication is bad :)

Would you mind helping on this, and prepare a patch to remove this?

Re: [dpdk-dev] [EXT] [PATCH v5 0/7] Rework API for RSA algorithm in asymmetric crypto

[Akhil Goyal]

> > --
> > Ramoved patches that was not acked by Shally.
> > So open things:
> > 1. Creating padding struct.
> > 2. Padding parameters (seedlen, optional label etc).
> > 3. Leading zeroes questions.
> > 4. Random number requirements.
> > 5. Capabilities.
> > 6. Verify signature field when none padding.
> > 7. Padding none.
> > 8. Signature input format.
> >
> > Arek Kusztal (7):
> >   cryptodev: change RSA API comments about primes
> >   cryptodev: add cipher field to RSA op
> >   crypto/openssl: add cipher field to openssl RSA implementation
> >   test: add cipher field to RSA test
> >   cryptodev: remove RSA PKCS1 BT0 padding
> >   openssl: remove RSA PKCS1_5 BT0 padding
> >   test: remove RSA PKCS1_5 BT0 padding from test cases
> >
> >  app/test/test_cryptodev_asym.c   | 13 ---
> >  drivers/crypto/openssl/rte_openssl_pmd.c | 12 +++
> >  lib/librte_cryptodev/rte_crypto_asym.h   | 61 +---
> > 
> >  3 files changed, 55 insertions(+), 31 deletions(-)
> >
> > --
> > 2.1.0
> With minor feedback on description on Patchv5 2/7,
> Series-acked-by: Shally Verma 

Comment on 2/7 shall be taken in next series for next release as suggested by 
Shally.

Applied to dpdk-next-crypto

Thanks.

Re: [dpdk-dev] [PATCH v7 0/2] examples/ipsec-secgw: fix 1st pkt dropped

[Akhil Goyal]

> -Original Message-
> From: Bernard Iremonger 
> Sent: Wednesday, July 10, 2019 4:53 PM
> To: dev@dpdk.org; konstantin.anan...@intel.com; Akhil Goyal
> 
> Cc: Bernard Iremonger 
> Subject: [PATCH v7 0/2] examples/ipsec-secgw: fix 1st pkt dropped
> 
> This patchset fixes the issue of the first inbound packet
> being dropped for inline crypto.
> 
> Changes in v7:
> --
> Rebased to DPDK 19.08-rc1
> 
> Changes in v6:
> --
> Rebased to latest master.
> Minor changes to the following functions in ipsec.c:
> create_lookaside_session()
> create_inline_session()
> 
> Bernard Iremonger (2):
>   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
>   examples/ipsec-secgw/test: fix inline test scripts
> 
>  examples/ipsec-secgw/ipsec-secgw.c   | 244 +++
>  examples/ipsec-secgw/ipsec.c | 449 
> ++-
>  examples/ipsec-secgw/ipsec.h |   5 +-
>  examples/ipsec-secgw/ipsec_process.c |   9 +-
>  examples/ipsec-secgw/sa.c|  46 ++-
>  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 -
>  examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 -
>  7 files changed, 403 insertions(+), 370 deletions(-)
> 
> Changes in v5:
> -
> The v2 patchset has been rebased to the latest master.
> The v4 patchset has been dropped as it caused issues with the lookaside code
> which we are unable to test.
> 
> Bernard Iremonger (2):
>   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
>   examples/ipsec-secgw/test: fix inline test scripts
> 
>  examples/ipsec-secgw/ipsec-secgw.c   | 244 
> +--
>  examples/ipsec-secgw/ipsec.c | 122 +-
>  examples/ipsec-secgw/ipsec.h |   5 +-
>  examples/ipsec-secgw/ipsec_process.c |   9 +-
>  examples/ipsec-secgw/sa.c|  46 +++--
>  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 --
>  examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 --
>  7 files changed, 245 insertions(+), 201 deletions(-)
> 
> Changes in v2:
> -
> The first three patches of the v1 have been squashed.
> The commit message for the squashed patch has been updated.
> Patches 4,5 and 6 of the v1 have been dropped from this patchset.
> A patch to fix the test scripts has been added.
> 
> Bernard Iremonger (2):
>   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
>   examples/ipsec-secgw/test: fix inline test scripts
> 
>  examples/ipsec-secgw/ipsec-secgw.c   | 244 +++---
>  examples/ipsec-secgw/ipsec.c | 456 
> ++-
>  examples/ipsec-secgw/ipsec.h |   5 +-
>  examples/ipsec-secgw/ipsec_process.c |   9 +-
>  examples/ipsec-secgw/sa.c|  46 ++-
>  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 -
>  examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 -
>  7 files changed, 405 insertions(+), 375 deletions(-)
> 
> --
> 2.7.4

It was rebased manually, so please verify.
Applied to dpdk-next-crypto

Thanks.

Re: [dpdk-dev] [PATCH v7 0/2] examples/ipsec-secgw: fix 1st pkt dropped

[Iremonger, Bernard]

Hi Akhil,



> > Subject: [PATCH v7 0/2] examples/ipsec-secgw: fix 1st pkt dropped
> >
> > This patchset fixes the issue of the first inbound packet being
> > dropped for inline crypto.
> >
> > Changes in v7:
> > --
> > Rebased to DPDK 19.08-rc1
> >
> > Changes in v6:
> > --
> > Rebased to latest master.
> > Minor changes to the following functions in ipsec.c:
> > create_lookaside_session()
> > create_inline_session()
> >
> > Bernard Iremonger (2):
> >   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
> >   examples/ipsec-secgw/test: fix inline test scripts
> >
> >  examples/ipsec-secgw/ipsec-secgw.c   | 244 +++
> >  examples/ipsec-secgw/ipsec.c | 449 
> > ++-
> >  examples/ipsec-secgw/ipsec.h |   5 +-
> >  examples/ipsec-secgw/ipsec_process.c |   9 +-
> >  examples/ipsec-secgw/sa.c|  46 ++-
> >  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 -
> > examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 -
> >  7 files changed, 403 insertions(+), 370 deletions(-)
> >
> > Changes in v5:
> > -
> > The v2 patchset has been rebased to the latest master.
> > The v4 patchset has been dropped as it caused issues with the
> > lookaside code which we are unable to test.
> >
> > Bernard Iremonger (2):
> >   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
> >   examples/ipsec-secgw/test: fix inline test scripts
> >
> >  examples/ipsec-secgw/ipsec-secgw.c   | 244 +---
> ---
> >  examples/ipsec-secgw/ipsec.c | 122 +-
> >  examples/ipsec-secgw/ipsec.h |   5 +-
> >  examples/ipsec-secgw/ipsec_process.c |   9 +-
> >  examples/ipsec-secgw/sa.c|  46 +++--
> >  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 --
> > examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 --
> >  7 files changed, 245 insertions(+), 201 deletions(-)
> >
> > Changes in v2:
> > -
> > The first three patches of the v1 have been squashed.
> > The commit message for the squashed patch has been updated.
> > Patches 4,5 and 6 of the v1 have been dropped from this patchset.
> > A patch to fix the test scripts has been added.
> >
> > Bernard Iremonger (2):
> >   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
> >   examples/ipsec-secgw/test: fix inline test scripts
> >
> >  examples/ipsec-secgw/ipsec-secgw.c   | 244 +++---
> >  examples/ipsec-secgw/ipsec.c | 456 
> > ++-
> >  examples/ipsec-secgw/ipsec.h |   5 +-
> >  examples/ipsec-secgw/ipsec_process.c |   9 +-
> >  examples/ipsec-secgw/sa.c|  46 ++-
> >  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 -
> > examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 -
> >  7 files changed, 405 insertions(+), 375 deletions(-)
> >
> > --
> > 2.7.4
> 
> It was rebased manually, so please verify.
> Applied to dpdk-next-crypto
> 
> Thanks.

I will verify.

Regards,

Bernard.

[dpdk-dev] [PATCH 1/2] net/ark: remove queue offset based on port id

[Ed Czeck]

Queue index was incorrectly incremented with port, which
caused swizzling of packet placement among queues. This manifested
when the number of configured ports was >1 and < nb_queues.

Fixes: c33d45af3633 ("net/ark: add Tx initial version")
Cc: sta...@dpdk.org

Signed-off-by: Ed Czeck 
---
 drivers/net/ark/ark_ethdev_rx.c | 4 +---
 drivers/net/ark/ark_ethdev_tx.c | 4 +---
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ark/ark_ethdev_rx.c b/drivers/net/ark/ark_ethdev_rx.c
index 7de1a98..6156730 100644
--- a/drivers/net/ark/ark_ethdev_rx.c
+++ b/drivers/net/ark/ark_ethdev_rx.c
@@ -127,9 +127,7 @@ eth_ark_dev_rx_queue_setup(struct rte_eth_dev *dev,
uint32_t i;
int status;
 
-   /* Future works: divide the Q's evenly with multi-ports */
-   int port = dev->data->port_id;
-   int qidx = port + queue_idx;
+   int qidx = queue_idx;
 
/* We may already be setup, free memory prior to re-allocation */
if (dev->data->rx_queues[queue_idx] != NULL) {
diff --git a/drivers/net/ark/ark_ethdev_tx.c b/drivers/net/ark/ark_ethdev_tx.c
index 1967655..08bcf43 100644
--- a/drivers/net/ark/ark_ethdev_tx.c
+++ b/drivers/net/ark/ark_ethdev_tx.c
@@ -211,9 +211,7 @@ eth_ark_tx_queue_setup(struct rte_eth_dev *dev,
struct ark_tx_queue *queue;
int status;
 
-   /* Future: divide the Q's evenly with multi-ports */
-   int port = dev->data->port_id;
-   int qidx = port + queue_idx;
+   int qidx = queue_idx;
 
if (!rte_is_power_of_2(nb_desc)) {
PMD_DRV_LOG(ERR,
-- 
2.7.4

[dpdk-dev] [PATCH 2/2] net/ark: remove resources when port is close

[Ed Czeck]

Set RTE_ETH_DEV_CLOSE_REMOVE upon probe so all the resources
for the port can be freed by rte_eth_dev_close()

Signed-off-by: Ed Czeck 
---
 drivers/net/ark/ark_ethdev.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/ark/ark_ethdev.c b/drivers/net/ark/ark_ethdev.c
index 86e500e..3435728 100644
--- a/drivers/net/ark/ark_ethdev.c
+++ b/drivers/net/ark/ark_ethdev.c
@@ -261,6 +261,8 @@ eth_ark_dev_init(struct rte_eth_dev *dev)
/* Use dummy function until setup */
dev->rx_pkt_burst = ð_ark_recv_pkts_noop;
dev->tx_pkt_burst = ð_ark_xmit_pkts_noop;
+   /* Let rte_eth_dev_close() release the port resources */
+   dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
 
ark->bar0 = (uint8_t *)pci_dev->mem_resource[0].addr;
ark->a_bar = (uint8_t *)pci_dev->mem_resource[2].addr;
@@ -706,6 +708,9 @@ eth_ark_dev_close(struct rte_eth_dev *dev)
eth_ark_dev_rx_queue_release(dev->data->rx_queues[i]);
dev->data->rx_queues[i] = 0;
}
+
+   rte_free(dev->data->mac_addrs);
+   dev->data->mac_addrs = 0;
 }
 
 static void
-- 
2.7.4

Re: [dpdk-dev] [PATCH 1/2] test/crypto: fix session init failure for wireless test

[Akhil Goyal]

> 
> This patch add the support to handle the failure in session
> create for wireless related cases. Else it will cause
> segment fault due to I/O on un-initialized sessions.
> 
> Fixes: b3bbd9e5f2659 ("cryptodev: support device independent sessions")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Hemant Agrawal 
> ---
Applied to dpdk-next-crypto

Thanks.

Re: [dpdk-dev] [EXT] [PATCH v5 1/1] app/test-compress-perf: report header improvement

[Akhil Goyal]

> 
> > +static struct cperf_buffer_info tests_res;
> Rename test_res too --> buffer_info? You can address it in next release cycle 
> as
> well.
> [Artur] Thank you Shally. Good point. Will be changed in the next cycle.
> 
> 
Applied to dpdk-next-crypto

Thanks.

Re: [dpdk-dev] [PATCH 00/22] bnxt patchset

[Ajit Kumar Khaparde]

> On Jul 19, 2019, at 18:00, Ferruh Yigit  wrote:
>
>> On 7/18/2019 4:35 AM, Ajit Khaparde wrote:
>> This patchset based on commit a164bb7c0a5ab3b100357cf56696c945fe28ab73
>> contains bug fixes and an update to the HWRM API.
>> Please apply.
>>
>> Ajit Khaparde (1):
>>  net/bnxt: update HWRM API to version 1.10.0.91
>>
>> Kalesh AP (11):
>>  net/bnxt: fix to handle error case during port start
>>  net/bnxt: fix return value check of address mapping
>>  net/bnxt: fix failure to add a MAC address
>>  net/bnxt: fix an unconditional wait in link update
>>  net/bnxt: fix setting primary MAC address
>>  net/bnxt: fix failure path in dev init
>>  net/bnxt: reset filters before registering interrupts
>>  net/bnxt: fix error checking of FW commands
>>  net/bnxt: fix to return standard error codes
>>  net/bnxt: fix lock release on getting NVM info
>>  net/bnxt: fix to correctly check result of HWRM command
>>
>> Lance Richardson (8):
>>  net/bnxt: use correct vnic default completion ring
>>  net/bnxt: use dedicated cpr for async events
>>  net/bnxt: retry irq callback deregistration
>>  net/bnxt: use correct RSS table sizes
>>  net/bnxt: fully initialize hwrm msgs for thor RSS cfg
>>  net/bnxt: use correct number of RSS contexts for thor
>>  net/bnxt: pass correct RSS table address for thor
>>  net/bnxt: avoid overrun in get statistics
>>
>> Santoshkumar Karanappa Rastapur (2):
>>  net/bnxt: fix RSS disable issue for thor-based adapters
>>  net/bnxt: fix MAC/VLAN filter allocation failure
>>
>
>
> Hi Ajit,
>
> All bnxt patches has been sent after rc1, and this one has been sent a day
> before rc2. A believe you are aware that proposal deadline was "June 3, 2019".
I understand. But most of these including the next patch set are bug fixes.
It just that some stayed in our staging area longer. But most of them
were detected and fixed in the last week when our QA ramped testing on
rc1.

Intact as I type this mail I see two more bug fixes ready for submission.

>
> I will still try to get them but most probably the patchset won't able to make
> this release, fyi.

Thanks
Ajit

>
> Regards,
> ferruh

[dpdk-dev] [RFC 3/4] mempool: introduce function to get mempool page size

[Olivier Matz]

In rte_mempool_populate_default(), we determine the page size,
which is needed for calc_size and allocation of memory.

Move this in a function and export it, it will be used in next
commit.

Signed-off-by: Olivier Matz 
---
 lib/librte_mempool/rte_mempool.c | 50 +---
 lib/librte_mempool/rte_mempool.h |  6 +
 2 files changed, 37 insertions(+), 19 deletions(-)

diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 335032dc8..7def0ba68 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -414,6 +414,32 @@ rte_mempool_populate_virt(struct rte_mempool *mp, char 
*addr,
return ret;
 }
 
+int
+rte_mempool_get_page_size(struct rte_mempool *mp, size_t *pg_sz)
+{
+   bool need_iova_contig_obj;
+   bool alloc_in_ext_mem;
+   int ret;
+
+   /* check if we can retrieve a valid socket ID */
+   ret = rte_malloc_heap_socket_is_external(mp->socket_id);
+   if (ret < 0)
+   return -EINVAL;
+   alloc_in_ext_mem = (ret == 1);
+   need_iova_contig_obj = !(mp->flags & MEMPOOL_F_NO_IOVA_CONTIG);
+
+   if (!need_iova_contig_obj)
+   *pg_sz = 0;
+   else if (!alloc_in_ext_mem && rte_eal_iova_mode() == RTE_IOVA_VA)
+   *pg_sz = get_min_page_size(mp->socket_id);
+   else if (rte_eal_has_hugepages() || alloc_in_ext_mem)
+   *pg_sz = get_min_page_size(mp->socket_id);
+   else
+   *pg_sz = getpagesize();
+
+   return 0;
+}
+
 /* Default function to populate the mempool: allocate memory in memzones,
  * and populate them. Return the number of objects added, or a negative
  * value on error.
@@ -425,12 +451,11 @@ rte_mempool_populate_default(struct rte_mempool *mp)
char mz_name[RTE_MEMZONE_NAMESIZE];
const struct rte_memzone *mz;
ssize_t mem_size;
-   size_t align, pg_sz, pg_shift;
+   size_t align, pg_sz, pg_shift = 0;
rte_iova_t iova;
unsigned mz_id, n;
int ret;
bool need_iova_contig_obj;
-   bool alloc_in_ext_mem;
 
ret = mempool_ops_alloc_once(mp);
if (ret != 0)
@@ -482,26 +507,13 @@ rte_mempool_populate_default(struct rte_mempool *mp)
 * synonymous with IOVA contiguousness will not hold.
 */
 
-   /* check if we can retrieve a valid socket ID */
-   ret = rte_malloc_heap_socket_is_external(mp->socket_id);
-   if (ret < 0)
-   return -EINVAL;
-   alloc_in_ext_mem = (ret == 1);
need_iova_contig_obj = !(mp->flags & MEMPOOL_F_NO_IOVA_CONTIG);
+   ret = rte_mempool_get_page_size(mp, &pg_sz);
+   if (ret < 0)
+   return ret;
 
-   if (!need_iova_contig_obj) {
-   pg_sz = 0;
-   pg_shift = 0;
-   } else if (!alloc_in_ext_mem && rte_eal_iova_mode() == RTE_IOVA_VA) {
-   pg_sz = 0;
-   pg_shift = 0;
-   } else if (rte_eal_has_hugepages() || alloc_in_ext_mem) {
-   pg_sz = get_min_page_size(mp->socket_id);
-   pg_shift = rte_bsf32(pg_sz);
-   } else {
-   pg_sz = getpagesize();
+   if (pg_sz != 0)
pg_shift = rte_bsf32(pg_sz);
-   }
 
for (mz_id = 0, n = mp->size; n > 0; mz_id++, n -= ret) {
size_t min_chunk_size;
diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
index 7bc10e699..00b927989 100644
--- a/lib/librte_mempool/rte_mempool.h
+++ b/lib/librte_mempool/rte_mempool.h
@@ -1692,6 +1692,12 @@ uint32_t rte_mempool_calc_obj_size(uint32_t elt_size, 
uint32_t flags,
 void rte_mempool_walk(void (*func)(struct rte_mempool *, void *arg),
  void *arg);
 
+/**
+ * @internal Get page size used for mempool object allocation.
+ */
+int
+rte_mempool_get_page_size(struct rte_mempool *mp, size_t *pg_sz);
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.11.0

[dpdk-dev] [RFC 0/4] mempool: avoid objects allocations across pages

[Olivier Matz]

When IOVA mode is VA, a mempool can be created with objects that
are not physically contiguous, which breaks KNI.

To solve this, this patchset changes the default behavior of mempool
populate function, to prevent objects from being located across pages.

Olivier Matz (4):
  mempool: clarify default populate function
  mempool: unalign size when calculating required mem amount
  mempool: introduce function to get mempool page size
  mempool: prevent objects from being across pages

 lib/librte_mempool/rte_mempool.c | 106 +++
 lib/librte_mempool/rte_mempool.h |   8 +-
 lib/librte_mempool/rte_mempool_ops.c |   4 +-
 lib/librte_mempool/rte_mempool_ops_default.c |  39 +-
 4 files changed, 90 insertions(+), 67 deletions(-)

---

Hi,

> @Olivier,
> Any suggestions..?

I took some time to go a bit deeper. I still think we can change the
default behavior to avoid objects to be located accross pages. But
it is more complex that I expected.

I made a draft patchset, that, in short:
- cleans/renames variables
- removes the optimistic full iova contiguous allocation
- changes return value of calc_mem_size to return the unaligned size,
  therefore the allocation is smaller in case of big hugepages
- changes rte_mempool_op_populate_default() to prevent allocation
  of objects accross multiple pages

Andrew, Anatoly, did I miss something?
Vamsi, can you check if it solves your issue?

Anyway, even if validate the patchset it and make it work, I'm afraid
this is not something that could go in 19.08.

The only alternative I see is a specific mempool allocation function
when used in iova=va mode + kni, as you proposed previously.

It can probably be implemented without adding a flag, starting from
rte_mempool_create(), and replacing rte_mempool_populate_default(mp) by
something else: allocate pages one by one, and call
rte_mempool_populate_iova() for each of them.

Hope it helps. Unfortunately, I may not have too much time to spend on
it in the coming days.

Regards,
Olivier

[dpdk-dev] [RFC 4/4] mempool: prevent objects from being across pages

[Olivier Matz]

When using iova contiguous memory and objets smaller than page size,
ensure that objects are not located across several pages.

Signed-off-by: Vamsi Krishna Attunuru 
Signed-off-by: Olivier Matz 
---
 lib/librte_mempool/rte_mempool_ops_default.c | 39 ++--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/lib/librte_mempool/rte_mempool_ops_default.c 
b/lib/librte_mempool/rte_mempool_ops_default.c
index 4e2bfc82d..2bbd67367 100644
--- a/lib/librte_mempool/rte_mempool_ops_default.c
+++ b/lib/librte_mempool/rte_mempool_ops_default.c
@@ -45,19 +45,54 @@ rte_mempool_op_calc_mem_size_default(const struct 
rte_mempool *mp,
return mem_size;
 }
 
+/* Returns -1 if object falls on a page boundary, else returns 0 */
+static inline int
+mempool_check_obj_bounds(void *obj, uint64_t pg_sz, size_t elt_sz)
+{
+   uintptr_t page_end, elt_addr = (uintptr_t)obj;
+   uint32_t pg_shift;
+   uint64_t page_mask;
+
+   if (pg_sz == 0)
+   return 0;
+   if (elt_sz > pg_sz)
+   return 0;
+
+   pg_shift = rte_bsf32(pg_sz);
+   page_mask =  ~((1ull << pg_shift) - 1);
+   page_end = (elt_addr & page_mask) + pg_sz;
+
+   if (elt_addr + elt_sz > page_end)
+   return -1;
+
+   return 0;
+}
+
 int
 rte_mempool_op_populate_default(struct rte_mempool *mp, unsigned int max_objs,
void *vaddr, rte_iova_t iova, size_t len,
rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)
 {
-   size_t total_elt_sz;
+   size_t total_elt_sz, pg_sz;
size_t off;
unsigned int i;
void *obj;
 
+   rte_mempool_get_page_size(mp, &pg_sz);
+
total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
 
-   for (off = 0, i = 0; off + total_elt_sz <= len && i < max_objs; i++) {
+   for (off = 0, i = 0; i < max_objs; i++) {
+   /* align offset to next page start if required */
+   if (mempool_check_obj_bounds((char *)vaddr + off,
+   pg_sz, total_elt_sz) < 0) {
+   off += RTE_PTR_ALIGN_CEIL((char *)vaddr + off, pg_sz) -
+   ((char *)vaddr + off);
+   }
+
+   if (off + total_elt_sz > len)
+   break;
+
off += mp->header_size;
obj = (char *)vaddr + off;
obj_cb(mp, obj_cb_arg, obj,
-- 
2.11.0

[dpdk-dev] [RFC 2/4] mempool: unalign size when calculating required mem amount

[Olivier Matz]

The size returned by rte_mempool_op_calc_mem_size_default() is aligned
to the specified page size. This means that with big pages, the returned
amount is more that what we really need to populate the mempool.

This problem is tempered by the allocation method of
rte_mempool_populate_default(): in some conditions (when
try_iova_contig_mempool=true), it first tries to allocate all objs
memory in an iova contiguous area, without the alignment constraint. If
it fails, it fallbacks to the big aligned allocation, that can also
fallback into several smaller allocations.

This commit changes rte_mempool_op_calc_mem_size_default() to return the
unaligned amount of memory (the alignment constraint is still returned
via the *align argument), and removes the optimistic contiguous
allocation done when try_iova_contig_mempool=true.

This will make the amount of allocated memory more predictible: it will
be more than the optimistic contiguous allocation, but less than the big
aligned allocation.

This opens the door for the next commits that will try to prevent objets
from being located across pages.

Signed-off-by: Olivier Matz 
---
 lib/librte_mempool/rte_mempool.c | 44 
 lib/librte_mempool/rte_mempool.h |  2 +-
 lib/librte_mempool/rte_mempool_ops.c |  4 +++-
 3 files changed, 9 insertions(+), 41 deletions(-)

diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 0f29e8712..335032dc8 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -430,7 +430,6 @@ rte_mempool_populate_default(struct rte_mempool *mp)
unsigned mz_id, n;
int ret;
bool need_iova_contig_obj;
-   bool try_iova_contig_mempool;
bool alloc_in_ext_mem;
 
ret = mempool_ops_alloc_once(mp);
@@ -477,18 +476,10 @@ rte_mempool_populate_default(struct rte_mempool *mp)
 * wasting some space this way, but it's much nicer than looping around
 * trying to reserve each and every page size.
 *
-* However, since size calculation will produce page-aligned sizes, it
-* makes sense to first try and see if we can reserve the entire memzone
-* in one contiguous chunk as well (otherwise we might end up wasting a
-* 1G page on a 10MB memzone). If we fail to get enough contiguous
-* memory, then we'll go and reserve space page-by-page.
-*
 * We also have to take into account the fact that memory that we're
 * going to allocate from can belong to an externally allocated memory
 * area, in which case the assumption of IOVA as VA mode being
-* synonymous with IOVA contiguousness will not hold. We should also try
-* to go for contiguous memory even if we're in no-huge mode, because
-* external memory may in fact be IOVA-contiguous.
+* synonymous with IOVA contiguousness will not hold.
 */
 
/* check if we can retrieve a valid socket ID */
@@ -497,7 +488,6 @@ rte_mempool_populate_default(struct rte_mempool *mp)
return -EINVAL;
alloc_in_ext_mem = (ret == 1);
need_iova_contig_obj = !(mp->flags & MEMPOOL_F_NO_IOVA_CONTIG);
-   try_iova_contig_mempool = false;
 
if (!need_iova_contig_obj) {
pg_sz = 0;
@@ -506,7 +496,6 @@ rte_mempool_populate_default(struct rte_mempool *mp)
pg_sz = 0;
pg_shift = 0;
} else if (rte_eal_has_hugepages() || alloc_in_ext_mem) {
-   try_iova_contig_mempool = true;
pg_sz = get_min_page_size(mp->socket_id);
pg_shift = rte_bsf32(pg_sz);
} else {
@@ -518,12 +507,8 @@ rte_mempool_populate_default(struct rte_mempool *mp)
size_t min_chunk_size;
unsigned int flags;
 
-   if (try_iova_contig_mempool || pg_sz == 0)
-   mem_size = rte_mempool_ops_calc_mem_size(mp, n,
-   0, &min_chunk_size, &align);
-   else
-   mem_size = rte_mempool_ops_calc_mem_size(mp, n,
-   pg_shift, &min_chunk_size, &align);
+   mem_size = rte_mempool_ops_calc_mem_size(
+   mp, n, pg_shift, &min_chunk_size, &align);
 
if (mem_size < 0) {
ret = mem_size;
@@ -542,31 +527,12 @@ rte_mempool_populate_default(struct rte_mempool *mp)
/* if we're trying to reserve contiguous memory, add appropriate
 * memzone flag.
 */
-   if (try_iova_contig_mempool)
+   if (min_chunk_size == (size_t)mem_size)
flags |= RTE_MEMZONE_IOVA_CONTIG;
 
mz = rte_memzone_reserve_aligned(mz_name, mem_size,
mp->socket_id, flags, align);
 
-   /* if we were trying to allocate contiguous memory, failed a

[dpdk-dev] [RFC 1/4] mempool: clarify default populate function

[Olivier Matz]

No functional change. Clarify the populate function to make
the next commit easier to understand.

Rename the variables:
- to avoid negation in the name
- to have more understandable names

Remove useless variable (no_pageshift is equivalent to pg_sz == 0).

Remove duplicate affectation of "external" variable.

Signed-off-by: Olivier Matz 
---
 lib/librte_mempool/rte_mempool.c | 50 +---
 1 file changed, 26 insertions(+), 24 deletions(-)

diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 7260ce0be..0f29e8712 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -429,24 +429,18 @@ rte_mempool_populate_default(struct rte_mempool *mp)
rte_iova_t iova;
unsigned mz_id, n;
int ret;
-   bool no_contig, try_contig, no_pageshift, external;
+   bool need_iova_contig_obj;
+   bool try_iova_contig_mempool;
+   bool alloc_in_ext_mem;
 
ret = mempool_ops_alloc_once(mp);
if (ret != 0)
return ret;
 
-   /* check if we can retrieve a valid socket ID */
-   ret = rte_malloc_heap_socket_is_external(mp->socket_id);
-   if (ret < 0)
-   return -EINVAL;
-   external = ret;
-
/* mempool must not be populated */
if (mp->nb_mem_chunks != 0)
return -EEXIST;
 
-   no_contig = mp->flags & MEMPOOL_F_NO_IOVA_CONTIG;
-
/*
 * the following section calculates page shift and page size values.
 *
@@ -496,16 +490,23 @@ rte_mempool_populate_default(struct rte_mempool *mp)
 * to go for contiguous memory even if we're in no-huge mode, because
 * external memory may in fact be IOVA-contiguous.
 */
-   external = rte_malloc_heap_socket_is_external(mp->socket_id) == 1;
-   no_pageshift = no_contig ||
-   (!external && rte_eal_iova_mode() == RTE_IOVA_VA);
-   try_contig = !no_contig && !no_pageshift &&
-   (rte_eal_has_hugepages() || external);
 
-   if (no_pageshift) {
+   /* check if we can retrieve a valid socket ID */
+   ret = rte_malloc_heap_socket_is_external(mp->socket_id);
+   if (ret < 0)
+   return -EINVAL;
+   alloc_in_ext_mem = (ret == 1);
+   need_iova_contig_obj = !(mp->flags & MEMPOOL_F_NO_IOVA_CONTIG);
+   try_iova_contig_mempool = false;
+
+   if (!need_iova_contig_obj) {
+   pg_sz = 0;
+   pg_shift = 0;
+   } else if (!alloc_in_ext_mem && rte_eal_iova_mode() == RTE_IOVA_VA) {
pg_sz = 0;
pg_shift = 0;
-   } else if (try_contig) {
+   } else if (rte_eal_has_hugepages() || alloc_in_ext_mem) {
+   try_iova_contig_mempool = true;
pg_sz = get_min_page_size(mp->socket_id);
pg_shift = rte_bsf32(pg_sz);
} else {
@@ -517,7 +518,7 @@ rte_mempool_populate_default(struct rte_mempool *mp)
size_t min_chunk_size;
unsigned int flags;
 
-   if (try_contig || no_pageshift)
+   if (try_iova_contig_mempool || pg_sz == 0)
mem_size = rte_mempool_ops_calc_mem_size(mp, n,
0, &min_chunk_size, &align);
else
@@ -541,7 +542,7 @@ rte_mempool_populate_default(struct rte_mempool *mp)
/* if we're trying to reserve contiguous memory, add appropriate
 * memzone flag.
 */
-   if (try_contig)
+   if (try_iova_contig_mempool)
flags |= RTE_MEMZONE_IOVA_CONTIG;
 
mz = rte_memzone_reserve_aligned(mz_name, mem_size,
@@ -551,8 +552,9 @@ rte_mempool_populate_default(struct rte_mempool *mp)
 * minimum required contiguous chunk fits minimum page, adjust
 * memzone size to the page size, and try again.
 */
-   if (mz == NULL && try_contig && min_chunk_size <= pg_sz) {
-   try_contig = false;
+   if (mz == NULL && try_iova_contig_mempool &&
+   min_chunk_size <= pg_sz) {
+   try_iova_contig_mempool = false;
flags &= ~RTE_MEMZONE_IOVA_CONTIG;
 
mem_size = rte_mempool_ops_calc_mem_size(mp, n,
@@ -587,12 +589,12 @@ rte_mempool_populate_default(struct rte_mempool *mp)
goto fail;
}
 
-   if (no_contig)
-   iova = RTE_BAD_IOVA;
-   else
+   if (need_iova_contig_obj)
iova = mz->iova;
+   else
+   iova = RTE_BAD_IOVA;
 
-   if (no_pageshift || try_contig)
+   if (try_iova_contig_mempool || pg_sz == 0)
ret = rte_mempool_populate_iova(mp, mz->addr,
  

Re: [dpdk-dev] [PATCH v2] net: be more restrictive in accepted ether string formats

[Olivier Matz]

On Thu, Jul 18, 2019 at 11:35:44AM -0700, Stephen Hemminger wrote:
> The current ether_unformat_addr code was based off of
> BSD ether_aton. That version changed what was allowed
> by the cmdline ether address parser.
> For example, it allows dropping leading zeros.
> 
> Change the code to be more restrictive and only allow the fully
> expanded standard formats.
> 
> Bugzilla ID: 324
> Fixes: 596d31092d32 ("net: add function to convert string to ethernet 
> address")
> Signed-off-by: Stephen Hemminger 

Reviewed-by: Olivier Matz 

Re: [dpdk-dev] [EXT] [PATCH v3 1/3] eal/arm64: add 128-bit atomic compare exchange

[Phil Yang (Arm Technology China)]

> -Original Message-
> From: Jerin Jacob Kollanukkaran 
> Sent: Friday, July 19, 2019 8:35 PM
> To: Phil Yang (Arm Technology China) ; dev@dpdk.org
> Cc: tho...@monjalon.net; hemant.agra...@nxp.com; Honnappa
> Nagarahalli ; Gavin Hu (Arm Technology
> China) ; nd ; gage.e...@intel.com; nd
> 
> Subject: RE: [EXT] [PATCH v3 1/3] eal/arm64: add 128-bit atomic compare
> exchange
> 
> > > > +#define RTE_HAS_ACQ(mo) ((mo) != __ATOMIC_RELAXED && (mo) !=
> > > > +__ATOMIC_RELEASE) #define RTE_HAS_RLS(mo) ((mo) ==
> > > > __ATOMIC_RELEASE || \
> > > > +(mo) == __ATOMIC_ACQ_REL || \
> > > > +(mo) == __ATOMIC_SEQ_CST)
> > > > +
> > > > +#define RTE_MO_LOAD(mo)  (RTE_HAS_ACQ((mo)) \
> > > > +   ? __ATOMIC_ACQUIRE : __ATOMIC_RELAXED) #define
> > > > RTE_MO_STORE(mo)
> > > > +(RTE_HAS_RLS((mo)) \
> > > > +   ? __ATOMIC_RELEASE : __ATOMIC_RELAXED)
> > > > +
> > >
> > > The one starts with RTE_ are public symbols, If it is generic enough,
> > > Move to common layer so that every architecturse can use.
> > > If you think, otherwise make it internal
> >
> > Let's keep it internal. I will remove the 'RTE_' tag.
> 
> Probably change to __HAS_ACQ to avoid collision(just in case)

OK.

> 
> > >
> > >
> > >
> > > > +#ifdef __ARM_FEATURE_ATOMICS
> > >
> > > This define is added in gcc 9.1 and I believe for clang it is not 
> > > supported
> yet.
> > > So old gcc and clang this will be undefined.
> > > I think, With meson + native build, we  can find the presence of
> > > ATOMIC support by running a.out. Not sure about make and cross build
> case.
> > > I don't want block this feature because of this, IMO, We can add this
> > > code with  existing __ARM_FEATURE_ATOMICS scheme and later find a
> > > method to enhance it. But please check how to fix it.
> >
> > OK.
> 
> After thinking on this a bit, I think,  in order to support old gcc(< gcc 
> 9.1) and
> clang,
> We can introduce a config option, where, by default it is disabled and enable
> In specific config(where we know, lse is supported) and meson config.
> 
> i.e
> #if defined(__ARM_FEATURE_ATOMICS) ||
> defined(RTE_ARM_FEATURE_ATOMICS)

Cool

> 
> 
> >
> > >
> > > > +#define __ATOMIC128_CAS_OP(cas_op_name, op_string)
> \
> > > > +static inline rte_int128_t 
> > > >  \
> > > > +cas_op_name(rte_int128_t *dst, rte_int128_t old,   
> > > >  \
> > > > +   rte_int128_t updated)   
> > > > \
> > > > +{  
> > > >  \
> > > > +   /* caspX instructions register pair must start from 
> > > > even-numbered
> > > > +* register at operand 1.
> > > > +* So, specify registers for local variables here.
> > > > +*/ 
> > > > \
> > > > +   register uint64_t x0 __asm("x0") = (uint64_t)old.val[0];
> > > > \
> > >
> > > Since direct x0 register used in the code and
> > > cas_op_name() and rte_atomic128_cmp_exchange() is inline function,
> > > Based on parent function load, we may corrupt x0 register aka
> >
> > Since x0/x1 and x2/x3 are used a lot and often contain live values.
> > Maybe to change them to some relatively less frequently used registers
> like
> > x14/x15 and x16/x17 might help for this case?
> > According to the PCS (Procedure Call Standard), x14-x17 are also temporary
> > registers.
> 
> X14-x17 are temporary registers but since
> cas_op_name() and rte_atomic128_cmp_exchange() are inline functions,
> Based on the parent function register usage, it _may_ corrupt.

Just checked how Linux Kernel does similar things:
https://github.com/torvalds/linux/blob/master/arch/arm64/include/asm/atomic_lse.h#L19
 

Same methods.

I will finish the benchmarking for the no_inline approach. If it has no 
significant performance loss, I think we can make it as no_inline.  

> 
> 
> >
> > > Break arm64 ABI. Not sure clobber list will help here or not?
> >
> > In my understanding, for the register variable, if it contains a live value 
> > in
> the
> > specified register, the compiler will move the live value into a free 
> > register.
> > Since x0~x3 are present in the input/output operands and x0/x1's value
> needs to
> > be restored to the variable 'old' as a return value.
> > So I didn't add them into the clobber list.
> 
> OK
> 
> >
> > > Making it as no_inline will help but not sure about the performance
> impact.
> > > May be you can check with compiler team.
> > >
> > > We burned our hands with this scheme, see
> > > 5b40ec6b966260e0ff66a8a2c689664f75d6a0e6 ("mempool/octeontx2: fix
> > > possible arm64 ABI break")
> > >
> > > Probably we can choose a scheme for rc2 and adjust as when we have
> > > complete clarity.
> > >
> > > >
> > > > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_ARM64)
> > >
> > > T

Re: [dpdk-dev] [RFC 4/4] mempool: prevent objects from being across pages

[Burakov, Anatoly]

On 19-Jul-19 2:38 PM, Olivier Matz wrote:

When using iova contiguous memory and objets smaller than page size,
ensure that objects are not located across several pages.

Signed-off-by: Vamsi Krishna Attunuru 
Signed-off-by: Olivier Matz 
---
  lib/librte_mempool/rte_mempool_ops_default.c | 39 ++--
  1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/lib/librte_mempool/rte_mempool_ops_default.c 
b/lib/librte_mempool/rte_mempool_ops_default.c
index 4e2bfc82d..2bbd67367 100644
--- a/lib/librte_mempool/rte_mempool_ops_default.c
+++ b/lib/librte_mempool/rte_mempool_ops_default.c
@@ -45,19 +45,54 @@ rte_mempool_op_calc_mem_size_default(const struct 
rte_mempool *mp,
return mem_size;
  }
  
+/* Returns -1 if object falls on a page boundary, else returns 0 */

+static inline int
+mempool_check_obj_bounds(void *obj, uint64_t pg_sz, size_t elt_sz)
+{
+   uintptr_t page_end, elt_addr = (uintptr_t)obj;
+   uint32_t pg_shift;
+   uint64_t page_mask;
+
+   if (pg_sz == 0)
+   return 0;
+   if (elt_sz > pg_sz)
+   return 0;
+
+   pg_shift = rte_bsf32(pg_sz);
+   page_mask =  ~((1ull << pg_shift) - 1);
+   page_end = (elt_addr & page_mask) + pg_sz;


This looks like RTE_PTR_ALIGN should do this without the magic? E.g.

page_end = RTE_PTR_ALIGN(elt_addr, pg_sz)

would that not be equivalent?

--
Thanks,
Anatoly

Re: [dpdk-dev] [RFC 4/4] mempool: prevent objects from being across pages

[Burakov, Anatoly]

On 19-Jul-19 2:38 PM, Olivier Matz wrote:

When using iova contiguous memory and objets smaller than page size,
ensure that objects are not located across several pages.

Signed-off-by: Vamsi Krishna Attunuru 
Signed-off-by: Olivier Matz 
---





total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
  
-	for (off = 0, i = 0; off + total_elt_sz <= len && i < max_objs; i++) {

+   for (off = 0, i = 0; i < max_objs; i++) {
+   /* align offset to next page start if required */
+   if (mempool_check_obj_bounds((char *)vaddr + off,
+   pg_sz, total_elt_sz) < 0) {
+   off += RTE_PTR_ALIGN_CEIL((char *)vaddr + off, pg_sz) -
+   ((char *)vaddr + off);


Same here, PTR_ALIGN plus PTR_SUB. It's perhaps not as cool as a 
one-liner, but this is not a hot path :)


--
Thanks,
Anatoly

[dpdk-dev] [PATCH v6 00/11] sched: feature enhancements

[Jasvinder Singh]

This patchset refactors the dpdk qos sched library to allow flexibile
configuration of the pipe traffic classes and queue sizes.

Currently, each pipe has 16 queues hardwired into 4 TCs scheduled with
strict priority, and each TC has exactly with 4 queues that are
scheduled with Weighted Fair Queuing (WFQ).

Instead of hardwiring queues to traffic class within the specific pipe,
the new implementation allows more flexible/configurable split of pipe
queues between strict priority (SP) and best-effort (BE) traffic classes
along with the support of more number of traffic classes i.e. max 16.
   
All the high priority TCs (TC1, TC2, ...) have exactly 1 queue, while
the lowest priority best-effort traffic class can have 1, 4 or 8 queues.
This is justified by the fact that all the high priority TCs are fully
provisioned (small to medium traffic rates), while most of the traffic
fits into the BE class, which is typically oversubscribed.

Furthermore, this change allows to use less than 16 queues per pipe when
not all the 16 queues are needed. Therefore, no memory will be allocated
to the queues that are not needed.

v6:
- add functions to access port internal struct fields (e.g. pipe queues and tc)
- Move definition of RTE_SCHED_TRAFFIC_CLASS_BE to rte_sched.h
- fix doxygen comments

v5:
- fix traffic class and queue mapping in api function
- remove n_be_queues parameter from internal pipe profile and pipe struct
- replace int multiplication in grinder_schedule func with bitwise & operation
- remove TC_OV logic flag from all the configuration/initialization code
- fix traffic qsize per traffic class instead of individual queue of the pipe

v4:
- fix build errors
- fix checkpatch errors

v3:
- remove code related to subport level configuration of the pipe 
- remove tc oversubscription flag from struct rte_sched_pipe_params
- replace RTE_SCHED_PIPE_PROFILES_PER_PORT with port param field

v2:
- fix bug in subport parameters check
- remove redundant RTE_SCHED_SUBPORT_PER_PORT macro
- fix bug in grinder_scheduler function
- improve doxygen comments 
- add error log information

Jasvinder Singh (11):
  sched: remove wrr from strict priority tc queues
  sched: add config flexibility to tc queue sizes
  sched: add max pipe profiles config in run time
  sched: rename tc3 params to best-effort tc
  sched: improve error log messages
  sched: improve doxygen comments
  net/softnic: add config flexibility to softnic tm
  test_sched: modify tests for config flexibility
  examples/ip_pipeline: add config flexibility to tm function
  examples/qos_sched: add tc and queue config flexibility
  sched: remove redundant macros

 app/test/test_sched.c |  15 +-
 doc/guides/rel_notes/release_19_08.rst|  10 +-
 drivers/net/softnic/rte_eth_softnic.c |  98 ++
 drivers/net/softnic/rte_eth_softnic_cli.c | 448 -
 .../net/softnic/rte_eth_softnic_internals.h   |   6 +-
 drivers/net/softnic/rte_eth_softnic_tm.c  | 121 ++-
 examples/ip_pipeline/cli.c|  43 +-
 examples/ip_pipeline/tmgr.h   |   4 +-
 examples/qos_sched/app_thread.c   |  11 +-
 examples/qos_sched/cfg_file.c | 130 ++-
 examples/qos_sched/init.c |  65 +-
 examples/qos_sched/main.h |   4 +
 examples/qos_sched/profile.cfg|  67 +-
 examples/qos_sched/profile_ov.cfg |  54 +-
 examples/qos_sched/stats.c| 517 ++-
 lib/librte_pipeline/rte_table_action.c|   1 -
 lib/librte_pipeline/rte_table_action.h|   4 +-
 lib/librte_sched/Makefile |   2 +-
 lib/librte_sched/meson.build  |   2 +-
 lib/librte_sched/rte_sched.c  | 857 --
 lib/librte_sched/rte_sched.h  | 187 ++--
 21 files changed, 1874 insertions(+), 772 deletions(-)

-- 
2.21.0

[dpdk-dev] [PATCH v6 01/11] sched: remove wrr from strict priority tc queues

[Jasvinder Singh]

All higher priority traffic classes contain only one queue, thus
remove wrr function for them. The lowest priority best-effort
traffic class conitnue to have multiple queues and packet are
scheduled from its queues using wrr function.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 app/test/test_sched.c|   2 +-
 examples/qos_sched/init.c|   2 +-
 lib/librte_sched/Makefile|   2 +-
 lib/librte_sched/meson.build |   2 +-
 lib/librte_sched/rte_sched.c | 151 +++
 lib/librte_sched/rte_sched.h |  27 +--
 6 files changed, 108 insertions(+), 78 deletions(-)

diff --git a/app/test/test_sched.c b/app/test/test_sched.c
index 49bb9ea6f..36fa2d425 100644
--- a/app/test/test_sched.c
+++ b/app/test/test_sched.c
@@ -40,7 +40,7 @@ static struct rte_sched_pipe_params pipe_profile[] = {
.tc_rate = {305175, 305175, 305175, 305175},
.tc_period = 40,
 
-   .wrr_weights = {1, 1, 1, 1,  1, 1, 1, 1,  1, 1, 1, 1,  1, 1, 1, 
1},
+   .wrr_weights = {1, 1, 1, 1},
},
 };
 
diff --git a/examples/qos_sched/init.c b/examples/qos_sched/init.c
index 1209bd7ce..6b63d4e0e 100644
--- a/examples/qos_sched/init.c
+++ b/examples/qos_sched/init.c
@@ -186,7 +186,7 @@ static struct rte_sched_pipe_params 
pipe_profiles[RTE_SCHED_PIPE_PROFILES_PER_PO
.tc_ov_weight = 1,
 #endif
 
-   .wrr_weights = {1, 1, 1, 1,  1, 1, 1, 1,  1, 1, 1, 1,  1, 1, 1, 
1},
+   .wrr_weights = {1, 1, 1, 1},
},
 };
 
diff --git a/lib/librte_sched/Makefile b/lib/librte_sched/Makefile
index 644fd9d15..3d7f410e1 100644
--- a/lib/librte_sched/Makefile
+++ b/lib/librte_sched/Makefile
@@ -18,7 +18,7 @@ LDLIBS += -lrte_timer
 
 EXPORT_MAP := rte_sched_version.map
 
-LIBABIVER := 2
+LIBABIVER := 3
 
 #
 # all source are stored in SRCS-y
diff --git a/lib/librte_sched/meson.build b/lib/librte_sched/meson.build
index 8e989e5f6..59d43c6d8 100644
--- a/lib/librte_sched/meson.build
+++ b/lib/librte_sched/meson.build
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017 Intel Corporation
 
-version = 2
+version = 3
 sources = files('rte_sched.c', 'rte_red.c', 'rte_approx.c')
 headers = files('rte_sched.h', 'rte_sched_common.h',
'rte_red.h', 'rte_approx.h')
diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c
index bc06bc3f4..1592c804b 100644
--- a/lib/librte_sched/rte_sched.c
+++ b/lib/librte_sched/rte_sched.c
@@ -37,6 +37,7 @@
 
 #define RTE_SCHED_TB_RATE_CONFIG_ERR  (1e-7)
 #define RTE_SCHED_WRR_SHIFT   3
+#define RTE_SCHED_MAX_QUEUES_PER_TC   RTE_SCHED_BE_QUEUES_PER_PIPE
 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
 #define RTE_SCHED_PIPE_INVALIDUINT32_MAX
 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
@@ -84,8 +85,8 @@ struct rte_sched_pipe_profile {
uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint8_t tc_ov_weight;
 
-   /* Pipe queues */
-   uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
+   /* Pipe best-effort traffic class queues */
+   uint8_t  wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
 struct rte_sched_pipe {
@@ -101,7 +102,7 @@ struct rte_sched_pipe {
uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 
/* Weighted Round Robin (WRR) */
-   uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
+   uint8_t wrr_tokens[RTE_SCHED_BE_QUEUES_PER_PIPE];
 
/* TC oversubscription */
uint32_t tc_ov_credits;
@@ -153,16 +154,16 @@ struct rte_sched_grinder {
uint32_t tc_index;
struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
+   uint32_t qindex[RTE_SCHED_MAX_QUEUES_PER_TC];
uint16_t qsize;
uint32_t qmask;
uint32_t qpos;
struct rte_mbuf *pkt;
 
/* WRR */
-   uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
-   uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
-   uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
+   uint16_t wrr_tokens[RTE_SCHED_BE_QUEUES_PER_PIPE];
+   uint16_t wrr_mask[RTE_SCHED_BE_QUEUES_PER_PIPE];
+   uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
 struct rte_sched_port {
@@ -483,7 +484,7 @@ rte_sched_port_log_pipe_profile(struct rte_sched_port 
*port, uint32_t i)
"Token bucket: period = %u, credits per period = %u, size = 
%u\n"
"Traffic classes: period = %u, credits per period = [%u, 
%u, %u, %u]\n"
"Traffic class 3 oversubscription: weight = %hhu\n"
-   "WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, 
%hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
+   " 

[dpdk-dev] [PATCH v6 02/11] sched: add config flexibility to tc queue sizes

[Jasvinder Singh]

Add support for zero queue sizes of the traffic classes. The queues
which are not used can be set to zero size. This helps in reducing
memory footprint of the hierarchical scheduler.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 lib/librte_sched/rte_sched.c | 379 +--
 lib/librte_sched/rte_sched.h |   5 +-
 2 files changed, 236 insertions(+), 148 deletions(-)

diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c
index 1592c804b..17d7f833c 100644
--- a/lib/librte_sched/rte_sched.c
+++ b/lib/librte_sched/rte_sched.c
@@ -145,15 +145,15 @@ struct rte_sched_grinder {
struct rte_sched_pipe_profile *pipe_params;
 
/* TC cache */
-   uint8_t tccache_qmask[4];
-   uint32_t tccache_qindex[4];
+   uint8_t tccache_qmask[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
+   uint32_t tccache_qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t tccache_w;
uint32_t tccache_r;
 
/* Current TC */
uint32_t tc_index;
-   struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
+   struct rte_sched_queue *queue[RTE_SCHED_MAX_QUEUES_PER_TC];
+   struct rte_mbuf **qbase[RTE_SCHED_MAX_QUEUES_PER_TC];
uint32_t qindex[RTE_SCHED_MAX_QUEUES_PER_TC];
uint16_t qsize;
uint32_t qmask;
@@ -171,6 +171,9 @@ struct rte_sched_port {
uint32_t n_subports_per_port;
uint32_t n_pipes_per_subport;
uint32_t n_pipes_per_subport_log2;
+   uint16_t pipe_queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
+   uint8_t pipe_tc[RTE_SCHED_QUEUES_PER_PIPE];
+   uint8_t tc_queue[RTE_SCHED_QUEUES_PER_PIPE];
uint32_t rate;
uint32_t mtu;
uint32_t frame_overhead;
@@ -256,14 +259,38 @@ rte_sched_port_qbase(struct rte_sched_port *port, 
uint32_t qindex)
 static inline uint16_t
 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
 {
-   uint32_t tc = (qindex >> 2) & 0x3;
+   uint32_t tc = port->pipe_tc[qindex & (RTE_SCHED_QUEUES_PER_PIPE - 1)];
 
return port->qsize[tc];
 }
 
+static inline uint16_t
+rte_sched_port_pipe_queue(struct rte_sched_port *port, uint32_t traffic_class)
+{
+   uint16_t pipe_queue = port->pipe_queue[traffic_class];
+
+   return pipe_queue;
+}
+
+static inline uint8_t
+rte_sched_port_pipe_tc(struct rte_sched_port *port, uint32_t qindex)
+{
+   uint8_t pipe_tc = port->pipe_tc[qindex & (RTE_SCHED_QUEUES_PER_PIPE - 
1)];
+
+   return pipe_tc;
+}
+
+static inline uint8_t
+rte_sched_port_tc_queue(struct rte_sched_port *port, uint32_t qindex)
+{
+   uint8_t tc_queue = port->tc_queue[qindex & (RTE_SCHED_QUEUES_PER_PIPE - 
1)];
+
+   return tc_queue;
+}
+
 static int
 pipe_profile_check(struct rte_sched_pipe_params *params,
-   uint32_t rate)
+   uint32_t rate, uint16_t *qsize)
 {
uint32_t i;
 
@@ -280,25 +307,27 @@ pipe_profile_check(struct rte_sched_pipe_params *params,
if (params->tb_size == 0)
return -12;
 
-   /* TC rate: non-zero, less than pipe rate */
+   /* TC rate: non-zero if qsize non-zero, less than pipe rate */
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
-   if (params->tc_rate[i] == 0 ||
-   params->tc_rate[i] > params->tb_rate)
+   if ((qsize[i] == 0 && params->tc_rate[i] != 0) ||
+   (qsize[i] != 0 && (params->tc_rate[i] == 0 ||
+   params->tc_rate[i] > params->tb_rate)))
return -13;
}
+   if (params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE] == 0 ||
+   qsize[RTE_SCHED_TRAFFIC_CLASS_BE] == 0)
+   return -13;
 
/* TC period: non-zero */
if (params->tc_period == 0)
return -14;
 
-#ifdef RTE_SCHED_SUBPORT_TC_OV
/* TC3 oversubscription weight: non-zero */
if (params->tc_ov_weight == 0)
return -15;
-#endif
 
/* Queue WRR weights: non-zero */
-   for (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++) {
+   for (i = 0; i < RTE_SCHED_BE_QUEUES_PER_PIPE; i++) {
if (params->wrr_weights[i] == 0)
return -16;
}
@@ -343,7 +372,8 @@ rte_sched_port_check_params(struct rte_sched_port_params 
*params)
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
uint16_t qsize = params->qsize[i];
 
-   if (qsize == 0 || !rte_is_power_of_2(qsize))
+   if ((qsize != 0 && !rte_is_power_of_2(qsize)) ||
+   ((i == RTE_SCHED_TRAFFIC_CLASS_BE) && (qsize == 0)))
return -8;
}
 
@@ -357,7 +387,7 @@ rte_sched_port_check_params(struct rte_sched_port_params 
*params)
struct rte_sched_pipe_params *p = params->pipe_profiles + i;
int status;
 
-  

[dpdk-dev] [PATCH v6 06/11] sched: improve doxygen comments

[Jasvinder Singh]

Improve doxygen comments.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 lib/librte_sched/rte_sched.h | 152 ++-
 1 file changed, 94 insertions(+), 58 deletions(-)

diff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h
index d7d4f1767..fffbad696 100644
--- a/lib/librte_sched/rte_sched.h
+++ b/lib/librte_sched/rte_sched.h
@@ -52,7 +52,7 @@ extern "C" {
  * multiple connections of same traffic class belonging to
  * the same user;
  *   - Weighted Round Robin (WRR) is used to service the
- * queues within same pipe traffic class.
+ * queues within same pipe lowest priority traffic class (best-effort).
  *
  */
 
@@ -83,7 +83,8 @@ extern "C" {
 #define RTE_SCHED_BE_QUEUES_PER_PIPE4
 
 /** Number of traffic classes per pipe (as well as subport).
- * Cannot be changed.
+ * @see struct rte_sched_subport_params
+ * @see struct rte_sched_pipe_params
  */
 #define RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE\
 (RTE_SCHED_QUEUES_PER_PIPE - RTE_SCHED_BE_QUEUES_PER_PIPE + 1)
@@ -113,6 +114,8 @@ extern "C" {
  *
  * The FCS is considered overhead only if not included in the packet
  * length (field pkt_len of struct rte_mbuf).
+ *
+ * @see struct rte_sched_port_params
  */
 #ifndef RTE_SCHED_FRAME_OVERHEAD_DEFAULT
 #define RTE_SCHED_FRAME_OVERHEAD_DEFAULT  24
@@ -128,34 +131,36 @@ extern "C" {
  * byte.
  */
 struct rte_sched_subport_params {
-   /* Subport token bucket */
-   uint32_t tb_rate;/**< Rate (measured in bytes per 
second) */
-   uint32_t tb_size;/**< Size (measured in credits) */
+   /** Token bucket rate (measured in bytes per second) */
+   uint32_t tb_rate;
+
+   /** Token bucket size (measured in credits) */
+   uint32_t tb_size;
 
-   /* Subport traffic classes */
+   /** Traffic class rates (measured in bytes per second) */
uint32_t tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   /**< Traffic class rates (measured in bytes per second) */
+
+   /** Enforcement period for rates (measured in milliseconds) */
uint32_t tc_period;
-   /**< Enforcement period for rates (measured in milliseconds) */
 };
 
 /** Subport statistics */
 struct rte_sched_subport_stats {
-   /* Packets */
+   /** Number of packets successfully written */
uint32_t n_pkts_tc[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   /**< Number of packets successfully written */
+
+   /** Number of packets dropped */
uint32_t n_pkts_tc_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   /**< Number of packets dropped */
 
-   /* Bytes */
+   /** Number of bytes successfully written for each traffic class */
uint32_t n_bytes_tc[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   /**< Number of bytes successfully written for each traffic class */
+
+   /** Number of bytes dropped for each traffic class */
uint32_t n_bytes_tc_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   /**< Number of bytes dropped for each traffic class */
 
 #ifdef RTE_SCHED_RED
+   /** Number of packets dropped by red */
uint32_t n_pkts_red_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   /**< Number of packets dropped by red */
 #endif
 };
 
@@ -169,61 +174,90 @@ struct rte_sched_subport_stats {
  * byte.
  */
 struct rte_sched_pipe_params {
-   /* Pipe token bucket */
-   uint32_t tb_rate;/**< Rate (measured in bytes per 
second) */
-   uint32_t tb_size;/**< Size (measured in credits) */
+   /** Token bucket rate (measured in bytes per second) */
+   uint32_t tb_rate;
 
-   /* Pipe traffic classes */
+   /** Token bucket size (measured in credits) */
+   uint32_t tb_size;
+
+   /** Traffic class rates (measured in bytes per second) */
uint32_t tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
-   /**< Traffic class rates (measured in bytes per second) */
+
+   /** Enforcement period (measured in milliseconds) */
uint32_t tc_period;
-   /**< Enforcement period (measured in milliseconds) */
-   uint8_t tc_ov_weight;/**< Weight Traffic class 3 
oversubscription */
 
-   /* Pipe queues */
-   uint8_t  wrr_weights[RTE_SCHED_BE_QUEUES_PER_PIPE]; /**< WRR weights */
+   /** Best-effort traffic class oversubscription weight */
+   uint8_t tc_ov_weight;
+
+   /** WRR weights of best-effort traffic class queues */
+   uint8_t wrr_weights[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
 /** Queue statistics */
 struct rte_sched_queue_stats {
-   /* Packets */
-   uint32_t n_pkts; /**< Packets successfully written */
-   uint32_t n_pkts_dropped; /**< Packets dropped */
+   /** Packets successfully written */
+   uint32_t n_pkts;
+
+   /** Packets dropped */
+   uint32_t n_pkts_dropped;
+
 #ifdef RTE_SCHED_RED

[dpdk-dev] [PATCH v6 05/11] sched: improve error log messages

[Jasvinder Singh]

Replace hard-coded numbers for reporting errors with
error messages.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 lib/librte_sched/rte_sched.c | 293 ++-
 1 file changed, 221 insertions(+), 72 deletions(-)

diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c
index 7e000c249..a173c7dbd 100644
--- a/lib/librte_sched/rte_sched.c
+++ b/lib/librte_sched/rte_sched.c
@@ -296,41 +296,66 @@ pipe_profile_check(struct rte_sched_pipe_params *params,
uint32_t i;
 
/* Pipe parameters */
-   if (params == NULL)
-   return -10;
+   if (params == NULL) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for parameter params\n", __func__);
+   return -EINVAL;
+   }
 
/* TB rate: non-zero, not greater than port rate */
if (params->tb_rate == 0 ||
-   params->tb_rate > rate)
-   return -11;
+   params->tb_rate > rate) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for tb rate\n", __func__);
+   return -EINVAL;
+   }
 
/* TB size: non-zero */
-   if (params->tb_size == 0)
-   return -12;
+   if (params->tb_size == 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for tb size\n", __func__);
+   return -EINVAL;
+   }
 
/* TC rate: non-zero if qsize non-zero, less than pipe rate */
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
if ((qsize[i] == 0 && params->tc_rate[i] != 0) ||
(qsize[i] != 0 && (params->tc_rate[i] == 0 ||
-   params->tc_rate[i] > params->tb_rate)))
-   return -13;
+   params->tc_rate[i] > params->tb_rate))) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for qsize or tc_rate\n", 
__func__);
+   return -EINVAL;
+   }
}
+
if (params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE] == 0 ||
-   qsize[RTE_SCHED_TRAFFIC_CLASS_BE] == 0)
-   return -13;
+   qsize[RTE_SCHED_TRAFFIC_CLASS_BE] == 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for be traffic class rate\n", 
__func__);
+   return -EINVAL;
+   }
 
/* TC period: non-zero */
-   if (params->tc_period == 0)
-   return -14;
+   if (params->tc_period == 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for tc period\n", __func__);
+   return -EINVAL;
+   }
 
/*  Best effort tc oversubscription weight: non-zero */
-   if (params->tc_ov_weight == 0)
-   return -15;
+   if (params->tc_ov_weight == 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for tc ov weight\n", __func__);
+   return -EINVAL;
+   }
 
/* Queue WRR weights: non-zero */
for (i = 0; i < RTE_SCHED_BE_QUEUES_PER_PIPE; i++) {
-   if (params->wrr_weights[i] == 0)
-   return -16;
+   if (params->wrr_weights[i] == 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for qsize or wrr 
weight\n", __func__);
+   return -EINVAL;
+   }
}
 
return 0;
@@ -341,56 +366,83 @@ rte_sched_port_check_params(struct rte_sched_port_params 
*params)
 {
uint32_t i;
 
-   if (params == NULL)
-   return -1;
+   if (params == NULL) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for parameter params\n", __func__);
+   return -EINVAL;
+   }
 
/* socket */
-   if (params->socket < 0)
-   return -3;
+   if (params->socket < 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for socket id\n", __func__);
+   return -EINVAL;
+   }
 
/* rate */
-   if (params->rate == 0)
-   return -4;
+   if (params->rate == 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for rate\n", __func__);
+   return -EINVAL;
+   }
 
/* mtu */
-   if (params->mtu == 0)
-   return -5;
+   if (params->mtu == 0) {
+   RTE_LOG(ERR, SCHED,
+   "%s: Incorrect value for mtu\n", __func__);
+   return -EINVAL;
+   }
 
/* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
if (params->n_subports_per_port == 0 ||
params->n_subports_per_port > 1u << 16 ||
-   !rte_is_power_of_2(params->n_subports_per_port))
-   return -6;
+ 

[dpdk-dev] [PATCH v6 03/11] sched: add max pipe profiles config in run time

[Jasvinder Singh]

Allow setting the maximum number of pipe profiles in run time.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 lib/librte_sched/rte_sched.c | 8 +---
 lib/librte_sched/rte_sched.h | 2 ++
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c
index 17d7f833c..e8614ba4c 100644
--- a/lib/librte_sched/rte_sched.c
+++ b/lib/librte_sched/rte_sched.c
@@ -179,6 +179,7 @@ struct rte_sched_port {
uint32_t frame_overhead;
uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t n_pipe_profiles;
+   uint32_t n_max_pipe_profiles;
uint32_t pipe_tc3_rate_max;
 #ifdef RTE_SCHED_RED
struct rte_red_config 
red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];
@@ -380,7 +381,7 @@ rte_sched_port_check_params(struct rte_sched_port_params 
*params)
/* pipe_profiles and n_pipe_profiles */
if (params->pipe_profiles == NULL ||
params->n_pipe_profiles == 0 ||
-   params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
+   params->n_pipe_profiles > params->n_max_pipe_profiles)
return -9;
 
for (i = 0; i < params->n_pipe_profiles; i++) {
@@ -409,7 +410,7 @@ rte_sched_port_get_array_base(struct rte_sched_port_params 
*params, enum rte_sch
uint32_t size_queue_extra
= n_queues_per_port * sizeof(struct rte_sched_queue_extra);
uint32_t size_pipe_profiles
-   = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct 
rte_sched_pipe_profile);
+   = params->n_max_pipe_profiles * sizeof(struct 
rte_sched_pipe_profile);
uint32_t size_bmp_array = 
rte_bitmap_get_memory_footprint(n_queues_per_port);
uint32_t size_per_pipe_queue_array, size_queue_array;
 
@@ -686,6 +687,7 @@ rte_sched_port_config(struct rte_sched_port_params *params)
port->frame_overhead = params->frame_overhead;
memcpy(port->qsize, params->qsize, sizeof(params->qsize));
port->n_pipe_profiles = params->n_pipe_profiles;
+   port->n_max_pipe_profiles = params->n_max_pipe_profiles;
 
 #ifdef RTE_SCHED_RED
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
@@ -1037,7 +1039,7 @@ rte_sched_port_pipe_profile_add(struct rte_sched_port 
*port,
return -1;
 
/* Pipe profiles not exceeds the max limit */
-   if (port->n_pipe_profiles >= RTE_SCHED_PIPE_PROFILES_PER_PORT)
+   if (port->n_pipe_profiles >= port->n_max_pipe_profiles)
return -2;
 
/* Pipe params */
diff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h
index 2b65420d1..d7d4f1767 100644
--- a/lib/librte_sched/rte_sched.h
+++ b/lib/librte_sched/rte_sched.h
@@ -220,6 +220,8 @@ struct rte_sched_port_params {
/**< Pipe profile table.
 * Every pipe is configured using one of the profiles from this table. 
*/
uint32_t n_pipe_profiles;/**< Profiles in the pipe profile 
table */
+   uint32_t n_max_pipe_profiles;
+   /**< Max profiles allowed in the pipe profile table */
 #ifdef RTE_SCHED_RED
struct rte_red_params 
red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; /**< RED parameters 
*/
 #endif
-- 
2.21.0

[dpdk-dev] [PATCH v6 04/11] sched: rename tc3 params to best-effort tc

[Jasvinder Singh]

Change the traffic class 3 related params name to best-effort(be)
traffic class.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 lib/librte_sched/rte_sched.c | 56 ++--
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c
index e8614ba4c..7e000c249 100644
--- a/lib/librte_sched/rte_sched.c
+++ b/lib/librte_sched/rte_sched.c
@@ -180,7 +180,7 @@ struct rte_sched_port {
uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t n_pipe_profiles;
uint32_t n_max_pipe_profiles;
-   uint32_t pipe_tc3_rate_max;
+   uint32_t pipe_tc_be_rate_max;
 #ifdef RTE_SCHED_RED
struct rte_red_config 
red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];
 #endif
@@ -323,7 +323,7 @@ pipe_profile_check(struct rte_sched_pipe_params *params,
if (params->tc_period == 0)
return -14;
 
-   /* TC3 oversubscription weight: non-zero */
+   /*  Best effort tc oversubscription weight: non-zero */
if (params->tc_ov_weight == 0)
return -15;
 
@@ -540,7 +540,7 @@ rte_sched_port_log_pipe_profile(struct rte_sched_port 
*port, uint32_t i)
p->tc_credits_per_period[11],
p->tc_credits_per_period[12],
 
-   /* Traffic class 3 oversubscription */
+   /* Best-effort traffic class oversubscription */
p->tc_ov_weight,
 
/* WRR */
@@ -629,13 +629,13 @@ rte_sched_port_config_pipe_profile_table(struct 
rte_sched_port *port,
rte_sched_port_log_pipe_profile(port, i);
}
 
-   port->pipe_tc3_rate_max = 0;
+   port->pipe_tc_be_rate_max = 0;
for (i = 0; i < port->n_pipe_profiles; i++) {
struct rte_sched_pipe_params *src = params->pipe_profiles + i;
-   uint32_t pipe_tc3_rate = 
src->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE];
+   uint32_t pipe_tc_be_rate = 
src->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE];
 
-   if (port->pipe_tc3_rate_max < pipe_tc3_rate)
-   port->pipe_tc3_rate_max = pipe_tc3_rate;
+   if (port->pipe_tc_be_rate_max < pipe_tc_be_rate)
+   port->pipe_tc_be_rate_max = pipe_tc_be_rate;
}
 }
 
@@ -839,7 +839,7 @@ rte_sched_port_log_subport_config(struct rte_sched_port 
*port, uint32_t i)
s->tc_credits_per_period[11],
s->tc_credits_per_period[12],
 
-   /* Traffic class 3 oversubscription */
+   /* Best effort traffic class oversubscription */
s->tc_ov_wm_min,
s->tc_ov_wm_max);
 }
@@ -915,7 +915,7 @@ rte_sched_subport_config(struct rte_sched_port *port,
/* TC oversubscription */
s->tc_ov_wm_min = port->mtu;
s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
-port->pipe_tc3_rate_max);
+port->pipe_tc_be_rate_max);
s->tc_ov_wm = s->tc_ov_wm_max;
s->tc_ov_period_id = 0;
s->tc_ov = 0;
@@ -960,21 +960,21 @@ rte_sched_pipe_config(struct rte_sched_port *port,
if (p->tb_time) {
params = port->pipe_profiles + p->profile;
 
-   double subport_tc3_rate = (double) 
s->tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASS_BE]
+   double subport_tc_be_rate = (double) 
s->tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASS_BE]
/ (double) s->tc_period;
-   double pipe_tc3_rate = (double) 
params->tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASS_BE]
+   double pipe_tc_be_rate = (double) 
params->tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASS_BE]
/ (double) params->tc_period;
-   uint32_t tc3_ov = s->tc_ov;
+   uint32_t tc_be_ov = s->tc_ov;
 
/* Unplug pipe from its subport */
s->tc_ov_n -= params->tc_ov_weight;
-   s->tc_ov_rate -= pipe_tc3_rate;
-   s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
+   s->tc_ov_rate -= pipe_tc_be_rate;
+   s->tc_ov = s->tc_ov_rate > subport_tc_be_rate;
 
-   if (s->tc_ov != tc3_ov) {
+   if (s->tc_ov != tc_be_ov) {
RTE_LOG(DEBUG, SCHED,
-   "Subport %u TC3 oversubscription is OFF (%.4lf 
>= %.4lf)\n",
-   subport_id, subport_tc3_rate, s->tc_ov_rate);
+   "Subport %u Best effort TC oversubscription is 
OFF (%.4lf >= %.4lf)\n",
+   subport_id, subport_tc_be_rate, s->tc_ov_rate);
}
 
/* Reset the pipe */
@@ -1000,23 +1000,23 @@ rte_sched_pipe_config(struct rte_sched_port *port,
p->tc_credits[i] = params

[dpdk-dev] [PATCH v6 07/11] net/softnic: add config flexibility to softnic tm

[Jasvinder Singh]

Update softnic tm function for configuration flexiblity of pipe
traffic classes and queues size.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 drivers/net/softnic/rte_eth_softnic.c |  98 
 drivers/net/softnic/rte_eth_softnic_cli.c | 448 --
 .../net/softnic/rte_eth_softnic_internals.h   |   6 +-
 drivers/net/softnic/rte_eth_softnic_tm.c  | 121 +++--
 4 files changed, 603 insertions(+), 70 deletions(-)

diff --git a/drivers/net/softnic/rte_eth_softnic.c 
b/drivers/net/softnic/rte_eth_softnic.c
index 4bda2f2b0..e3ad24161 100644
--- a/drivers/net/softnic/rte_eth_softnic.c
+++ b/drivers/net/softnic/rte_eth_softnic.c
@@ -28,6 +28,16 @@
 #define PMD_PARAM_TM_QSIZE1"tm_qsize1"
 #define PMD_PARAM_TM_QSIZE2"tm_qsize2"
 #define PMD_PARAM_TM_QSIZE3"tm_qsize3"
+#define PMD_PARAM_TM_QSIZE4"tm_qsize4"
+#define PMD_PARAM_TM_QSIZE5"tm_qsize5"
+#define PMD_PARAM_TM_QSIZE6"tm_qsize6"
+#define PMD_PARAM_TM_QSIZE7"tm_qsize7"
+#define PMD_PARAM_TM_QSIZE8"tm_qsize8"
+#define PMD_PARAM_TM_QSIZE9"tm_qsize9"
+#define PMD_PARAM_TM_QSIZE10   "tm_qsize10"
+#define PMD_PARAM_TM_QSIZE11   "tm_qsize11"
+#define PMD_PARAM_TM_QSIZE12   "tm_qsize12"
+
 
 static const char * const pmd_valid_args[] = {
PMD_PARAM_FIRMWARE,
@@ -39,6 +49,15 @@ static const char * const pmd_valid_args[] = {
PMD_PARAM_TM_QSIZE1,
PMD_PARAM_TM_QSIZE2,
PMD_PARAM_TM_QSIZE3,
+   PMD_PARAM_TM_QSIZE4,
+   PMD_PARAM_TM_QSIZE5,
+   PMD_PARAM_TM_QSIZE6,
+   PMD_PARAM_TM_QSIZE7,
+   PMD_PARAM_TM_QSIZE8,
+   PMD_PARAM_TM_QSIZE9,
+   PMD_PARAM_TM_QSIZE10,
+   PMD_PARAM_TM_QSIZE11,
+   PMD_PARAM_TM_QSIZE12,
NULL
 };
 
@@ -434,6 +453,15 @@ pmd_parse_args(struct pmd_params *p, const char *params)
p->tm.qsize[1] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[2] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[3] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[4] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[5] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[6] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[7] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[8] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[9] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[10] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[11] = SOFTNIC_TM_QUEUE_SIZE;
+   p->tm.qsize[12] = SOFTNIC_TM_QUEUE_SIZE;
 
/* Firmware script (optional) */
if (rte_kvargs_count(kvlist, PMD_PARAM_FIRMWARE) == 1) {
@@ -504,6 +532,67 @@ pmd_parse_args(struct pmd_params *p, const char *params)
goto out_free;
}
 
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE4) == 1) {
+   ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE4,
+   &get_uint32, &p->tm.qsize[4]);
+   if (ret < 0)
+   goto out_free;
+   }
+
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE5) == 1) {
+   ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE5,
+   &get_uint32, &p->tm.qsize[5]);
+   if (ret < 0)
+   goto out_free;
+   }
+
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE6) == 1) {
+   ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE6,
+   &get_uint32, &p->tm.qsize[6]);
+   if (ret < 0)
+   goto out_free;
+   }
+
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE7) == 1) {
+   ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE7,
+   &get_uint32, &p->tm.qsize[7]);
+   if (ret < 0)
+   goto out_free;
+   }
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE8) == 1) {
+   ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE8,
+   &get_uint32, &p->tm.qsize[8]);
+   if (ret < 0)
+   goto out_free;
+   }
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE9) == 1) {
+   ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE9,
+   &get_uint32, &p->tm.qsize[9]);
+   if (ret < 0)
+   goto out_free;
+   }
+
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE10) == 1) {
+   ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE10,
+   &get_uint32, &p->tm.qsize[10]);
+   if (ret < 0)
+   goto out_free;
+   }
+
+   if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE11) == 1) {
+   ret = rte_kvar

[dpdk-dev] [PATCH v6 08/11] test_sched: modify tests for config flexibility

[Jasvinder Singh]

update unit tests for configuration flexibility of pipe traffic
classes and queues size.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 app/test/test_sched.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/app/test/test_sched.c b/app/test/test_sched.c
index 36fa2d425..afe0b0765 100644
--- a/app/test/test_sched.c
+++ b/app/test/test_sched.c
@@ -20,14 +20,16 @@
 #define SUBPORT 0
 #define PIPE1
 #define TC  2
-#define QUEUE   3
+#define QUEUE   0
 
 static struct rte_sched_subport_params subport_param[] = {
{
.tb_rate = 125000,
.tb_size = 100,
 
-   .tc_rate = {125000, 125000, 125000, 125000},
+   .tc_rate = {125000, 125000, 125000, 125000,
+   125000, 125000, 125000, 125000, 
125000,
+   125000, 125000, 125000, 125000},
.tc_period = 10,
},
 };
@@ -37,8 +39,10 @@ static struct rte_sched_pipe_params pipe_profile[] = {
.tb_rate = 305175,
.tb_size = 100,
 
-   .tc_rate = {305175, 305175, 305175, 305175},
+   .tc_rate = {305175, 305175, 305175, 305175, 305175, 305175,
+   305175, 305175, 305175, 305175, 305175, 305175, 305175},
.tc_period = 40,
+   .tc_ov_weight = 1,
 
.wrr_weights = {1, 1, 1, 1},
},
@@ -51,9 +55,10 @@ static struct rte_sched_port_params port_param = {
.frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT,
.n_subports_per_port = 1,
.n_pipes_per_subport = 1024,
-   .qsize = {32, 32, 32, 32},
+   .qsize = {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32},
.pipe_profiles = pipe_profile,
.n_pipe_profiles = 1,
+   .n_max_pipe_profiles = 1,
 };
 
 #define NB_MBUF  32
-- 
2.21.0

[dpdk-dev] [PATCH v6 09/11] examples/ip_pipeline: add config flexibility to tm function

[Jasvinder Singh]

Update ip pipeline sample app for configuration flexiblity of
pipe traffic classes and queues.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 examples/ip_pipeline/cli.c | 43 +++---
 examples/ip_pipeline/tmgr.h|  4 +--
 lib/librte_pipeline/rte_table_action.c |  1 -
 lib/librte_pipeline/rte_table_action.h |  4 +--
 4 files changed, 29 insertions(+), 23 deletions(-)

diff --git a/examples/ip_pipeline/cli.c b/examples/ip_pipeline/cli.c
index 309b2936e..bfaa7f45e 100644
--- a/examples/ip_pipeline/cli.c
+++ b/examples/ip_pipeline/cli.c
@@ -377,7 +377,9 @@ cmd_swq(char **tokens,
 static const char cmd_tmgr_subport_profile_help[] =
 "tmgr subport profile\n"
 "\n"
-"  \n"
+"   "
+"   "
+"   \n"
 "   \n";
 
 static void
@@ -389,7 +391,7 @@ cmd_tmgr_subport_profile(char **tokens,
struct rte_sched_subport_params p;
int status, i;
 
-   if (n_tokens != 10) {
+   if (n_tokens != 19) {
snprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);
return;
}
@@ -410,7 +412,7 @@ cmd_tmgr_subport_profile(char **tokens,
return;
}
 
-   if (parser_read_uint32(&p.tc_period, tokens[9]) != 0) {
+   if (parser_read_uint32(&p.tc_period, tokens[18]) != 0) {
snprintf(out, out_size, MSG_ARG_INVALID, "tc_period");
return;
}
@@ -425,10 +427,12 @@ cmd_tmgr_subport_profile(char **tokens,
 static const char cmd_tmgr_pipe_profile_help[] =
 "tmgr pipe profile\n"
 "\n"
-"  \n"
+"   "
+""
+"\n"
 "   \n"
 "   \n"
-"   \n";
+"   \n";
 
 static void
 cmd_tmgr_pipe_profile(char **tokens,
@@ -439,7 +443,7 @@ cmd_tmgr_pipe_profile(char **tokens,
struct rte_sched_pipe_params p;
int status, i;
 
-   if (n_tokens != 27) {
+   if (n_tokens != 24) {
snprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);
return;
}
@@ -460,20 +464,20 @@ cmd_tmgr_pipe_profile(char **tokens,
return;
}
 
-   if (parser_read_uint32(&p.tc_period, tokens[9]) != 0) {
+   if (parser_read_uint32(&p.tc_period, tokens[18]) != 0) {
snprintf(out, out_size, MSG_ARG_INVALID, "tc_period");
return;
}
 
 #ifdef RTE_SCHED_SUBPORT_TC_OV
-   if (parser_read_uint8(&p.tc_ov_weight, tokens[10]) != 0) {
+   if (parser_read_uint8(&p.tc_ov_weight, tokens[19]) != 0) {
snprintf(out, out_size, MSG_ARG_INVALID, "tc_ov_weight");
return;
}
 #endif
 
-   for (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++)
-   if (parser_read_uint8(&p.wrr_weights[i], tokens[11 + i]) != 0) {
+   for (i = 0; i < RTE_SCHED_BE_QUEUES_PER_PIPE; i++)
+   if (parser_read_uint8(&p.wrr_weights[i], tokens[20 + i]) != 0) {
snprintf(out, out_size, MSG_ARG_INVALID, "wrr_weights");
return;
}
@@ -490,7 +494,10 @@ static const char cmd_tmgr_help[] =
 "   rate \n"
 "   spp \n"
 "   pps \n"
-"   qsize\n"
+"   qsize   "
+"  "
+"  "
+"\n"
 "   fo \n"
 "   mtu \n"
 "   cpu \n";
@@ -506,7 +513,7 @@ cmd_tmgr(char **tokens,
struct tmgr_port *tmgr_port;
int i;
 
-   if (n_tokens != 19) {
+   if (n_tokens != 28) {
snprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);
return;
}
@@ -554,32 +561,32 @@ cmd_tmgr(char **tokens,
return;
}
 
-   if (strcmp(tokens[13], "fo") != 0) {
+   if (strcmp(tokens[22], "fo") != 0) {
snprintf(out, out_size, MSG_ARG_NOT_FOUND, "fo");
return;
}
 
-   if (parser_read_uint32(&p.frame_overhead, tokens[14]) != 0) {
+   if (parser_read_uint32(&p.frame_overhead, tokens[23]) != 0) {
snprintf(out, out_size, MSG_ARG_INVALID, "frame_overhead");
return;
}
 
-   if (strcmp(tokens[15], "mtu") != 0) {
+   if (strcmp(tokens[24], "mtu") != 0) {
snprintf(out, out_size, MSG_ARG_NOT_FOUND, "mtu");
return;
}
 
-   if (parser_read_uint32(&p.mtu, tokens[16]) != 0) {
+   if (parser_read_uint32(&p.mtu, tokens[25]) != 0) {
snprintf(out, out_size, MSG_ARG_INVALID, "mtu");
return;
}
 
-   if (strcmp(tokens[17], "cpu") != 0) {
+   if (strcmp(tokens[26], "cpu") != 0) {
snprintf(out, out_size, MSG_ARG_NOT_FOUND, "cpu");
return;
}
 
-   if (parser_read_uint32(&p.cpu_id, tokens[18]) != 0) {
+   if (parser_read_uint32(&p.cpu_id, tokens[27]) != 0) {
snprintf(out, out_size, MSG_ARG_INVALID, "cpu_id");
return;
}
diff --git a/examples/ip_pipeline/tmgr.h b/examples/ip_pipeline/tmg

[dpdk-dev] [PATCH v6 11/11] sched: remove redundant macros

[Jasvinder Singh]

Remove unused macros from the library, and update release
notes.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 doc/guides/rel_notes/release_19_08.rst | 10 +-
 lib/librte_sched/rte_sched.h   | 11 ---
 2 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/doc/guides/rel_notes/release_19_08.rst 
b/doc/guides/rel_notes/release_19_08.rst
index 4a1fd8dd8..5f6f5 100644
--- a/doc/guides/rel_notes/release_19_08.rst
+++ b/doc/guides/rel_notes/release_19_08.rst
@@ -251,6 +251,14 @@ API Changes
 * malloc: The function ``rte_malloc_set_limit`` was never implemented
   is deprecated and will be removed in a future release.
 
+* sched: Macros ``RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS`` and
+  ``RTE_SCHED_PIPE_PROFILES_PER_PORT`` are removed for flexible configuration
+  of pipe traffic classes and their queues size, and for runtime configuration
+  of maximum number of pipe profiles, respectively. In addtion, wrr_weights
+  field of struct ``rte_sched_pipe_params`` is modifed to be used only for
+  best-effort tc, and qsize field of struct ``rte_sched_port_params`` is
+  changed to allow different size of the each queue.
+
 * eventdev: No longer marked as experimental.
 
   The eventdev functions are no longer marked as experimental, and have
@@ -385,7 +393,7 @@ The libraries prepended with a plus sign were incremented 
in this version.
  librte_rcu.so.1
  librte_reorder.so.1
  librte_ring.so.2
- librte_sched.so.2
+   + librte_sched.so.3
  librte_security.so.2
  librte_stack.so.1
  librte_table.so.3
diff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h
index fffbad696..eac6db274 100644
--- a/lib/librte_sched/rte_sched.h
+++ b/lib/librte_sched/rte_sched.h
@@ -94,17 +94,6 @@ extern "C" {
  */
 #define RTE_SCHED_TRAFFIC_CLASS_BE(RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE - 1)
 
-/** Number of queues per pipe traffic class. Cannot be changed. */
-#define RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS4
-
-
-/** Maximum number of pipe profiles that can be defined per port.
- * Compile-time configurable.
- */
-#ifndef RTE_SCHED_PIPE_PROFILES_PER_PORT
-#define RTE_SCHED_PIPE_PROFILES_PER_PORT  256
-#endif
-
 /*
  * Ethernet framing overhead. Overhead fields per Ethernet frame:
  * 1. Preamble: 7 bytes;
-- 
2.21.0

[dpdk-dev] [PATCH v6 10/11] examples/qos_sched: add tc and queue config flexibility

[Jasvinder Singh]

Update qos sched sample app for configuration flexibility of
pipe traffic classes and queues.

Signed-off-by: Jasvinder Singh 
Signed-off-by: Abraham Tovar 
Signed-off-by: Lukasz Krakowiak 
---
 examples/qos_sched/app_thread.c   |  11 +-
 examples/qos_sched/cfg_file.c | 130 +---
 examples/qos_sched/init.c |  63 +++-
 examples/qos_sched/main.h |   4 +
 examples/qos_sched/profile.cfg|  67 +++-
 examples/qos_sched/profile_ov.cfg |  54 +++-
 examples/qos_sched/stats.c| 517 +-
 7 files changed, 550 insertions(+), 296 deletions(-)

diff --git a/examples/qos_sched/app_thread.c b/examples/qos_sched/app_thread.c
index e14b275e3..62a5cac31 100644
--- a/examples/qos_sched/app_thread.c
+++ b/examples/qos_sched/app_thread.c
@@ -20,13 +20,11 @@
  * QoS parameters are encoded as follows:
  * Outer VLAN ID defines subport
  * Inner VLAN ID defines pipe
- * Destination IP 0.0.XXX.0 defines traffic class
  * Destination IP host (0.0.0.XXX) defines queue
  * Values below define offset to each field from start of frame
  */
 #define SUBPORT_OFFSET 7
 #define PIPE_OFFSET9
-#define TC_OFFSET  20
 #define QUEUE_OFFSET   20
 #define COLOR_OFFSET   19
 
@@ -35,15 +33,16 @@ get_pkt_sched(struct rte_mbuf *m, uint32_t *subport, 
uint32_t *pipe,
uint32_t *traffic_class, uint32_t *queue, uint32_t 
*color)
 {
uint16_t *pdata = rte_pktmbuf_mtod(m, uint16_t *);
+   uint16_t pipe_queue;
 
*subport = (rte_be_to_cpu_16(pdata[SUBPORT_OFFSET]) & 0x0FFF) &
(port_params.n_subports_per_port - 1); /* Outer VLAN 
ID*/
*pipe = (rte_be_to_cpu_16(pdata[PIPE_OFFSET]) & 0x0FFF) &
(port_params.n_pipes_per_subport - 1); /* Inner VLAN ID 
*/
-   *traffic_class = (pdata[QUEUE_OFFSET] & 0x0F) &
-   (RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE - 1); /* 
Destination IP */
-   *queue = ((pdata[QUEUE_OFFSET] >> 8) & 0x0F) &
-   (RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS - 1) ; /* 
Destination IP */
+   pipe_queue = active_queues[(pdata[QUEUE_OFFSET] >> 8) % 
n_active_queues]; /* Destination IP */
+   *traffic_class = pipe_queue > RTE_SCHED_TRAFFIC_CLASS_BE ?
+   RTE_SCHED_TRAFFIC_CLASS_BE : pipe_queue;
+   *queue = pipe_queue - *traffic_class;
*color = pdata[COLOR_OFFSET] & 0x03;/* Destination IP */
 
return 0;
diff --git a/examples/qos_sched/cfg_file.c b/examples/qos_sched/cfg_file.c
index 76c4b..45bf599e4 100644
--- a/examples/qos_sched/cfg_file.c
+++ b/examples/qos_sched/cfg_file.c
@@ -29,6 +29,9 @@ cfg_load_port(struct rte_cfgfile *cfg, struct 
rte_sched_port_params *port_params
if (!cfg || !port_params)
return -1;
 
+   memset(active_queues, 0, sizeof(active_queues));
+   n_active_queues = 0;
+
entry = rte_cfgfile_get_entry(cfg, "port", "frame overhead");
if (entry)
port_params->frame_overhead = (uint32_t)atoi(entry);
@@ -45,12 +48,25 @@ cfg_load_port(struct rte_cfgfile *cfg, struct 
rte_sched_port_params *port_params
if (entry) {
char *next;
 
-   for(j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
+   for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
port_params->qsize[j] = (uint16_t)strtol(entry, &next, 
10);
if (next == NULL)
break;
entry = next;
}
+
+   for (j = 0; j < RTE_SCHED_TRAFFIC_CLASS_BE; j++)
+   if (port_params->qsize[j]) {
+   active_queues[n_active_queues] = j;
+   n_active_queues++;
+   }
+
+   if (port_params->qsize[RTE_SCHED_TRAFFIC_CLASS_BE])
+   for (j = 0; j < RTE_SCHED_BE_QUEUES_PER_PIPE; j++) {
+   active_queues[n_active_queues] =
+   RTE_SCHED_TRAFFIC_CLASS_BE + j;
+   n_active_queues++;
+   }
}
 
 #ifdef RTE_SCHED_RED
@@ -173,46 +189,50 @@ cfg_load_pipe(struct rte_cfgfile *cfg, struct 
rte_sched_pipe_params *pipe_params
if (entry)
pipe_params[j].tc_rate[3] = (uint32_t)atoi(entry);
 
-#ifdef RTE_SCHED_SUBPORT_TC_OV
-   entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 3 
oversubscription weight");
+   entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 4 rate");
+   if (entry)
+   pipe_params[j].tc_rate[4] = (uint32_t)atoi(entry);
+
+   entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 5 rate");
+   if (entry)
+   pipe_params[j].tc_rate[5] = (uint32_t)atoi(entry);
+
+  

Re: [dpdk-dev] [EXT] [PATCH v3 1/3] eal/arm64: add 128-bit atomic compare exchange

[Eads, Gage]

> > > > > +/**
> > > > > + * 128-bit integer structure.
> > > > > + */
> > > > > +RTE_STD_C11
> > > > > +typedef struct {
> > > > > + RTE_STD_C11
> > > > > + union {
> > > > > + uint64_t val[2];
> > > > > + __extension__ __int128 int128;
> >
> > Instead of guarding  RTE_ARCH_64 on this complete structure, How about
> > it only under #ifdef RTE_ARCH_64 __extension__ __int128 int128; #endif
> > So that it rte_int128_t will be available for 32bit as well.
> 
> Agree, it should be work. But I am not sure.
> 
> Hi Gage,
> 
> How do you think about this?
> 

I don't see any harm in that.

Re: [dpdk-dev] [RFC] mark asym session-buffer non-reuseable

[Ayuj Verma]

Hi Akhil, Arek, Fiona,


Since this require changes in other Asym PMD( qat) apart from openssl (we plan 
to send changes for this),

so should we need to send any announcement on ABI breakage here before 
proposing patch v1?


Thanks and regards

Ayuj Verma


From: Ayuj Verma
Sent: 18 July 2019 15:17:54
To: Kusztal, ArkadiuszX; akhil.go...@nxp.com
Cc: Trahe, Fiona; Shally Verma; Sunila Sahu; Kanaka Durga Kotamarthy; 
dev@dpdk.org
Subject: Re: [RFC] mark asym session-buffer non-reuseable


Hi Arek,


Please see inline.


Thanks and regards

Ayuj Verma



From: Kusztal, ArkadiuszX 
Sent: 17 July 2019 19:40
To: Ayuj Verma; akhil.go...@nxp.com
Cc: Trahe, Fiona; Shally Verma; Sunila Sahu; Kanaka Durga Kotamarthy; 
dev@dpdk.org
Subject: RE: [RFC] mark asym session-buffer non-reuseable

Hi Ayuj,

> -Original Message-
> From: Ayuj Verma [mailto:ayve...@marvell.com]
> Sent: Wednesday, July 17, 2019 2:34 PM
> To: akhil.go...@nxp.com
> Cc: Kusztal, ArkadiuszX ; Trahe, Fiona
> ; shal...@marvell.com; ss...@marvell.com;
> kkotamar...@marvell.com; dev@dpdk.org; Ayuj Verma
> 
> Subject: [RFC] mark asym session-buffer non-reuseable
>
> This RFC proposes changes in asymmetric session usability of transform
> structure. In current implementation asym xform is seen as temporary entity
> that can be re-used by application once sessions are initialized with it.
>
> This enforces PMD to copy all key buffers during session setup time. Since
> life-time of sessions are small, so we can hold these buffers with session,
[AK] - what is you expected session lifetime? (2,3,50 packets?)
[Ayuj] In practical scenario like SSL, handshake will happen in some 10-15 
packets.
> reducing memcpy time by marking these as read-only so that PMDs which
> doesn’t require any manipulation of xform data can directly use these
> buffers in session configure.
>
> So, sending a proposal to mark xform as non-reusable till lifetime of session.
> This will help PMDs to reduce session setup time.
>
> Ayuj Verma (1):
>   lib/crypto: mark asym session-buffer non-reuseable
>
>  doc/guides/prog_guide/cryptodev_lib.rst  | 6 ++
> lib/librte_cryptodev/rte_cryptodev_pmd.h | 2 +-
>  2 files changed, 7 insertions(+), 1 deletion(-)
>
> --
> 1.8.3.1

Re: [dpdk-dev] [RFC] doc: deprecate legacy code path in ipsec-secgw

[Zhang, Roy Fan]

> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Bernard Iremonger
> Sent: Thursday, July 11, 2019 6:06 PM
> To: dev@dpdk.org; Ananyev, Konstantin ;
> akhil.go...@nxp.com
> Cc: Iremonger, Bernard 
> Subject: [dpdk-dev] [RFC] doc: deprecate legacy code path in ipsec-secgw
> 
> All the functionality of the legacy code path in now available in the
> librte_ipsec library. It is planned to deprecate the legacy code path in the
> 19.11 release and remove the legacy code path in the 20.02 release.
> 
> Signed-off-by: Bernard Iremonger 
> ---
>  doc/guides/rel_notes/deprecation.rst | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/doc/guides/rel_notes/deprecation.rst
> b/doc/guides/rel_notes/deprecation.rst
> index a7796f4..258fee8 100644
> --- a/doc/guides/rel_notes/deprecation.rst
> +++ b/doc/guides/rel_notes/deprecation.rst
> @@ -82,3 +82,8 @@ Deprecation Notices
>to set new power environment if power environment was already
> initialized.
>In this case the function will return -1 unless the environment is unset 
> first
>(using ``rte_power_unset_env``). Other function usage scenarios will not
> change.
> +
> +* ipsec-secgw: All the ipsec-secgw legacy code path functionality is
> +now
> +  available in the librte_ipsec library. It is planned to deprecate the
> +legacy
> +  code path in the ipsec-secgw application in the 19.11 release and
> +remove it
> +  in the 20.02 release.
> --
> 2.7.4

Acked-by: Fan Zhang 

Re: [dpdk-dev] [PATCH v5 06/11] sched: improve doxygen comments

[Singh, Jasvinder]

> > @@ -165,61 +170,90 @@ struct rte_sched_subport_stats {
> >   * byte.
> >   */
> >  struct rte_sched_pipe_params {
> > -   /* Pipe token bucket */
> > -   uint32_t tb_rate;/**< Rate (measured in bytes per 
> > second)
> > */
> > -   uint32_t tb_size;/**< Size (measured in credits) */
> > +   /** Token bucket rate (measured in bytes per second) */
> > +   uint32_t tb_rate;
> >
> > -   /* Pipe traffic classes */
> > +   /** Token bucket size (measured in credits) */
> > +   uint32_t tb_size;
> > +
> > +   /** Traffic class rates (measured in bytes per second) */
> > uint32_t tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
> > -   /**< Traffic class rates (measured in bytes per second) */
> > +
> > +   /** Enforcement period (measured in milliseconds) */
> > uint32_t tc_period;
> > -   /**< Enforcement period (measured in milliseconds) */
> > -   uint8_t tc_ov_weight;/**< Weight Traffic class 3
> > oversubscription */
> >
> > -   /* Pipe queues */
> > -   uint8_t  wrr_weights[RTE_SCHED_BE_QUEUES_PER_PIPE]; /**<
> > WRR weights */
> > +   /** Best-effort traffic class oversubscription weight */
> > +   uint8_t tc_ov_weight;
> > +
> > +   /** WRR weights of best-effort traffic class queues */
> > +   uint8_t wrr_weights[RTE_SCHED_BE_QUEUES_PER_PIPE];
> >  };
> >
> >  /** Queue statistics */
> >  struct rte_sched_queue_stats {
> > -   /* Packets */
> > -   uint32_t n_pkts; /**< Packets successfully written */
> > -   uint32_t n_pkts_dropped; /**< Packets dropped */
> > +   /** Packets successfully written */
> > +   uint32_t n_pkts;
> > +
> > +   /** Packets dropped */
> > +   uint32_t n_pkts_dropped;
> > +
> >  #ifdef RTE_SCHED_RED
> > -   uint32_t n_pkts_red_dropped; /**< Packets dropped by RED */
> > +   /** Packets dropped by RED */
> > +   uint32_t n_pkts_red_dropped;
> >  #endif
> >
> > -   /* Bytes */
> > -   uint32_t n_bytes;/**< Bytes successfully written */
> > -   uint32_t n_bytes_dropped;/**< Bytes dropped */
> > +   /** Bytes successfully written */
> > +   uint32_t n_bytes;
> > +
> > +   /** Bytes dropped */
> > +   uint32_t n_bytes_dropped;
> >  };
> >
> >  /** Port configuration parameters. */  struct rte_sched_port_params {
> > -   const char *name;/**< String to be associated */
> > -   int socket;  /**< CPU socket ID */
> > -   uint32_t rate;   /**< Output port rate
> > - * (measured in bytes per second) */
> > -   uint32_t mtu;/**< Maximum Ethernet frame size
> > - * (measured in bytes).
> > - * Should not include the framing
> > overhead. */
> > -   uint32_t frame_overhead; /**< Framing overhead per packet
> > - * (measured in bytes) */
> > -   uint32_t n_subports_per_port;/**< Number of subports */
> > -   uint32_t n_pipes_per_subport;/**< Number of pipes per subport
> > */
> > +   /** Name of the port to be associated */
> > +   const char *name;
> > +
> > +   /** CPU socket ID */
> > +   int socket;
> > +
> > +   /** Output port rate (measured in bytes per second) */
> > +   uint32_t rate;
> > +
> > +   /** Maximum Ethernet frame size (measured in bytes).
> > +* Should not include the framing overhead.
> > +*/
> > +   uint32_t mtu;
> > +
> > +   /** Framing overhead per packet (measured in bytes) */
> > +   uint32_t frame_overhead;
> > +
> > +   /** Number of subports */
> > +   uint32_t n_subports_per_port;
> > +
> > +   /** Number of subport_pipes */
> > +   uint32_t n_pipes_per_subport;
> > +
> > +   /** Packet queue size for each traffic class.
> > +* All the pipes within the same subport share the similar
> > +* configuration for the queues.
> > +*/
> > uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
> > -   /**< Packet queue size for each traffic class.
> > -* All queues within the same pipe traffic class have the same
> > -* size. Queues from different pipes serving the same traffic
> > -* class have the same size. */
> > +
> > +   /** Pipe profile table.
> > +* Every pipe is configured using one of the profiles from this table.
> > +*/
> > struct rte_sched_pipe_params *pipe_profiles;
> > -   /**< Pipe profile table.
> > -* Every pipe is configured using one of the profiles from this table.
> > */
> > -   uint32_t n_pipe_profiles;/**< Profiles in the pipe profile 
> > table */
> > +
> > +   /** Profiles in the pipe profile table */
> > +   uint32_t n_pipe_profiles;
> > +
> > +   /** Max profiles allowed in the pipe profile table */
> > uint32_t n_max_pipe_profiles;
> > -   /**< Max profiles allowed in the pipe profile table */
> > +
> >  #ifdef RTE_SCHED_RED
> > -   struct rte_red_params
> > red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; /**<
> RED
> > parameters */
>

Re: [dpdk-dev] [PATCH v5 02/11] sched: add config flexibility to tc queue sizes

[Singh, Jasvinder]

> > diff --git a/lib/librte_sched/rte_sched.c
> > b/lib/librte_sched/rte_sched.c index f7c218ef0..3d3d4c69f 100644
> > --- a/lib/librte_sched/rte_sched.c
> > +++ b/lib/librte_sched/rte_sched.c
> > @@ -146,15 +146,15 @@ struct rte_sched_grinder {
> > struct rte_sched_pipe_profile *pipe_params;
> >
> > /* TC cache */
> > -   uint8_t tccache_qmask[4];
> > -   uint32_t tccache_qindex[4];
> > +   uint8_t tccache_qmask[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
> > +   uint32_t tccache_qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
> > uint32_t tccache_w;
> > uint32_t tccache_r;
> >
> > /* Current TC */
> > uint32_t tc_index;
> > -   struct rte_sched_queue
> > *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
> > -   struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
> > +   struct rte_sched_queue
> > *queue[RTE_SCHED_MAX_QUEUES_PER_TC];
> > +   struct rte_mbuf **qbase[RTE_SCHED_MAX_QUEUES_PER_TC];
> > uint32_t qindex[RTE_SCHED_MAX_QUEUES_PER_TC];
> > uint16_t qsize;
> > uint32_t qmask;
> > @@ -172,6 +172,9 @@ struct rte_sched_port {
> > uint32_t n_subports_per_port;
> > uint32_t n_pipes_per_subport;
> > uint32_t n_pipes_per_subport_log2;
> > +   uint16_t pipe_queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
> > +   uint8_t pipe_tc[RTE_SCHED_QUEUES_PER_PIPE];
> > +   uint8_t tc_queue[RTE_SCHED_QUEUES_PER_PIPE];
> 
> I suggest we create simple functions to access the above 3 data structures as
> opposed to access them directly, similar to the rte_sched_port_qsize() 
> function
> (and maybe place them just below this function).

Suggested changes are made in v6..


> 
> > uint32_t rate;
> > uint32_t mtu;
> > uint32_t frame_overhead;
> > @@ -257,14 +260,14 @@ rte_sched_port_qbase(struct rte_sched_port
> > *port, uint32_t qindex)  static inline uint16_t
> > rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)  {
> > -   uint32_t tc = (qindex >> 2) & 0x3;
> > +   uint32_t tc = port->pipe_tc[qindex &
> > (RTE_SCHED_QUEUES_PER_PIPE - 1)];
> >
> > return port->qsize[tc];
> >  }
> >
> >  static int
> >  pipe_profile_check(struct rte_sched_pipe_params *params,
> > -   uint32_t rate)
> > +   uint32_t rate, uint16_t *qsize)
> >  {
> > uint32_t i;
> >
> > @@ -281,25 +284,27 @@ pipe_profile_check(struct rte_sched_pipe_params
> > *params,
> > if (params->tb_size == 0)
> > return -12;
> >
> > -   /* TC rate: non-zero, less than pipe rate */
> > +   /* TC rate: non-zero if qsize non-zero, less than pipe rate */
> > for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
> > -   if (params->tc_rate[i] == 0 ||
> > -   params->tc_rate[i] > params->tb_rate)
> > +   if ((qsize[i] == 0 && params->tc_rate[i] != 0) ||
> > +   (qsize[i] != 0 && (params->tc_rate[i] == 0 ||
> > +   params->tc_rate[i] > params->tb_rate)))
> > return -13;
> > }
> > +   if (params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE] == 0 ||
> > +   qsize[RTE_SCHED_TRAFFIC_CLASS_BE] == 0)
> > +   return -13;
> >
> > /* TC period: non-zero */
> > if (params->tc_period == 0)
> > return -14;
> >
> > -#ifdef RTE_SCHED_SUBPORT_TC_OV
> > /* TC3 oversubscription weight: non-zero */
> > if (params->tc_ov_weight == 0)
> > return -15;
> > -#endif
> >
> > /* Queue WRR weights: non-zero */
> > -   for (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++) {
> > +   for (i = 0; i < RTE_SCHED_BE_QUEUES_PER_PIPE; i++) {
> > if (params->wrr_weights[i] == 0)
> > return -16;
> > }
> > @@ -344,7 +349,8 @@ rte_sched_port_check_params(struct
> > rte_sched_port_params *params)
> > for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
> > uint16_t qsize = params->qsize[i];
> >
> > -   if (qsize == 0 || !rte_is_power_of_2(qsize))
> > +   if ((qsize != 0 && !rte_is_power_of_2(qsize)) ||
> > +   ((i == RTE_SCHED_TRAFFIC_CLASS_BE) && (qsize ==
> > 0)))
> > return -8;
> > }
> >
> > @@ -358,7 +364,7 @@ rte_sched_port_check_params(struct
> > rte_sched_port_params *params)
> > struct rte_sched_pipe_params *p = params->pipe_profiles + i;
> > int status;
> >
> > -   status = pipe_profile_check(p, params->rate);
> > +   status = pipe_profile_check(p, params->rate, ¶ms-
> > >qsize[0]);
> > if (status != 0)
> > return status;
> > }
> > @@ -388,8 +394,12 @@ rte_sched_port_get_array_base(struct
> > rte_sched_port_params *params, enum rte_sch
> >
> > size_per_pipe_queue_array = 0;
> > for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
> > -   size_per_pipe_queue_array +=
> > RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
> > -   * params->qsize[i] * sizeof(struct rte_mbuf *);
> > +   if (i < RTE_SCHED_TRAFFIC_CLASS_BE)
> > +   size_per_pipe_queue_

Re: [dpdk-dev] [v4] net/i40e: fix SFP X722 not work with FW4.16

[Stillwell Jr, Paul M]

> -Original Message-
> From: dev  On Behalf Of Xiao Zhang
> Sent: Friday, July 19, 2019 4:00 AM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Wang, Haiyue
> ; Zhang, Qi Z ; Zhang, Xiao
> ; sta...@dpdk.org
> Subject: [dpdk-dev] [v4] net/i40e: fix SFP X722 not work with FW4.16
> 
> The code checked the NVM API version of FW to check if support adminq
> operation, when version is 1.7 or above adminq operation is support and the
> adminq flag will be set. The code will use adminq to set TPID if the flags 
> set or
> to use register. The NVM API version of SFP X722 old versions are lowwer
> than 1.7 and for FW4.16 is 1.8. But FW4.16 of SFP
> X722 does not support adminq operation, the legacy logic is not compatible
> with device SFP X722 currently. Check the device id to unset adminq flag to
> use resigter setting to make it work.
> 

Sorry, I'm still confused about what this patch is doing. From the commit 
message it seems like there are a couple of conditions:

If the device is X722
Then if FW < 1.7 then use register to set TPID
Else use adminq to set TPID

The change in the code is only looking to see if the device is X722 and not 
doing any other checking of FW version.

Am I misunderstanding the commit message, the patch, or both?

> Fixes: 73cd7d6dc8e1 ("net/i40e: use set switch AQ instead of register
> setting")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Xiao Zhang 
> ---
> v4
> Add more detailed information in the commit log.
> v3
> Modify the commit log to make it not confused and add fixed line.
> v2
> Unset adminq flag instead of only checking device id when set TPID.
> v1
> Check device id when setting TPID, use adminq if not SFP X722, else use
> register.
> ---
>  drivers/net/i40e/i40e_ethdev.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 2b9fc45..2b2c877 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -1358,6 +1358,10 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void
> *init_params __rte_unused)
>   PMD_INIT_LOG(ERR, "Failed to init adminq: %d", ret);
>   return -EIO;
>   }
> + /* Firmware of SFP x722 does not support adminq option */
> + if (hw->device_id == I40E_DEV_ID_SFP_X722)
> + hw->flags &= ~I40E_HW_FLAG_802_1AD_CAPABLE;
> +
>   PMD_INIT_LOG(INFO, "FW %d.%d API %d.%d NVM
> %02d.%02d.%02d eetrack %04x",
>hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
>hw->aq.api_maj_ver, hw->aq.api_min_ver,
> --
> 2.7.4

Re: [dpdk-dev] [RFC] mark asym session-buffer non-reuseable

[Trahe, Fiona]

No need as API is still experimental.

Howver I'd suggest changing the subject to
"declare crypto asym xform immutable"
non-reusable is confusing as the session and xform will be re-used on all the 
ops associated with the session.

From: Ayuj Verma [mailto:ayve...@marvell.com]
Sent: Friday, July 19, 2019 3:51 PM
To: Kusztal, ArkadiuszX ; akhil.go...@nxp.com
Cc: Trahe, Fiona ; Shally Verma ; 
Sunila Sahu ; Kanaka Durga Kotamarthy 
; dev@dpdk.org
Subject: Re: [RFC] mark asym session-buffer non-reuseable


Hi Akhil, Arek, Fiona,



Since this require changes in other Asym PMD( qat) apart from openssl (we plan 
to send changes for this),

so should we need to send any announcement on ABI breakage here before 
proposing patch v1?



Thanks and regards

Ayuj Verma


From: Ayuj Verma
Sent: 18 July 2019 15:17:54
To: Kusztal, ArkadiuszX; akhil.go...@nxp.com
Cc: Trahe, Fiona; Shally Verma; Sunila Sahu; Kanaka Durga Kotamarthy; 
dev@dpdk.org
Subject: Re: [RFC] mark asym session-buffer non-reuseable


Hi Arek,



Please see inline.



Thanks and regards

Ayuj Verma


From: Kusztal, ArkadiuszX 
mailto:arkadiuszx.kusz...@intel.com>>
Sent: 17 July 2019 19:40
To: Ayuj Verma; akhil.go...@nxp.com
Cc: Trahe, Fiona; Shally Verma; Sunila Sahu; Kanaka Durga Kotamarthy; 
dev@dpdk.org
Subject: RE: [RFC] mark asym session-buffer non-reuseable

Hi Ayuj,

> -Original Message-
> From: Ayuj Verma [mailto:ayve...@marvell.com]
> Sent: Wednesday, July 17, 2019 2:34 PM
> To: akhil.go...@nxp.com
> Cc: Kusztal, ArkadiuszX 
> mailto:arkadiuszx.kusz...@intel.com>>; Trahe, 
> Fiona
> mailto:fiona.tr...@intel.com>>; 
> shal...@marvell.com; 
> ss...@marvell.com;
> kkotamar...@marvell.com; 
> dev@dpdk.org; Ayuj Verma
> mailto:ayve...@marvell.com>>
> Subject: [RFC] mark asym session-buffer non-reuseable
>
> This RFC proposes changes in asymmetric session usability of transform
> structure. In current implementation asym xform is seen as temporary entity
> that can be re-used by application once sessions are initialized with it.
>
> This enforces PMD to copy all key buffers during session setup time. Since
> life-time of sessions are small, so we can hold these buffers with session,
[AK] - what is you expected session lifetime? (2,3,50 packets?)
[Ayuj] In practical scenario like SSL, handshake will happen in some 10-15 
packets.
> reducing memcpy time by marking these as read-only so that PMDs which
> doesn't require any manipulation of xform data can directly use these
> buffers in session configure.
>
> So, sending a proposal to mark xform as non-reusable till lifetime of session.
> This will help PMDs to reduce session setup time.
>
> Ayuj Verma (1):
>   lib/crypto: mark asym session-buffer non-reuseable
>
>  doc/guides/prog_guide/cryptodev_lib.rst  | 6 ++
> lib/librte_cryptodev/rte_cryptodev_pmd.h | 2 +-
>  2 files changed, 7 insertions(+), 1 deletion(-)
>
> --
> 1.8.3.1

Re: [dpdk-dev] [PATCH v7 0/2] examples/ipsec-secgw: fix 1st pkt dropped

[Iremonger, Bernard]

Hi Akhil,



> > > Subject: [PATCH v7 0/2] examples/ipsec-secgw: fix 1st pkt dropped
> > >
> > > This patchset fixes the issue of the first inbound packet being
> > > dropped for inline crypto.
> > >
> > > Changes in v7:
> > > --
> > > Rebased to DPDK 19.08-rc1
> > >
> > > Changes in v6:
> > > --
> > > Rebased to latest master.
> > > Minor changes to the following functions in ipsec.c:
> > > create_lookaside_session()
> > > create_inline_session()
> > >
> > > Bernard Iremonger (2):
> > >   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
> > >   examples/ipsec-secgw/test: fix inline test scripts
> > >
> > >  examples/ipsec-secgw/ipsec-secgw.c   | 244 +++
> > >  examples/ipsec-secgw/ipsec.c | 449 
> > > ++
> -
> > >  examples/ipsec-secgw/ipsec.h |   5 +-
> > >  examples/ipsec-secgw/ipsec_process.c |   9 +-
> > >  examples/ipsec-secgw/sa.c|  46 ++-
> > >  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 -
> > > examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 -
> > >  7 files changed, 403 insertions(+), 370 deletions(-)
> > >
> > > Changes in v5:
> > > -
> > > The v2 patchset has been rebased to the latest master.
> > > The v4 patchset has been dropped as it caused issues with the
> > > lookaside code which we are unable to test.
> > >
> > > Bernard Iremonger (2):
> > >   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
> > >   examples/ipsec-secgw/test: fix inline test scripts
> > >
> > >  examples/ipsec-secgw/ipsec-secgw.c   | 244 +-
> --
> > ---
> > >  examples/ipsec-secgw/ipsec.c | 122 +-
> > >  examples/ipsec-secgw/ipsec.h |   5 +-
> > >  examples/ipsec-secgw/ipsec_process.c |   9 +-
> > >  examples/ipsec-secgw/sa.c|  46 +++--
> > >  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 --
> > > examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 --
> > >  7 files changed, 245 insertions(+), 201 deletions(-)
> > >
> > > Changes in v2:
> > > -
> > > The first three patches of the v1 have been squashed.
> > > The commit message for the squashed patch has been updated.
> > > Patches 4,5 and 6 of the v1 have been dropped from this patchset.
> > > A patch to fix the test scripts has been added.
> > >
> > > Bernard Iremonger (2):
> > >   examples/ipsec-secgw: fix 1st pkt dropped for inline crypto
> > >   examples/ipsec-secgw/test: fix inline test scripts
> > >
> > >  examples/ipsec-secgw/ipsec-secgw.c   | 244 +++---
> > >  examples/ipsec-secgw/ipsec.c | 456 
> > > ++
> -
> > >  examples/ipsec-secgw/ipsec.h |   5 +-
> > >  examples/ipsec-secgw/ipsec_process.c |   9 +-
> > >  examples/ipsec-secgw/sa.c|  46 ++-
> > >  examples/ipsec-secgw/test/trs_aesgcm_defs.sh |  10 -
> > > examples/ipsec-secgw/test/tun_aesgcm_defs.sh |  10 -
> > >  7 files changed, 405 insertions(+), 375 deletions(-)
> > >
> > > --
> > > 2.7.4
> >
> > It was rebased manually, so please verify.
> > Applied to dpdk-next-crypto
> >
> > Thanks.
> 
> I will verify.
> 
> Regards,
> 
> Bernard.
> 
> 
Our tests are passing fine with the rebased patches.

Regards,

Bernard.

Re: [dpdk-dev] [RFC 1/4] mempool: clarify default populate function

[Andrew Rybchenko]

On 7/19/19 4:38 PM, Olivier Matz wrote:

No functional change. Clarify the populate function to make
the next commit easier to understand.

Rename the variables:
- to avoid negation in the name
- to have more understandable names

Remove useless variable (no_pageshift is equivalent to pg_sz == 0).

Remove duplicate affectation of "external" variable.

Signed-off-by: Olivier Matz 


LGTM

Reviewed-by: Andrew Rybchenko 

Re: [dpdk-dev] [PATCH 1/2] net/mlx5: cache the associated network device ifindex

[Stephen Hemminger]

On Fri, 19 Jul 2019 05:31:44 +
Viacheslav Ovsiienko  wrote:

> + /*
> +  * Store associated network device interface index. This index
> +  * is permanent throughout the lifetime of device. We do not spawn
> +  * rte_eth_dev ports without associated network device, and if
> +  * network device is being unbound we get the remove notification
> +  * message and rte_eth_dev port is also detached. So, we may store
> +  * the ifindex here and use the cached value further. The network
> +  * device name can be changed dynamically and should not be cached.
> +  */
> + assert(spawn->ifindex);
> + priv->if_index = spawn->ifindex;

This correct, but overkill.

1. The comment is way too wordy. Please stick to only a couple of lines.
   If you feel more explanation is necessary put that in the commit log.
   
2. It is perfectly okay to return 0 as a value in dev_info.
   Therefore the assert is unnecessary.

3. Where is "Reported-by:"

4. What was wrong with my simpler patch?

Re: [dpdk-dev] [PATCH 2/2] Revert "net/mlx5: fix master device Netlink socket sharing"

[Stephen Hemminger]

On Fri, 19 Jul 2019 05:31:45 +
Viacheslav Ovsiienko  wrote:

> This reverts commit e28111ac9864af09e826241a915dfff87a9c00ad.
> The netlink requests are replaced by ifindex caching and
> not needed anymore.
> 
> Signed-off-by: Viacheslav Ovsiienko 
> Fixes: e28111ac9864 ("net/mlx5: fix master device Netlink socket sharing")


Can mlx5 drop dependency o netlink (libmnl)?

Re: [dpdk-dev] [PATCH 0/7] bnxt patches

[Stephen Hemminger]

On Fri, 19 Jul 2019 13:33:32 +0100
Ferruh Yigit  wrote:

> On 7/19/2019 7:18 AM, Ajit Khaparde wrote:
> > Patchset based after an earlier submission
> > https://patchwork.dpdk.org/patch/56690/
> > 
> > This set mostly contains bug fixes, an update to the bnxt.rst doc
> > and a adds a VF PCI device ID for Thor based network controller.
> > 
> > Please apply.
> > 
> > Ajit Khaparde (2):
> >   net/bnxt: remove unnecessary interrupt disable
> >   doc: update release information for bnxt
> > 
> > Kalesh AP (1):
> >   net/bnxt: add new device id
> > 
> > Lance Richardson (1):
> >   net/bnxt: disable vector mode Tx with VLAN offload
> > 
> > Rahul Gupta (1):
> >   net/bnxt: fix interrupt rearm logic
> > 
> > Santoshkumar Karanappa Rastapur (1):
> >   net/bnxt: use correct number of RSS contexts for thor
> > 
> > Stephen Hemminger (1):
> >   net/bnxt: fix receive interrupt vector
> >   
> 
> Same for this patchset, it has been sent to late in the release cycle, will be
> considered for next release.
> 
> Regards,
> ferruh

Some of these are bug fixes. They should go in.
Also, adding new device id's should always be allowed.

Ajit, could you split the set?

Re: [dpdk-dev] [PATCH 2/2] Revert "net/mlx5: fix master device Netlink socket sharing"

[Slava Ovsiienko]

> -Original Message-
> From: Stephen Hemminger 
> Sent: Friday, July 19, 2019 19:17
> To: Slava Ovsiienko 
> Cc: dev@dpdk.org; Yongseok Koh ; Shahaf Shuler
> 
> Subject: Re: [PATCH 2/2] Revert "net/mlx5: fix master device Netlink socket
> sharing"
> 
> On Fri, 19 Jul 2019 05:31:45 +
> Viacheslav Ovsiienko  wrote:
> 
> > This reverts commit e28111ac9864af09e826241a915dfff87a9c00ad.
> > The netlink requests are replaced by ifindex caching and not needed
> > anymore.
> >
> > Signed-off-by: Viacheslav Ovsiienko 
> > Fixes: e28111ac9864 ("net/mlx5: fix master device Netlink socket
> > sharing")
> 
> 
> Can mlx5 drop dependency o netlink (libmnl)?

What do you mean?  Dependency on libmnl is already dropped.
The few remaining Netlink requests do not use libmnl (but does libnl).

With best regards, Slava

Re: [dpdk-dev] [EXT] [PATCH v5 1/1] app/test-compress-perf: report header improvement

[Thomas Monjalon]

19/07/2019 15:17, Akhil Goyal:
> > 
> > > +static struct cperf_buffer_info tests_res;
> > Rename test_res too --> buffer_info? You can address it in next release 
> > cycle as
> > well.
> > [Artur] Thank you Shally. Good point. Will be changed in the next cycle.
> > 
> > 
> Applied to dpdk-next-crypto

Not pulled in master tree for 2 reasons:
- the title and commit log are not descriptive enough
- there are some UTF-8 characters for no good reason in the printf.
Please stick to standard dash or asterisk for lists,
so it will be printed in any console.

Re: [dpdk-dev] [EXT] [PATCH v5 0/7] Rework API for RSA algorithm in asymmetric crypto

[Thomas Monjalon]

19/07/2019 14:51, Akhil Goyal:
> > > Arek Kusztal (7):
> > >   cryptodev: change RSA API comments about primes
> > >   cryptodev: add cipher field to RSA op
> > >   crypto/openssl: add cipher field to openssl RSA implementation
> > >   test: add cipher field to RSA test
> > >   cryptodev: remove RSA PKCS1 BT0 padding
> > >   openssl: remove RSA PKCS1_5 BT0 padding
> > >   test: remove RSA PKCS1_5 BT0 padding from test cases
> > >
> > With minor feedback on description on Patchv5 2/7,
> > Series-acked-by: Shally Verma 
> 
> Comment on 2/7 shall be taken in next series for next release as suggested by 
> Shally.
> 
> Applied to dpdk-next-crypto

A commit in cryptodev is removing a field which is removed in PMDs
in next patches. Guess what? It breaks the compilation in the middle.
Anyway, there is no reason for this split, so I squash the patches.

Re: [dpdk-dev] [PATCH 2/2] Revert "net/mlx5: fix master device Netlink socket sharing"

[Stephen Hemminger]

On Fri, 19 Jul 2019 16:21:17 +
Slava Ovsiienko  wrote:

> > -Original Message-
> > From: Stephen Hemminger 
> > Sent: Friday, July 19, 2019 19:17
> > To: Slava Ovsiienko 
> > Cc: dev@dpdk.org; Yongseok Koh ; Shahaf Shuler
> > 
> > Subject: Re: [PATCH 2/2] Revert "net/mlx5: fix master device Netlink socket
> > sharing"
> > 
> > On Fri, 19 Jul 2019 05:31:45 +
> > Viacheslav Ovsiienko  wrote:
> >   
> > > This reverts commit e28111ac9864af09e826241a915dfff87a9c00ad.
> > > The netlink requests are replaced by ifindex caching and not needed
> > > anymore.
> > >
> > > Signed-off-by: Viacheslav Ovsiienko 
> > > Fixes: e28111ac9864 ("net/mlx5: fix master device Netlink socket
> > > sharing")  
> > 
> > 
> > Can mlx5 drop dependency o netlink (libmnl)?  
> 
> What do you mean?  Dependency on libmnl is already dropped.
> The few remaining Netlink requests do not use libmnl (but does libnl).
> 
> With best regards, Slava

Good to see, libnl is quite large, it would be good to drop that
(or use libmnl instead).

Re: [dpdk-dev] [PATCH 1/2] net/mlx5: cache the associated network device ifindex

[Slava Ovsiienko]

> -Original Message-
> From: Stephen Hemminger 
> Sent: Friday, July 19, 2019 19:16
> To: Slava Ovsiienko 
> Cc: dev@dpdk.org; Yongseok Koh ; Shahaf Shuler
> 
> Subject: Re: [PATCH 1/2] net/mlx5: cache the associated network device
> ifindex
> 
> On Fri, 19 Jul 2019 05:31:44 +
> Viacheslav Ovsiienko  wrote:
> 
> > +   /*
> > +* Store associated network device interface index. This index
> > +* is permanent throughout the lifetime of device. We do not spawn
> > +* rte_eth_dev ports without associated network device, and if
> > +* network device is being unbound we get the remove notification
> > +* message and rte_eth_dev port is also detached. So, we may store
> > +* the ifindex here and use the cached value further. The network
> > +* device name can be changed dynamically and should not be
> cached.
> > +*/
> > +   assert(spawn->ifindex);
> > +   priv->if_index = spawn->ifindex;
> 
> This correct, but overkill.
> 
> 1. The comment is way too wordy. Please stick to only a couple of lines.
>If you feel more explanation is necessary put that in the commit log.

I'd prefer to see the issue description in the source,  not by searching the 
git log
for the appropriate commit. But OK, it does not matter.
 
> 2. It is perfectly okay to return 0 as a value in dev_info.
>Therefore the assert is unnecessary.

Valid network interface index cannot be zero. For example, if_nametoindex()
returns zero in case of error. Also, in mlx5 we do not spawn ports without 
attached
network interfaces. Assert is not related to dev_info, it checks whether
the mlx5_dev_spawn() is called with valid ifindex for valid port (ifindex 
checked
against zero to validate infiniband port is active). We need this assert here.

> 3. Where is "Reported-by:"
It is in cover letter:
"Proposed-by: Stephen Hemminger "
 Sorry, I forgot to add this one in commit message, will fix.

> 4. What was wrong with my simpler patch?
Please, see the cover letter. Your patch fixes only the part of problem -
the mlx5_dev_infos_get(). But it is just the case of unsafe mlx5_ifindex() 
usage.
mlx5_ifindex() itself must be fixed instead.

WBR, Slava

Re: [dpdk-dev] [PATCH] app/testpmd: support QinQ strip offload

[Ferruh Yigit]

On 7/17/2019 8:45 AM, viveksha...@marvell.com wrote:
> From: Vivek Sharma 
> 
> Support QinQ strip RX offload configuration through
> testpmd command line and boot time arguments.

For the testpmd command part, unfortunately there are two set of commands for
same purpose, the new ones are (lets both port and queue level):
"port config  rx_offload ..."
"port (port_id) rxq (queue_id) rx_offload ..."
"port config (port_id) tx_offload ..."
"port (port_id) txq (queue_id) tx_offload ..."

These are better implementation comparing the old one:
"port config all ..."

Would you mind sending a patch to remove "port config all ..." variant of
setting offloads?
And you can make your changes to the new commands above.



For the application argument, ``--enable-hw-vlan-extend``, instead of adding a
parameter of each offload argument, (and event it is not clear if it is only for
Rx or Tx), have a "--rx-offloads" argument and feed the list via this, like:
"--rx-ofloads=disable-crc-strip,enable-rx-timestamp"



And lastly for the  "vlan set ..." update, I think "qinq" was already defined
but it was calling 'vlan_extend_set()', now you are changing it and making it
call 'rx_vlan_qinq_strip_set()', I think this is OK, but can you please update
the 'cmd_help_long_parsed()' accordingly?
And in original 'cmd_help_long_parsed()' for 'vlan set ...", it doesn't need to
have separate lines for "strip, filter & qinq", can you please merge them, and
later the 'extend' one?
Than change needs to be documented on "testpmd_funcs.rst"


And as a last thing, can you please send this as multiple patches:
1) Command line change for setting qinq offload
2) Application argument change
3) "vlan set " related changes

> 
> Signed-off-by: Vivek Sharma 

Re: [dpdk-dev] [EXT] [PATCH v5 0/7] Rework API for RSA algorithm in asymmetric crypto

[Kusztal, ArkadiuszX]

Hi Thomas,

> -Original Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: Friday, July 19, 2019 6:23 PM
> To: Kusztal, ArkadiuszX 
> Cc: dev@dpdk.org; Akhil Goyal ; Shally Verma
> ; Trahe, Fiona ; Nowak,
> DamianX ; Ayuj Verma
> ; Kanaka Durga Kotamarthy
> ; Sunila Sahu 
> Subject: Re: [dpdk-dev] [EXT] [PATCH v5 0/7] Rework API for RSA algorithm in
> asymmetric crypto
> 
> 19/07/2019 14:51, Akhil Goyal:
> > > > Arek Kusztal (7):
> > > >   cryptodev: change RSA API comments about primes
> > > >   cryptodev: add cipher field to RSA op
> > > >   crypto/openssl: add cipher field to openssl RSA implementation
> > > >   test: add cipher field to RSA test
> > > >   cryptodev: remove RSA PKCS1 BT0 padding
> > > >   openssl: remove RSA PKCS1_5 BT0 padding
> > > >   test: remove RSA PKCS1_5 BT0 padding from test cases
> > > >
> > > With minor feedback on description on Patchv5 2/7,
> > > Series-acked-by: Shally Verma 
> >
> > Comment on 2/7 shall be taken in next series for next release as suggested
> by Shally.
> >
> > Applied to dpdk-next-crypto
> 
> A commit in cryptodev is removing a field which is removed in PMDs in next
> patches. Guess what? It breaks the compilation in the middle.
> Anyway, there is no reason for this split, so I squash the patches. 
[AK] Sorry for that. In future I will squash such commits into one then.
> 
> 
> 
> 

[dpdk-dev] [PATCH v2] doc: add deprecation notice about changes to ethernet structures

[Stephen Hemminger]

Tell users about upcoming changes to rte_ether_addr and
rte_ether_header.

Signed-off-by: Stephen Hemminger 
Acked-by: Bruce Richardson 
---
v2 - reword and fix spelling

 doc/guides/rel_notes/deprecation.rst | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/doc/guides/rel_notes/deprecation.rst 
b/doc/guides/rel_notes/deprecation.rst
index a7796f49b9fe..307f831cee60 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -82,3 +82,13 @@ Deprecation Notices
   to set new power environment if power environment was already initialized.
   In this case the function will return -1 unless the environment is unset 
first
   (using ``rte_power_unset_env``). Other function usage scenarios will not 
change.
+
+* net: the Ethernet address and header definitions will change
+  attributes. The Ethernet address struct will no longer be marked as
+  packed since the packed attribute is meaningless on a byte
+  array. The Ethernet header will be marked as aligned on a 2-byte
+  boundary and will no longer have the packed attribute. This allows
+  for efficient access on CPU architectures where unaligned access is
+  expensive. These changes should not impact normal usage because drivers
+  naturally align the Ethernet header on receive and all known
+  encapsulations preserve the alignment of the header.
-- 
2.20.1

Re: [dpdk-dev] [PATCH 0/7] bnxt patches

[Ferruh Yigit]

On 7/19/2019 5:18 PM, Stephen Hemminger wrote:
> On Fri, 19 Jul 2019 13:33:32 +0100
> Ferruh Yigit  wrote:
> 
>> On 7/19/2019 7:18 AM, Ajit Khaparde wrote:
>>> Patchset based after an earlier submission
>>> https://patchwork.dpdk.org/patch/56690/
>>>
>>> This set mostly contains bug fixes, an update to the bnxt.rst doc
>>> and a adds a VF PCI device ID for Thor based network controller.
>>>
>>> Please apply.
>>>
>>> Ajit Khaparde (2):
>>>   net/bnxt: remove unnecessary interrupt disable
>>>   doc: update release information for bnxt
>>>
>>> Kalesh AP (1):
>>>   net/bnxt: add new device id
>>>
>>> Lance Richardson (1):
>>>   net/bnxt: disable vector mode Tx with VLAN offload
>>>
>>> Rahul Gupta (1):
>>>   net/bnxt: fix interrupt rearm logic
>>>
>>> Santoshkumar Karanappa Rastapur (1):
>>>   net/bnxt: use correct number of RSS contexts for thor
>>>
>>> Stephen Hemminger (1):
>>>   net/bnxt: fix receive interrupt vector
>>>   
>>
>> Same for this patchset, it has been sent to late in the release cycle, will 
>> be
>> considered for next release.
>>
>> Regards,
>> ferruh
> 
> Some of these are bug fixes. They should go in.
> Also, adding new device id's should always be allowed.
> 
> Ajit, could you split the set?
> 

Indeed I overlooked, all (for both patchset) looks like bug fixes, patchsets
with 22 and 7 patches made me think these are new features, I will get them for 
rc2.

Re: [dpdk-dev] [EXT] [PATCH] net/octeontx: use logtype_init for failed probe

[Stephen Hemminger]

On Fri, 19 Jul 2019 03:37:26 +
Jerin Jacob Kollanukkaran  wrote:

> > -Original Message-
> > From: Stephen Hemminger 
> > Sent: Wednesday, July 17, 2019 12:18 AM
> > To: Jerin Jacob Kollanukkaran 
> > Cc: dev@dpdk.org
> > Subject: [EXT] [PATCH] net/octeontx: use logtype_init for failed probe  
> 
> > All log messages should use driver logtype. RTE_LOGTYPE_PMD is planned to
> > be deprecated in the future.
> > 
> > Signed-off-by: Stephen Hemminger 
> > ---  
> 
> Please fix
> 
> $ ./devtools/check-git-log.sh
> Wrong headline format:
> net/octeontx: use logtype_init for failed probe
>   

OK but

That rule in check-git-log is still ridiculous because it rejects perfectly good
commit subjects. The intention is good "stop automated bots" but the 
implementation
rejects too many good patches.

Re: [dpdk-dev] [PATCH 00/22] bnxt patchset

[Ferruh Yigit]

On 7/19/2019 2:22 PM, Ajit Kumar Khaparde wrote:
>> On Jul 19, 2019, at 18:00, Ferruh Yigit  wrote:
>>
>>> On 7/18/2019 4:35 AM, Ajit Khaparde wrote:
>>> This patchset based on commit a164bb7c0a5ab3b100357cf56696c945fe28ab73
>>> contains bug fixes and an update to the HWRM API.
>>> Please apply.
>>>
>>> Ajit Khaparde (1):
>>>  net/bnxt: update HWRM API to version 1.10.0.91
>>>
>>> Kalesh AP (11):
>>>  net/bnxt: fix to handle error case during port start
>>>  net/bnxt: fix return value check of address mapping
>>>  net/bnxt: fix failure to add a MAC address
>>>  net/bnxt: fix an unconditional wait in link update
>>>  net/bnxt: fix setting primary MAC address
>>>  net/bnxt: fix failure path in dev init
>>>  net/bnxt: reset filters before registering interrupts
>>>  net/bnxt: fix error checking of FW commands
>>>  net/bnxt: fix to return standard error codes
>>>  net/bnxt: fix lock release on getting NVM info
>>>  net/bnxt: fix to correctly check result of HWRM command
>>>
>>> Lance Richardson (8):
>>>  net/bnxt: use correct vnic default completion ring
>>>  net/bnxt: use dedicated cpr for async events
>>>  net/bnxt: retry irq callback deregistration
>>>  net/bnxt: use correct RSS table sizes
>>>  net/bnxt: fully initialize hwrm msgs for thor RSS cfg
>>>  net/bnxt: use correct number of RSS contexts for thor
>>>  net/bnxt: pass correct RSS table address for thor
>>>  net/bnxt: avoid overrun in get statistics
>>>
>>> Santoshkumar Karanappa Rastapur (2):
>>>  net/bnxt: fix RSS disable issue for thor-based adapters
>>>  net/bnxt: fix MAC/VLAN filter allocation failure
>>>
>>
>>
>> Hi Ajit,
>>
>> All bnxt patches has been sent after rc1, and this one has been sent a day
>> before rc2. A believe you are aware that proposal deadline was "June 3, 
>> 2019".
> I understand. But most of these including the next patch set are bug fixes.
> It just that some stayed in our staging area longer. But most of them
> were detected and fixed in the last week when our QA ramped testing on
> rc1.

You are right, I will do my best to get them for rc2.

> 
> Intact as I type this mail I see two more bug fixes ready for submission.
> 
>>
>> I will still try to get them but most probably the patchset won't able to 
>> make
>> this release, fyi.
> 
> Thanks
> Ajit
> 
>>
>> Regards,
>> ferruh

Re: [dpdk-dev] [PATCH] mk: fix output directory name when compiling with custom kernel header dir

[Lipiec, Herakliusz]

> -Original Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: Friday, July 19, 2019 12:37 PM
> To: Lipiec, Herakliusz 
> Cc: dev@dpdk.org; sta...@dpdk.org; Richardson, Bruce
> 
> Subject: Re: [dpdk-dev] [PATCH] mk: fix output directory name when
> compiling with custom kernel header dir
> 
> 19/07/2019 13:09, Lipiec, Herakliusz:
> > From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > > 18/07/2019 16:03, Herakliusz Lipiec:
> > > > -kerneldir   ?= /lib/modules/$(shell uname -r)/extra/dpdk
> > > > +kerneldir ?= $(subst /build,/extra/dpdk,$(RTE_KERNELDIR))
> > >
> > > I would suggest another syntax, easier to read:
> > >
> > > kerneldir   ?= $(RTE_KERNELDIR:/build=/extra/dpdk)
> > >
> > I have tried that before and it didn't seem to solve the issue.
> 
> Why? What is the output of $(info $(kerneldir)) ?
> 
I have tested your line again, and it worked, I compared against the one I was 
using at the beginning
And I found that I was missing slash. I will resend a v3.

[dpdk-dev] [PATCH v3] mk: fix output directory name when compiling with custom kernel header dir

[Herakliusz Lipiec]

When building dpdk with differnt kernel headers by specifying
RTE_KERNELDIR igb_uio is compiled to directory with a name of the
version of kernel thats running on the system instead of the one that
dpdk is actually compiled against. Fixed by replacing hardcoded value
with value from RTE_KERNELDIR.

Fixes: 3967af352aeb ("mk: install kernel modules")
Cc: sta...@dpdk.org
Cc: bruce.richard...@intel.com
Signed-off-by: Herakliusz Lipiec 

---
v2: with corrected corrected alignment.
v3: change to more readable version.
---
 mk/rte.sdkinstall.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk/rte.sdkinstall.mk b/mk/rte.sdkinstall.mk
index 5c4215cd7..32bed5d95 100644
--- a/mk/rte.sdkinstall.mk
+++ b/mk/rte.sdkinstall.mk
@@ -27,7 +27,7 @@ ifeq ($(RTE_EXEC_ENV),linuxapp)
 RTE_EXEC_ENV=linux
 endif
 ifeq ($(RTE_EXEC_ENV),linux)
-kerneldir   ?= /lib/modules/$(shell uname -r)/extra/dpdk
+kerneldir   ?= $(RTE_KERNELDIR:/build=/extra/dpdk)
 else
 kerneldir   ?= /boot/modules
 endif
-- 
2.17.2

Re: [dpdk-dev] [PATCH 1/2] net/ark: remove queue offset based on port id

[Ferruh Yigit]

On 7/19/2019 2:07 PM, Ed Czeck wrote:
> Queue index was incorrectly incremented with port, which
> caused swizzling of packet placement among queues. 

What is "swizzling of packet placement"?


'qidx' is used to set 'phys_qid', if what the name suggest is correct it is used
to access the actual physical queues.

How this was working if you are calculating physical queue indexes wrong?
(Of-course except port 0)

Are you actually fixing the multiple port support?


> This manifested
> when the number of configured ports was >1 and < nb_queues.

I can see port number ">1", but is the 'nb_queues' limitation real?

If there are 2 queues per port, and you are configuring 3 ports will the
original calculation be correct?

> 
> Fixes: c33d45af3633 ("net/ark: add Tx initial version")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Ed Czeck 
> ---
>  drivers/net/ark/ark_ethdev_rx.c | 4 +---
>  drivers/net/ark/ark_ethdev_tx.c | 4 +---
>  2 files changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/ark/ark_ethdev_rx.c b/drivers/net/ark/ark_ethdev_rx.c
> index 7de1a98..6156730 100644
> --- a/drivers/net/ark/ark_ethdev_rx.c
> +++ b/drivers/net/ark/ark_ethdev_rx.c
> @@ -127,9 +127,7 @@ eth_ark_dev_rx_queue_setup(struct rte_eth_dev *dev,
>   uint32_t i;
>   int status;
>  
> - /* Future works: divide the Q's evenly with multi-ports */
> - int port = dev->data->port_id;
> - int qidx = port + queue_idx;
> + int qidx = queue_idx;
>  
>   /* We may already be setup, free memory prior to re-allocation */
>   if (dev->data->rx_queues[queue_idx] != NULL) {
> diff --git a/drivers/net/ark/ark_ethdev_tx.c b/drivers/net/ark/ark_ethdev_tx.c
> index 1967655..08bcf43 100644
> --- a/drivers/net/ark/ark_ethdev_tx.c
> +++ b/drivers/net/ark/ark_ethdev_tx.c
> @@ -211,9 +211,7 @@ eth_ark_tx_queue_setup(struct rte_eth_dev *dev,
>   struct ark_tx_queue *queue;
>   int status;
>  
> - /* Future: divide the Q's evenly with multi-ports */
> - int port = dev->data->port_id;
> - int qidx = port + queue_idx;
> + int qidx = queue_idx;
>  
>   if (!rte_is_power_of_2(nb_desc)) {
>   PMD_DRV_LOG(ERR,
> 

Re: [dpdk-dev] [EXT] [PATCH v5 1/1] app/test-compress-perf: report header improvement

[Trahe, Fiona]

Hi Thomas,

> -Original Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: Friday, July 19, 2019 5:21 PM
> To: Trybula, ArturX 
> Cc: dev@dpdk.org; Akhil Goyal ; Shally Verma 
> ; Trahe,
> Fiona ; Dybkowski, AdamX 
> Subject: Re: [dpdk-dev] [EXT] [PATCH v5 1/1] app/test-compress-perf: report 
> header improvement
> 
> 19/07/2019 15:17, Akhil Goyal:
> > >
> > > > +static struct cperf_buffer_info tests_res;
> > > Rename test_res too --> buffer_info? You can address it in next release 
> > > cycle as
> > > well.
> > > [Artur] Thank you Shally. Good point. Will be changed in the next cycle.
> > >
> > > 
> > Applied to dpdk-next-crypto
> 
> Not pulled in master tree for 2 reasons:
> - the title and commit log are not descriptive enough
> - there are some UTF-8 characters for no good reason in the printf.
> Please stick to standard dash or asterisk for lists,
> so it will be printed in any console.
[Fiona] Sorry about this - we didn't know of this requirement.
Will send a v6 next week.

Re: [dpdk-dev] [PATCH v2] net: be more restrictive in accepted ether string formats

[Ferruh Yigit]

On 7/19/2019 2:42 PM, Olivier Matz wrote:
> On Thu, Jul 18, 2019 at 11:35:44AM -0700, Stephen Hemminger wrote:
>> The current ether_unformat_addr code was based off of
>> BSD ether_aton. That version changed what was allowed
>> by the cmdline ether address parser.
>> For example, it allows dropping leading zeros.
>>
>> Change the code to be more restrictive and only allow the fully
>> expanded standard formats.
>>
>> Bugzilla ID: 324
>> Fixes: 596d31092d32 ("net: add function to convert string to ethernet 
>> address")
>> Signed-off-by: Stephen Hemminger 
> 
> Reviewed-by: Olivier Matz 
> 

Applied to dpdk-next-net/master, thanks.

Re: [dpdk-dev] [PATCH] rte_ether: force format string for unformat_addr

[Ferruh Yigit]

On 7/17/2019 7:42 PM, Stephen Hemminger wrote:
> On Wed, 10 Jul 2019 16:31:59 -0400
> Aaron Conole  wrote:
> 
>> Stephen Hemminger  writes:
>>
>>> On Wed, 10 Jul 2019 15:13:02 -0400
>>> Aaron Conole  wrote:
>>>  
 Stephen Hemminger  writes:
   
> On Wed, 10 Jul 2019 14:33:42 -0400
> Aaron Conole  wrote:
>
>> rte_ether_unformation_addr is very lax in what it accepts now, including
>> ethernet addresses formatted ambiguously as "x:xx:x:xx:x:xx".  However,
>> previously this behavior was enforced via the my_ether_aton which would
>> fail ambiguously formatted values.
>>
>> Reported-by: Michael Santana 
>> Fixes: 596d31092d32 ("net: add function to convert string to ethernet 
>> address")
>> Signed-off-by: Aaron Conole 
>> ---
>>  lib/librte_net/rte_ether.c | 6 --
>>  1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/lib/librte_net/rte_ether.c b/lib/librte_net/rte_ether.c
>> index 8d040173c..4f252b813 100644
>> --- a/lib/librte_net/rte_ether.c
>> +++ b/lib/librte_net/rte_ether.c
>> @@ -45,7 +45,8 @@ rte_ether_unformat_addr(const char *s, struct 
>> rte_ether_addr *ea)
>>  if (n == 6) {
>>  /* Standard format XX:XX:XX:XX:XX:XX */
>>  if (o0 > UINT8_MAX || o1 > UINT8_MAX || o2 > UINT8_MAX 
>> ||
>> -o3 > UINT8_MAX || o4 > UINT8_MAX || o5 > UINT8_MAX) 
>> {
>> +o3 > UINT8_MAX || o4 > UINT8_MAX || o5 > UINT8_MAX 
>> ||
>> +strlen(s) != RTE_ETHER_ADDR_FMT_SIZE - 1) {
>>  rte_errno = ERANGE;
>>  return -1;
>>  }
>> @@ -58,7 +59,8 @@ rte_ether_unformat_addr(const char *s, struct 
>> rte_ether_addr *ea)
>>  ea->addr_bytes[5] = o5;
>>  } else if (n == 3) {
>>  /* Support the format :: */
>> -if (o0 > UINT16_MAX || o1 > UINT16_MAX || o2 > 
>> UINT16_MAX) {
>> +if (o0 > UINT16_MAX || o1 > UINT16_MAX || o2 > 
>> UINT16_MAX ||
>> +strlen(s) != RTE_ETHER_ADDR_FMT_SIZE - 4) {
>>  rte_errno = ERANGE;
>>  return -1;
>>  }
>
> NAK
> Skipping leading zero should be ok. There is no need for this patch.

 Is it intended to skip the leading 0?  Why not the trailing 0?  I'm not
 familiar with the format that is used here  (example - X:XX:X:XX:X)

 It isn't described in any RFC I could find (but I only did a small
 search).  Even in IEEE, the format is always a full octet.
   
> The current behavior is superset of what standard ether_aton accepts.

 Okay, but it introduces a test failure for the cmdline tests and then
 that test will need a few lines removed for 'unsuccessful' formats.

 ether_aton is much more rigid in the formats it accepts, so the test
 case is enforcing that.  I guess either the current behavior of this
 function changes (and since it is a new behavior of the cmdline parser,
 I would think it should be changed) or the test case should be changed
 to adopt it.  
>>>
>>> BSD ether_aton is:
>>> /*
>>>  * Convert an ASCII representation of an ethernet address to binary form.
>>>  */
>>> struct ether_addr *
>>> ether_aton_r(const char *a, struct ether_addr *e)
>>> {
>>> int i;
>>> unsigned int o0, o1, o2, o3, o4, o5;
>>>
>>> i = sscanf(a, "%x:%x:%x:%x:%x:%x", &o0, &o1, &o2, &o3, &o4, &o5);
>>> if (i != 6)
>>> return (NULL);
>>> e->octet[0]=o0;
>>> e->octet[1]=o1;
>>> e->octet[2]=o2;
>>> e->octet[3]=o3;
>>> e->octet[4]=o4;
>>> e->octet[5]=o5;
>>> return (e);
>>> }  
>>
>> Your implementation fixes the above by bounds checking each octet
>> to enforce that in the 6-octet form, each octet is bound to the region
>> 00-ff.
>>
>> The BSD example only accepts a 6-octet form.  Your version is intended
>> to accept both colon forms so x:x:x will successfully parse as well
>> (interpreted on the :: side) (ie: mac 02:03:04 or 2:3:4
>> would be accepted).  Further, accidentally passing an ipv6 address to
>> this routine (something a user of a cmdline interface might do) could be
>> parsed as valid (example: 2001:db8:2::1) - which would be the wrong
>> thing.  I think it would be strange for length limits to be enforced in
>> cmdline parser *after* calling this, but that might be an option for
>> fixing (so patch cmdline_parse_etheraddr to do a length check after the
>> unformat_addr call).
>>
>> I guess I'm not sure what the *best* fix would be.  I think the most
>> sane fix is what I've put in since it will only allow the commonly
>> accepted notation, and not allow ad-hoc accidents.  Higher layers (like
>> cmdline parsers) are f

Re: [dpdk-dev] [PATCH 1/2] net/mlx5: cache the associated network device ifindex

[Stephen Hemminger]

On Fri, 19 Jul 2019 16:41:38 +
Slava Ovsiienko  wrote:

> > -Original Message-
> > From: Stephen Hemminger 
> > Sent: Friday, July 19, 2019 19:16
> > To: Slava Ovsiienko 
> > Cc: dev@dpdk.org; Yongseok Koh ; Shahaf Shuler
> > 
> > Subject: Re: [PATCH 1/2] net/mlx5: cache the associated network device
> > ifindex
> > 
> > On Fri, 19 Jul 2019 05:31:44 +
> > Viacheslav Ovsiienko  wrote:
> >   
> > > + /*
> > > +  * Store associated network device interface index. This index
> > > +  * is permanent throughout the lifetime of device. We do not spawn
> > > +  * rte_eth_dev ports without associated network device, and if
> > > +  * network device is being unbound we get the remove notification
> > > +  * message and rte_eth_dev port is also detached. So, we may store
> > > +  * the ifindex here and use the cached value further. The network
> > > +  * device name can be changed dynamically and should not be  
> > cached.  
> > > +  */
> > > + assert(spawn->ifindex);
> > > + priv->if_index = spawn->ifindex;  
> > 
> > This correct, but overkill.
> > 
> > 1. The comment is way too wordy. Please stick to only a couple of lines.
> >If you feel more explanation is necessary put that in the commit log.  
> 
> I'd prefer to see the issue description in the source,  not by searching the 
> git log
> for the appropriate commit. But OK, it does not matter.
>  
> > 2. It is perfectly okay to return 0 as a value in dev_info.
> >Therefore the assert is unnecessary.  
> 
> Valid network interface index cannot be zero. For example, if_nametoindex()
> returns zero in case of error. Also, in mlx5 we do not spawn ports without 
> attached
> network interfaces. Assert is not related to dev_info, it checks whether
> the mlx5_dev_spawn() is called with valid ifindex for valid port (ifindex 
> checked
> against zero to validate infiniband port is active). We need this assert here.
> 
> > 3. Where is "Reported-by:"  
> It is in cover letter:
> "Proposed-by: Stephen Hemminger "
>  Sorry, I forgot to add this one in commit message, will fix.
> 
> > 4. What was wrong with my simpler patch?  
> Please, see the cover letter. Your patch fixes only the part of problem -
> the mlx5_dev_infos_get(). But it is just the case of unsafe mlx5_ifindex() 
> usage.
> mlx5_ifindex() itself must be fixed instead.
> 
> WBR, Slava

Will your patch be backported to stable?
It is critical that primary/secondary work on older releases.

Re: [dpdk-dev] [dpdk-stable] [PATCH] doc: fix ETH address example

[Ferruh Yigit]

On 7/17/2019 8:44 PM, Dekel Peled wrote:
> Ethernet address examples contain 5 bytes only.
> This patch changes the examples to valid 6 bytes Ethernet addresses.
> 
> Fixes: 4d73b6fb9907 ("doc: add generic flow API guide")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Dekel Peled 

Reviewed-by: Ferruh Yigit 

Applied to dpdk-next-net/master, thanks.

Re: [dpdk-dev] [PATCH] pci: fix missing pci bus with shared library build

[Stephen Hemminger]

On Tue, 16 Jul 2019 09:46:04 +0100
Bruce Richardson  wrote:

> I don't think the position of these is going to be the cause here, the more
> likely cause is that the pci bus driver - and all other drivers - are not
> linked into apps for shared library builds. You always need to pass "-d"
> parameter to load drivers at init time (or have them installed in the
> correct driver path). For example, for me with a shared library build the
> following gives a no ports error:
> 
>   sudo ./build/l2fwd -c F0 -- -p 3
> 
> while this succeeds and runs fine
> 
>   sudo ./build/l2fwd -c F0 -d 
> $RTE_SDK/$RTE_TARGET/lib/librte_pmd_i40e.so -- -p 3


Application should never have to use -d to force driver load!
The purpose of all the pmdinfo, and probing logic is to not do this.

Re: [dpdk-dev] [dpdk-stable] [v4] net/i40e: fix SFP X722 not work with FW4.16

[Ferruh Yigit]

On 7/19/2019 4:30 PM, Stillwell Jr, Paul M wrote:
> 
>> -Original Message-
>> From: dev  On Behalf Of Xiao Zhang
>> Sent: Friday, July 19, 2019 4:00 AM
>> To: dev@dpdk.org
>> Cc: Xing, Beilei ; Wang, Haiyue
>> ; Zhang, Qi Z ; Zhang, Xiao
>> ; sta...@dpdk.org
>> Subject: [dpdk-dev] [v4] net/i40e: fix SFP X722 not work with FW4.16
>>
>> The code checked the NVM API version of FW to check if support adminq
>> operation, when version is 1.7 or above adminq operation is support and the
>> adminq flag will be set. The code will use adminq to set TPID if the flags 
>> set or
>> to use register. The NVM API version of SFP X722 old versions are lowwer
>> than 1.7 and for FW4.16 is 1.8. But FW4.16 of SFP
>> X722 does not support adminq operation, the legacy logic is not compatible
>> with device SFP X722 currently. Check the device id to unset adminq flag to
>> use resigter setting to make it work.
>>
> 
> Sorry, I'm still confused about what this patch is doing. From the commit 
> message it seems like there are a couple of conditions:
> 
> If the device is X722
>   Then if FW < 1.7 then use register to set TPID
>   Else use adminq to set TPID
> 
> The change in the code is only looking to see if the device is X722 and not 
> doing any other checking of FW version.
> 
> Am I misunderstanding the commit message, the patch, or both?

I have updated the commit log while merging [1] (according what I understand) I
hope it is more clear.

[1]
net/i40e: fix SFP X722 with FW4.16

When NVM API version is 1.7 or above adminq operation to set TPID is
set as supported. This cause using adminq instead of registers.

For SFP X722 FW4.16, reported NVM API version is 1.8, and this cause
adminq operation to set as supported but it is not supported on FW4.16

Additional check added for SFP X722 to not enable adminq operation.

Fixes: 73cd7d6dc8e1 ("net/i40e: use set switch AQ instead of register 
setting")
Cc: sta...@dpdk.org

Signed-off-by: Xiao Zhang 
Reviewed-by: Haiyue Wang 



> 
>> Fixes: 73cd7d6dc8e1 ("net/i40e: use set switch AQ instead of register
>> setting")
>> Cc: sta...@dpdk.org
>>
>> Signed-off-by: Xiao Zhang 
>> ---
>> v4
>> Add more detailed information in the commit log.
>> v3
>> Modify the commit log to make it not confused and add fixed line.
>> v2
>> Unset adminq flag instead of only checking device id when set TPID.
>> v1
>> Check device id when setting TPID, use adminq if not SFP X722, else use
>> register.
>> ---
>>  drivers/net/i40e/i40e_ethdev.c | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
>> index 2b9fc45..2b2c877 100644
>> --- a/drivers/net/i40e/i40e_ethdev.c
>> +++ b/drivers/net/i40e/i40e_ethdev.c
>> @@ -1358,6 +1358,10 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void
>> *init_params __rte_unused)
>>  PMD_INIT_LOG(ERR, "Failed to init adminq: %d", ret);
>>  return -EIO;
>>  }
>> +/* Firmware of SFP x722 does not support adminq option */
>> +if (hw->device_id == I40E_DEV_ID_SFP_X722)
>> +hw->flags &= ~I40E_HW_FLAG_802_1AD_CAPABLE;
>> +
>>  PMD_INIT_LOG(INFO, "FW %d.%d API %d.%d NVM
>> %02d.%02d.%02d eetrack %04x",
>>   hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
>>   hw->aq.api_maj_ver, hw->aq.api_min_ver,
>> --
>> 2.7.4
> 

Re: [dpdk-dev] [PATCH 1/2] net/mlx5: cache the associated network device ifindex

[Slava Ovsiienko]

> -Original Message-
> From: Stephen Hemminger 
> Sent: Friday, July 19, 2019 21:03
> To: Slava Ovsiienko 
> Cc: dev@dpdk.org; Yongseok Koh ; Shahaf Shuler
> 
> Subject: Re: [PATCH 1/2] net/mlx5: cache the associated network device
> ifindex
> 
> On Fri, 19 Jul 2019 16:41:38 +
> Slava Ovsiienko  wrote:
> 
> > > -Original Message-
> > > From: Stephen Hemminger 
> > > Sent: Friday, July 19, 2019 19:16
> > > To: Slava Ovsiienko 
> > > Cc: dev@dpdk.org; Yongseok Koh ; Shahaf
> Shuler
> > > 
> > > Subject: Re: [PATCH 1/2] net/mlx5: cache the associated network
> > > device ifindex
> > >
> > > On Fri, 19 Jul 2019 05:31:44 +
> > > Viacheslav Ovsiienko  wrote:
> > >
> > > > +   /*
> > > > +* Store associated network device interface index. This index
> > > > +* is permanent throughout the lifetime of device. We do not 
> > > > spawn
> > > > +* rte_eth_dev ports without associated network device, and if
> > > > +* network device is being unbound we get the remove 
> > > > notification
> > > > +* message and rte_eth_dev port is also detached. So, we may 
> > > > store
> > > > +* the ifindex here and use the cached value further. The 
> > > > network
> > > > +* device name can be changed dynamically and should not be
> > > cached.
> > > > +*/
> > > > +   assert(spawn->ifindex);
> > > > +   priv->if_index = spawn->ifindex;
> > >
> > > This correct, but overkill.
> > >
> > > 1. The comment is way too wordy. Please stick to only a couple of lines.
> > >If you feel more explanation is necessary put that in the commit log.
> >
> > I'd prefer to see the issue description in the source,  not by
> > searching the git log for the appropriate commit. But OK, it does not
> matter.
> >
> > > 2. It is perfectly okay to return 0 as a value in dev_info.
> > >Therefore the assert is unnecessary.
> >
> > Valid network interface index cannot be zero. For example,
> > if_nametoindex() returns zero in case of error. Also, in mlx5 we do
> > not spawn ports without attached network interfaces. Assert is not
> > related to dev_info, it checks whether the mlx5_dev_spawn() is called
> > with valid ifindex for valid port (ifindex checked against zero to validate
> infiniband port is active). We need this assert here.
> >
> > > 3. Where is "Reported-by:"
> > It is in cover letter:
> > "Proposed-by: Stephen Hemminger "
> >  Sorry, I forgot to add this one in commit message, will fix.
> >
> > > 4. What was wrong with my simpler patch?
> > Please, see the cover letter. Your patch fixes only the part of
> > problem - the mlx5_dev_infos_get(). But it is just the case of unsafe
> mlx5_ifindex() usage.
> > mlx5_ifindex() itself must be fixed instead.
> >
> > WBR, Slava
> 
> Will your patch be backported to stable?
> It is critical that primary/secondary work on older releases.
Quite possible.
Is there the full-featured secondary processes support in 18.11 LTS?
I think it's worth to recheck the hotplug feature in 18.11 to avoid
ifindex unexpected change (try to unbound/rebound network device from/to PCI 
one,
check whether it is disabled/rejected, etc).

With best regards, Slava